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Recent Changes
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GSRD for Agilex 7 I-Series Transceiver-SoC DevKit (4x F-Tile)
Golden System Reference Design for DK SI AGI027FB and DK SI AGI027FA -
Building Bootloader for Cyclone V and Arria 10
Information abut latest bootloaders for Cortex A9 based SoC FPGA devices -
Arria 10 SoC GSRD
Arria 10 SoC Golden System Reference Design - Intel FPGA HPS Embedded Software Release Notes
-
Building Bootloader for Stratix10
Building latest bootloaders for Stratix 10 SoC Devices
Table of Contents
Overview
This page demonstrates how to program the FPGA by using the Quartus II Programmer tool, that is installed by default with the SoC EDS. The instructions are for the Cyclone V SoC Development kit, but a similar flow can also be used for Arria V SoC Development Kit. Note: Before re-programming the FPGA fabric, make sure that the FPGA2HPS bridges (f2sdram, axi) are disabled, and that there is no software on HPS that may access the FPGA. This includes shutting down applications that access soft IP and also unloading any soft IP Linux kernel modules. Failure to do so will cause the system to behave in a non-deterministic way and most likely it will crash.Prerequisites
1. Retrieve and extract the Cyclone V GHRD archive to the home folder$ cd ~ $ wget https://releases.rocketboards.org/2014.06/gsrd/ghrd/cv_soc_devkit_ghrd.tar.gz $ tar xvzf cv_soc_devkit_ghrd.tar.gz2. Use the instructions from Compiling the Hardware Design to compile the FPGA design. 3. Setup the board as described in Booting Linux. Do not insert the SD card or boot Linux.
Procedure
1. Start the Quartus II Programmer Tool$ ~/altera/14.0/qprogrammer/bin/quartus_pgmw
2. In Quartus Programmer, click the Hardware Setup button. This will open the Hardware Setup window.
3. In the Hardware Setup window Select the USB Blaster device instance in the window that appears, by double-clicking it then click Close
4. In Quartus Programmer, click the Autodetect button. This will open the Select Device window.
5. Select the device and click OK to close the window.
6. In Quartus Programmer select the line showing the FPGA device.
7. Right click the line with the FPGA device and select Change File from the menu.
8. Browse to ~/cv_soc_devkit_ghrd/output_files/soc_system.sof and click Open
9. Check the Program/Configure checkbox .
10. Click the Start button. This will configure the FPGA.
11. The top right corner will display the status of the operation.
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