This page contains release notes for the Altera GSRD (Golden System Reference Design) v14.0.

Release Notes

GSRD

• CV SoCFPGA GSRD and AV SoCFPGA GSRD has been updated to ACDS14.0 code base using ACDS14.0 tools and software release.
• DTC is no longer released as part of SoCEDS. User can generate the DTB from sopcinfo using sopc2dts.

Note: Do not use the GHRD that is part of SoC EDS with the GSRD. Always use the GHRD that is delivered as part of GSRD.

Linux

This Linux BSP release supports the CycloneV SoC Development Kit, and provides the following for the CycloneV SoC:

• Linux kernel v3.13
• Drivers: I2C, LCD, EEPROM, RTC, Ethernet, USB (Host), Watchdog, SD/MMC, QSPI, DMA, FPGA Manager, and FPGA Bridges
• Boards: Cyclone V DevKit Rev D.
• U-Boot 2013.01
• Linaro's GCC 4.7 2012.11

Preloader & U-Boot

Here are the new features and enhancement done for 14.0 Preloader and U-Boot:

New Features

• Supported Denali NAND controller
• Enabled Preloader program FPGA from SDMMC FAT partition
• Enabled I2C support for U-Boot
• Enabled option to get EMAC address from EEPROM
• Added DMA PL330 support
• Added SDRAM ECC initialization using DMA
• Added Spansion flash support

Enhancement

• Enhanced QSPI boot performance
• Enhanced SDMMC boot performance
• Enhanced FPGA programming time within U-Boot
• Enhanced Preloader and U-Boot to use THUMB2
• Enhanced Preloader to load U-Boot from FAT as default
• Enhanced Cyclone V MPU clock to 925MHz
• Enhanced Arria V MPU clock to 1050MHz
• Enhanced Arria V SDRAM to 533MHz
• Enhanced QSPI driver addressing mode
• Enhance Preloader and U-Boot to auto calculate SDRAM size
• Enhanced Preloader SDRAM memory test
• Enhanced Preloader to display clock info
• Enhanced drivers to use derived clock value
• Moved board specific functions away from misc.c
• Enhanced fpga2sdram bridge release sequence

Release Contents

The GSRD sources and prebuilt binaries can be downloaded from https://releases.rocketboards.org/2014.06/gsrd.

Folder	File	Description
bin	linux-socfpga-gsrd-14.0-av-bin.tar.gz	Arria V Binaries Archive
^	linux-socfpga-gsrd-14.0-cv-bin.tar.gz	Cyclone V Binaries Archive
ghrd	av_soc_devkit_ghrd.tar.gz	Arria V GHRD Archive
^	cv_soc_devkit_ghrd.tar.gz	Cyclone V GHRD Archive
src	boot.script	U-Boot script
^	bup.tar.gz	Web server content
tools	make_sdimage.py	SD Card Python Script

The following documents are also part of the release:

Document	Description
GSRD v14.0 - Release Notes	Release Notes
GSRD v14.0 - User Manual	User Manual

The Cyclone V and Arria V precompiled binaries archives (linux-socfpga-gsrd-14.0-cv-bin.tar.gz and linux-socfpga-gsrd-14.0-av-bin.tar.gz) contain the following files:

Cyclone V File Name	Arria V File Name	Description
gsrd-image-socfpga_cyclone5.ext3	gsrd-image-socfpga_arria5.ext3	Root filesystem in EXT3 format
gsrd-image-socfpga_cyclone5.tar.gz	gsrd-image-socfpga_arria5.tar.gz	Root filesystem as compressed tarball
preloader-mkpimage.bin		Preloader image
sdimage.bin.gz		Compressed bootable SD card image
socfpga.dtb		Device Tree Blob
soc_system.rbf		Compressed FPGA configuration file
u-boot.scr		U-boot script for configuring the FPGA
u-boot-socfpga_cyclone5.img	u-boot-socfpga_arria5.img	U-boot image
vmlinux		Linux kernel ELF image
zImage		Compressed Linux kernel image

U-boot, Linux kernel and Yocto source packages are also provided through the git trees at http://rocketboards.org/gitweb, as shown in the table below.

Component	Git address	Branch	Tag
Linux	linux-socfpga.git	socfpga-3.13-rel14.0	ACDS14.0_REL_GSRD_PR
U-Boot	u-boot-socfpga.git	socfpga_v2013.01.01-rel14.0	ACDS14.0_REL_GSRD_PR
Yocto	poky-socfpga.git	danny-altera-rel14.0	ACDS14.0_REL_GSRD_PR

Known Issues

Issue	Headline	Description
99507	i2c speed is slow	Running @50KHz instead of 100KHz because onboard LCD does not support 100KHz
103050	Transmit offloading on receive side doesn't produce a speed improvement	Ethernet checksum calculation is not correctly offloaded from CPU to hardware
112140	stmmac_tx_timeout() is very broken the linux ethernet driver	The function stmmac_tx_timeout needs to be updated to properly follow the datasheet recommendations
130597	move common qspi stuff to socfpga.dtsi	Need to put the common QSPI parameters in the socfpga.dtsi instead of repeating them for each device
209407	Clock Managers Reported from Linux Kernel are incorrect	"$cat /sys/kernel/debug/clk/clk_summary” displays incorrect debug clocks, random values for disabled clocks