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alt_h2f.h
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32 
33 /* Altera - ALT_H2F */
34 
35 #ifndef __ALTERA_ALT_H2F_H__
36 #define __ALTERA_ALT_H2F_H__
37 
38 #ifdef __cplusplus
39 extern "C"
40 {
41 #endif /* __cplusplus */
42 
43 /*
44  * Component : HPS2FPGA AXI Bridge Module - ALT_H2F
45  * HPS2FPGA AXI Bridge Module
46  *
47  * Registers in the HPS2FPGA AXI Bridge Module.
48  *
49  */
50 /*
51  * Register Group : ID Register Group - ALT_H2F_IDGRP
52  * ID Register Group
53  *
54  * Contains registers that identify the ARM NIC-301 IP Core.
55  *
56  */
57 /*
58  * Register : Peripheral ID4 Register - periph_id_4
59  *
60  * JEP106 continuation code
61  *
62  * Register Layout
63  *
64  * Bits | Access | Reset | Description
65  * :-------|:-------|:------|:---------------
66  * [7:0] | R | 0x4 | Peripheral ID4
67  * [31:8] | ??? | 0x0 | *UNDEFINED*
68  *
69  */
70 /*
71  * Field : Peripheral ID4 - periph_id_4
72  *
73  * JEP106 continuation code
74  *
75  * Field Access Macros:
76  *
77  */
78 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4 register field. */
79 #define ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4_LSB 0
80 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4 register field. */
81 #define ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4_MSB 7
82 /* The width in bits of the ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4 register field. */
83 #define ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4_WIDTH 8
84 /* The mask used to set the ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4 register field value. */
85 #define ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4_SET_MSK 0x000000ff
86 /* The mask used to clear the ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4 register field value. */
87 #define ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4_CLR_MSK 0xffffff00
88 /* The reset value of the ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4 register field. */
89 #define ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4_RESET 0x4
90 /* Extracts the ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4 field value from a register. */
91 #define ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4_GET(value) (((value) & 0x000000ff) >> 0)
92 /* Produces a ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4 register field value suitable for setting the register. */
93 #define ALT_H2F_ID_PERIPH_ID_4_PERIPH_ID_4_SET(value) (((value) << 0) & 0x000000ff)
94 
95 #ifndef __ASSEMBLY__
96 /*
97  * WARNING: The C register and register group struct declarations are provided for
98  * convenience and illustrative purposes. They should, however, be used with
99  * caution as the C language standard provides no guarantees about the alignment or
100  * atomicity of device memory accesses. The recommended practice for writing
101  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
102  * alt_write_word() functions.
103  *
104  * The struct declaration for register ALT_H2F_ID_PERIPH_ID_4.
105  */
106 struct ALT_H2F_ID_PERIPH_ID_4_s
107 {
108  const uint32_t periph_id_4 : 8; /* Peripheral ID4 */
109  uint32_t : 24; /* *UNDEFINED* */
110 };
111 
112 /* The typedef declaration for register ALT_H2F_ID_PERIPH_ID_4. */
113 typedef volatile struct ALT_H2F_ID_PERIPH_ID_4_s ALT_H2F_ID_PERIPH_ID_4_t;
114 #endif /* __ASSEMBLY__ */
115 
116 /* The byte offset of the ALT_H2F_ID_PERIPH_ID_4 register from the beginning of the component. */
117 #define ALT_H2F_ID_PERIPH_ID_4_OFST 0xfd0
118 
119 /*
120  * Register : Peripheral ID0 Register - periph_id_0
121  *
122  * Peripheral ID0
123  *
124  * Register Layout
125  *
126  * Bits | Access | Reset | Description
127  * :-------|:-------|:------|:------------------
128  * [7:0] | R | 0x1 | Part Number [7:0]
129  * [31:8] | ??? | 0x0 | *UNDEFINED*
130  *
131  */
132 /*
133  * Field : Part Number [7:0] - pn7to0
134  *
135  * Part Number [7:0]
136  *
137  * Field Access Macros:
138  *
139  */
140 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_PERIPH_ID_0_PN7TO0 register field. */
141 #define ALT_H2F_ID_PERIPH_ID_0_PN7TO0_LSB 0
142 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_PERIPH_ID_0_PN7TO0 register field. */
143 #define ALT_H2F_ID_PERIPH_ID_0_PN7TO0_MSB 7
144 /* The width in bits of the ALT_H2F_ID_PERIPH_ID_0_PN7TO0 register field. */
145 #define ALT_H2F_ID_PERIPH_ID_0_PN7TO0_WIDTH 8
146 /* The mask used to set the ALT_H2F_ID_PERIPH_ID_0_PN7TO0 register field value. */
147 #define ALT_H2F_ID_PERIPH_ID_0_PN7TO0_SET_MSK 0x000000ff
148 /* The mask used to clear the ALT_H2F_ID_PERIPH_ID_0_PN7TO0 register field value. */
149 #define ALT_H2F_ID_PERIPH_ID_0_PN7TO0_CLR_MSK 0xffffff00
150 /* The reset value of the ALT_H2F_ID_PERIPH_ID_0_PN7TO0 register field. */
151 #define ALT_H2F_ID_PERIPH_ID_0_PN7TO0_RESET 0x1
152 /* Extracts the ALT_H2F_ID_PERIPH_ID_0_PN7TO0 field value from a register. */
153 #define ALT_H2F_ID_PERIPH_ID_0_PN7TO0_GET(value) (((value) & 0x000000ff) >> 0)
154 /* Produces a ALT_H2F_ID_PERIPH_ID_0_PN7TO0 register field value suitable for setting the register. */
155 #define ALT_H2F_ID_PERIPH_ID_0_PN7TO0_SET(value) (((value) << 0) & 0x000000ff)
156 
157 #ifndef __ASSEMBLY__
158 /*
159  * WARNING: The C register and register group struct declarations are provided for
160  * convenience and illustrative purposes. They should, however, be used with
161  * caution as the C language standard provides no guarantees about the alignment or
162  * atomicity of device memory accesses. The recommended practice for writing
163  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
164  * alt_write_word() functions.
165  *
166  * The struct declaration for register ALT_H2F_ID_PERIPH_ID_0.
167  */
168 struct ALT_H2F_ID_PERIPH_ID_0_s
169 {
170  const uint32_t pn7to0 : 8; /* Part Number [7:0] */
171  uint32_t : 24; /* *UNDEFINED* */
172 };
173 
174 /* The typedef declaration for register ALT_H2F_ID_PERIPH_ID_0. */
175 typedef volatile struct ALT_H2F_ID_PERIPH_ID_0_s ALT_H2F_ID_PERIPH_ID_0_t;
176 #endif /* __ASSEMBLY__ */
177 
178 /* The byte offset of the ALT_H2F_ID_PERIPH_ID_0 register from the beginning of the component. */
179 #define ALT_H2F_ID_PERIPH_ID_0_OFST 0xfe0
180 
181 /*
182  * Register : Peripheral ID1 Register - periph_id_1
183  *
184  * Peripheral ID1
185  *
186  * Register Layout
187  *
188  * Bits | Access | Reset | Description
189  * :-------|:-------|:------|:--------------------------------
190  * [7:0] | R | 0xb3 | JEP106[3:0], Part Number [11:8]
191  * [31:8] | ??? | 0x0 | *UNDEFINED*
192  *
193  */
194 /*
195  * Field : JEP106[3:0], Part Number [11:8] - jep3to0_pn11to8
196  *
197  * JEP106[3:0], Part Number [11:8]
198  *
199  * Field Access Macros:
200  *
201  */
202 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8 register field. */
203 #define ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_LSB 0
204 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8 register field. */
205 #define ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_MSB 7
206 /* The width in bits of the ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8 register field. */
207 #define ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_WIDTH 8
208 /* The mask used to set the ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8 register field value. */
209 #define ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_SET_MSK 0x000000ff
210 /* The mask used to clear the ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8 register field value. */
211 #define ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_CLR_MSK 0xffffff00
212 /* The reset value of the ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8 register field. */
213 #define ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_RESET 0xb3
214 /* Extracts the ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8 field value from a register. */
215 #define ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_GET(value) (((value) & 0x000000ff) >> 0)
216 /* Produces a ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8 register field value suitable for setting the register. */
217 #define ALT_H2F_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_SET(value) (((value) << 0) & 0x000000ff)
218 
219 #ifndef __ASSEMBLY__
220 /*
221  * WARNING: The C register and register group struct declarations are provided for
222  * convenience and illustrative purposes. They should, however, be used with
223  * caution as the C language standard provides no guarantees about the alignment or
224  * atomicity of device memory accesses. The recommended practice for writing
225  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
226  * alt_write_word() functions.
227  *
228  * The struct declaration for register ALT_H2F_ID_PERIPH_ID_1.
229  */
230 struct ALT_H2F_ID_PERIPH_ID_1_s
231 {
232  const uint32_t jep3to0_pn11to8 : 8; /* JEP106[3:0], Part Number [11:8] */
233  uint32_t : 24; /* *UNDEFINED* */
234 };
235 
236 /* The typedef declaration for register ALT_H2F_ID_PERIPH_ID_1. */
237 typedef volatile struct ALT_H2F_ID_PERIPH_ID_1_s ALT_H2F_ID_PERIPH_ID_1_t;
238 #endif /* __ASSEMBLY__ */
239 
240 /* The byte offset of the ALT_H2F_ID_PERIPH_ID_1 register from the beginning of the component. */
241 #define ALT_H2F_ID_PERIPH_ID_1_OFST 0xfe4
242 
243 /*
244  * Register : Peripheral ID2 Register - periph_id_2
245  *
246  * Peripheral ID2
247  *
248  * Register Layout
249  *
250  * Bits | Access | Reset | Description
251  * :-------|:-------|:------|:----------------------------------------
252  * [7:0] | R | 0x6b | Revision, JEP106 code flag, JEP106[6:4]
253  * [31:8] | ??? | 0x0 | *UNDEFINED*
254  *
255  */
256 /*
257  * Field : Revision, JEP106 code flag, JEP106[6:4] - rev_jepcode_jep6to4
258  *
259  * Revision, JEP106 code flag, JEP106[6:4]
260  *
261  * Field Access Macros:
262  *
263  */
264 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4 register field. */
265 #define ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_LSB 0
266 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4 register field. */
267 #define ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_MSB 7
268 /* The width in bits of the ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4 register field. */
269 #define ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_WIDTH 8
270 /* The mask used to set the ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4 register field value. */
271 #define ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_SET_MSK 0x000000ff
272 /* The mask used to clear the ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4 register field value. */
273 #define ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_CLR_MSK 0xffffff00
274 /* The reset value of the ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4 register field. */
275 #define ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_RESET 0x6b
276 /* Extracts the ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4 field value from a register. */
277 #define ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_GET(value) (((value) & 0x000000ff) >> 0)
278 /* Produces a ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4 register field value suitable for setting the register. */
279 #define ALT_H2F_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_SET(value) (((value) << 0) & 0x000000ff)
280 
281 #ifndef __ASSEMBLY__
282 /*
283  * WARNING: The C register and register group struct declarations are provided for
284  * convenience and illustrative purposes. They should, however, be used with
285  * caution as the C language standard provides no guarantees about the alignment or
286  * atomicity of device memory accesses. The recommended practice for writing
287  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
288  * alt_write_word() functions.
289  *
290  * The struct declaration for register ALT_H2F_ID_PERIPH_ID_2.
291  */
292 struct ALT_H2F_ID_PERIPH_ID_2_s
293 {
294  const uint32_t rev_jepcode_jep6to4 : 8; /* Revision, JEP106 code flag, JEP106[6:4] */
295  uint32_t : 24; /* *UNDEFINED* */
296 };
297 
298 /* The typedef declaration for register ALT_H2F_ID_PERIPH_ID_2. */
299 typedef volatile struct ALT_H2F_ID_PERIPH_ID_2_s ALT_H2F_ID_PERIPH_ID_2_t;
300 #endif /* __ASSEMBLY__ */
301 
302 /* The byte offset of the ALT_H2F_ID_PERIPH_ID_2 register from the beginning of the component. */
303 #define ALT_H2F_ID_PERIPH_ID_2_OFST 0xfe8
304 
305 /*
306  * Register : Peripheral ID3 Register - periph_id_3
307  *
308  * Peripheral ID3
309  *
310  * Register Layout
311  *
312  * Bits | Access | Reset | Description
313  * :-------|:-------|:------|:----------------------
314  * [3:0] | R | 0x0 | Customer Model Number
315  * [7:4] | R | 0x0 | Revision
316  * [31:8] | ??? | 0x0 | *UNDEFINED*
317  *
318  */
319 /*
320  * Field : Customer Model Number - cust_mod_num
321  *
322  * Customer Model Number
323  *
324  * Field Access Macros:
325  *
326  */
327 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM register field. */
328 #define ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM_LSB 0
329 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM register field. */
330 #define ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM_MSB 3
331 /* The width in bits of the ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM register field. */
332 #define ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM_WIDTH 4
333 /* The mask used to set the ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM register field value. */
334 #define ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM_SET_MSK 0x0000000f
335 /* The mask used to clear the ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM register field value. */
336 #define ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM_CLR_MSK 0xfffffff0
337 /* The reset value of the ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM register field. */
338 #define ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM_RESET 0x0
339 /* Extracts the ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM field value from a register. */
340 #define ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM_GET(value) (((value) & 0x0000000f) >> 0)
341 /* Produces a ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM register field value suitable for setting the register. */
342 #define ALT_H2F_ID_PERIPH_ID_3_CUST_MOD_NUM_SET(value) (((value) << 0) & 0x0000000f)
343 
344 /*
345  * Field : Revision - rev_and
346  *
347  * Revision
348  *
349  * Field Access Macros:
350  *
351  */
352 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_PERIPH_ID_3_REV_AND register field. */
353 #define ALT_H2F_ID_PERIPH_ID_3_REV_AND_LSB 4
354 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_PERIPH_ID_3_REV_AND register field. */
355 #define ALT_H2F_ID_PERIPH_ID_3_REV_AND_MSB 7
356 /* The width in bits of the ALT_H2F_ID_PERIPH_ID_3_REV_AND register field. */
357 #define ALT_H2F_ID_PERIPH_ID_3_REV_AND_WIDTH 4
358 /* The mask used to set the ALT_H2F_ID_PERIPH_ID_3_REV_AND register field value. */
359 #define ALT_H2F_ID_PERIPH_ID_3_REV_AND_SET_MSK 0x000000f0
360 /* The mask used to clear the ALT_H2F_ID_PERIPH_ID_3_REV_AND register field value. */
361 #define ALT_H2F_ID_PERIPH_ID_3_REV_AND_CLR_MSK 0xffffff0f
362 /* The reset value of the ALT_H2F_ID_PERIPH_ID_3_REV_AND register field. */
363 #define ALT_H2F_ID_PERIPH_ID_3_REV_AND_RESET 0x0
364 /* Extracts the ALT_H2F_ID_PERIPH_ID_3_REV_AND field value from a register. */
365 #define ALT_H2F_ID_PERIPH_ID_3_REV_AND_GET(value) (((value) & 0x000000f0) >> 4)
366 /* Produces a ALT_H2F_ID_PERIPH_ID_3_REV_AND register field value suitable for setting the register. */
367 #define ALT_H2F_ID_PERIPH_ID_3_REV_AND_SET(value) (((value) << 4) & 0x000000f0)
368 
369 #ifndef __ASSEMBLY__
370 /*
371  * WARNING: The C register and register group struct declarations are provided for
372  * convenience and illustrative purposes. They should, however, be used with
373  * caution as the C language standard provides no guarantees about the alignment or
374  * atomicity of device memory accesses. The recommended practice for writing
375  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
376  * alt_write_word() functions.
377  *
378  * The struct declaration for register ALT_H2F_ID_PERIPH_ID_3.
379  */
380 struct ALT_H2F_ID_PERIPH_ID_3_s
381 {
382  const uint32_t cust_mod_num : 4; /* Customer Model Number */
383  const uint32_t rev_and : 4; /* Revision */
384  uint32_t : 24; /* *UNDEFINED* */
385 };
386 
387 /* The typedef declaration for register ALT_H2F_ID_PERIPH_ID_3. */
388 typedef volatile struct ALT_H2F_ID_PERIPH_ID_3_s ALT_H2F_ID_PERIPH_ID_3_t;
389 #endif /* __ASSEMBLY__ */
390 
391 /* The byte offset of the ALT_H2F_ID_PERIPH_ID_3 register from the beginning of the component. */
392 #define ALT_H2F_ID_PERIPH_ID_3_OFST 0xfec
393 
394 /*
395  * Register : Component ID0 Register - comp_id_0
396  *
397  * Component ID0
398  *
399  * Register Layout
400  *
401  * Bits | Access | Reset | Description
402  * :-------|:-------|:------|:------------
403  * [7:0] | R | 0xd | Preamble
404  * [31:8] | ??? | 0x0 | *UNDEFINED*
405  *
406  */
407 /*
408  * Field : Preamble - preamble
409  *
410  * Preamble
411  *
412  * Field Access Macros:
413  *
414  */
415 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_COMP_ID_0_PREAMBLE register field. */
416 #define ALT_H2F_ID_COMP_ID_0_PREAMBLE_LSB 0
417 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_COMP_ID_0_PREAMBLE register field. */
418 #define ALT_H2F_ID_COMP_ID_0_PREAMBLE_MSB 7
419 /* The width in bits of the ALT_H2F_ID_COMP_ID_0_PREAMBLE register field. */
420 #define ALT_H2F_ID_COMP_ID_0_PREAMBLE_WIDTH 8
421 /* The mask used to set the ALT_H2F_ID_COMP_ID_0_PREAMBLE register field value. */
422 #define ALT_H2F_ID_COMP_ID_0_PREAMBLE_SET_MSK 0x000000ff
423 /* The mask used to clear the ALT_H2F_ID_COMP_ID_0_PREAMBLE register field value. */
424 #define ALT_H2F_ID_COMP_ID_0_PREAMBLE_CLR_MSK 0xffffff00
425 /* The reset value of the ALT_H2F_ID_COMP_ID_0_PREAMBLE register field. */
426 #define ALT_H2F_ID_COMP_ID_0_PREAMBLE_RESET 0xd
427 /* Extracts the ALT_H2F_ID_COMP_ID_0_PREAMBLE field value from a register. */
428 #define ALT_H2F_ID_COMP_ID_0_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
429 /* Produces a ALT_H2F_ID_COMP_ID_0_PREAMBLE register field value suitable for setting the register. */
430 #define ALT_H2F_ID_COMP_ID_0_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
431 
432 #ifndef __ASSEMBLY__
433 /*
434  * WARNING: The C register and register group struct declarations are provided for
435  * convenience and illustrative purposes. They should, however, be used with
436  * caution as the C language standard provides no guarantees about the alignment or
437  * atomicity of device memory accesses. The recommended practice for writing
438  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
439  * alt_write_word() functions.
440  *
441  * The struct declaration for register ALT_H2F_ID_COMP_ID_0.
442  */
443 struct ALT_H2F_ID_COMP_ID_0_s
444 {
445  const uint32_t preamble : 8; /* Preamble */
446  uint32_t : 24; /* *UNDEFINED* */
447 };
448 
449 /* The typedef declaration for register ALT_H2F_ID_COMP_ID_0. */
450 typedef volatile struct ALT_H2F_ID_COMP_ID_0_s ALT_H2F_ID_COMP_ID_0_t;
451 #endif /* __ASSEMBLY__ */
452 
453 /* The byte offset of the ALT_H2F_ID_COMP_ID_0 register from the beginning of the component. */
454 #define ALT_H2F_ID_COMP_ID_0_OFST 0xff0
455 
456 /*
457  * Register : Component ID1 Register - comp_id_1
458  *
459  * Component ID1
460  *
461  * Register Layout
462  *
463  * Bits | Access | Reset | Description
464  * :-------|:-------|:------|:-------------------------------------
465  * [7:0] | R | 0xf0 | Generic IP component class, Preamble
466  * [31:8] | ??? | 0x0 | *UNDEFINED*
467  *
468  */
469 /*
470  * Field : Generic IP component class, Preamble - genipcompcls_preamble
471  *
472  * Generic IP component class, Preamble
473  *
474  * Field Access Macros:
475  *
476  */
477 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE register field. */
478 #define ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_LSB 0
479 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE register field. */
480 #define ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_MSB 7
481 /* The width in bits of the ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE register field. */
482 #define ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_WIDTH 8
483 /* The mask used to set the ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE register field value. */
484 #define ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_SET_MSK 0x000000ff
485 /* The mask used to clear the ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE register field value. */
486 #define ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_CLR_MSK 0xffffff00
487 /* The reset value of the ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE register field. */
488 #define ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_RESET 0xf0
489 /* Extracts the ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE field value from a register. */
490 #define ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
491 /* Produces a ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE register field value suitable for setting the register. */
492 #define ALT_H2F_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
493 
494 #ifndef __ASSEMBLY__
495 /*
496  * WARNING: The C register and register group struct declarations are provided for
497  * convenience and illustrative purposes. They should, however, be used with
498  * caution as the C language standard provides no guarantees about the alignment or
499  * atomicity of device memory accesses. The recommended practice for writing
500  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
501  * alt_write_word() functions.
502  *
503  * The struct declaration for register ALT_H2F_ID_COMP_ID_1.
504  */
505 struct ALT_H2F_ID_COMP_ID_1_s
506 {
507  const uint32_t genipcompcls_preamble : 8; /* Generic IP component class, Preamble */
508  uint32_t : 24; /* *UNDEFINED* */
509 };
510 
511 /* The typedef declaration for register ALT_H2F_ID_COMP_ID_1. */
512 typedef volatile struct ALT_H2F_ID_COMP_ID_1_s ALT_H2F_ID_COMP_ID_1_t;
513 #endif /* __ASSEMBLY__ */
514 
515 /* The byte offset of the ALT_H2F_ID_COMP_ID_1 register from the beginning of the component. */
516 #define ALT_H2F_ID_COMP_ID_1_OFST 0xff4
517 
518 /*
519  * Register : Component ID2 Register - comp_id_2
520  *
521  * Component ID2
522  *
523  * Register Layout
524  *
525  * Bits | Access | Reset | Description
526  * :-------|:-------|:------|:------------
527  * [7:0] | R | 0x5 | Preamble
528  * [31:8] | ??? | 0x0 | *UNDEFINED*
529  *
530  */
531 /*
532  * Field : Preamble - preamble
533  *
534  * Preamble
535  *
536  * Field Access Macros:
537  *
538  */
539 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_COMP_ID_2_PREAMBLE register field. */
540 #define ALT_H2F_ID_COMP_ID_2_PREAMBLE_LSB 0
541 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_COMP_ID_2_PREAMBLE register field. */
542 #define ALT_H2F_ID_COMP_ID_2_PREAMBLE_MSB 7
543 /* The width in bits of the ALT_H2F_ID_COMP_ID_2_PREAMBLE register field. */
544 #define ALT_H2F_ID_COMP_ID_2_PREAMBLE_WIDTH 8
545 /* The mask used to set the ALT_H2F_ID_COMP_ID_2_PREAMBLE register field value. */
546 #define ALT_H2F_ID_COMP_ID_2_PREAMBLE_SET_MSK 0x000000ff
547 /* The mask used to clear the ALT_H2F_ID_COMP_ID_2_PREAMBLE register field value. */
548 #define ALT_H2F_ID_COMP_ID_2_PREAMBLE_CLR_MSK 0xffffff00
549 /* The reset value of the ALT_H2F_ID_COMP_ID_2_PREAMBLE register field. */
550 #define ALT_H2F_ID_COMP_ID_2_PREAMBLE_RESET 0x5
551 /* Extracts the ALT_H2F_ID_COMP_ID_2_PREAMBLE field value from a register. */
552 #define ALT_H2F_ID_COMP_ID_2_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
553 /* Produces a ALT_H2F_ID_COMP_ID_2_PREAMBLE register field value suitable for setting the register. */
554 #define ALT_H2F_ID_COMP_ID_2_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
555 
556 #ifndef __ASSEMBLY__
557 /*
558  * WARNING: The C register and register group struct declarations are provided for
559  * convenience and illustrative purposes. They should, however, be used with
560  * caution as the C language standard provides no guarantees about the alignment or
561  * atomicity of device memory accesses. The recommended practice for writing
562  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
563  * alt_write_word() functions.
564  *
565  * The struct declaration for register ALT_H2F_ID_COMP_ID_2.
566  */
567 struct ALT_H2F_ID_COMP_ID_2_s
568 {
569  const uint32_t preamble : 8; /* Preamble */
570  uint32_t : 24; /* *UNDEFINED* */
571 };
572 
573 /* The typedef declaration for register ALT_H2F_ID_COMP_ID_2. */
574 typedef volatile struct ALT_H2F_ID_COMP_ID_2_s ALT_H2F_ID_COMP_ID_2_t;
575 #endif /* __ASSEMBLY__ */
576 
577 /* The byte offset of the ALT_H2F_ID_COMP_ID_2 register from the beginning of the component. */
578 #define ALT_H2F_ID_COMP_ID_2_OFST 0xff8
579 
580 /*
581  * Register : Component ID3 Register - comp_id_3
582  *
583  * Component ID3
584  *
585  * Register Layout
586  *
587  * Bits | Access | Reset | Description
588  * :-------|:-------|:------|:------------
589  * [7:0] | R | 0xb1 | Preamble
590  * [31:8] | ??? | 0x0 | *UNDEFINED*
591  *
592  */
593 /*
594  * Field : Preamble - preamble
595  *
596  * Preamble
597  *
598  * Field Access Macros:
599  *
600  */
601 /* The Least Significant Bit (LSB) position of the ALT_H2F_ID_COMP_ID_3_PREAMBLE register field. */
602 #define ALT_H2F_ID_COMP_ID_3_PREAMBLE_LSB 0
603 /* The Most Significant Bit (MSB) position of the ALT_H2F_ID_COMP_ID_3_PREAMBLE register field. */
604 #define ALT_H2F_ID_COMP_ID_3_PREAMBLE_MSB 7
605 /* The width in bits of the ALT_H2F_ID_COMP_ID_3_PREAMBLE register field. */
606 #define ALT_H2F_ID_COMP_ID_3_PREAMBLE_WIDTH 8
607 /* The mask used to set the ALT_H2F_ID_COMP_ID_3_PREAMBLE register field value. */
608 #define ALT_H2F_ID_COMP_ID_3_PREAMBLE_SET_MSK 0x000000ff
609 /* The mask used to clear the ALT_H2F_ID_COMP_ID_3_PREAMBLE register field value. */
610 #define ALT_H2F_ID_COMP_ID_3_PREAMBLE_CLR_MSK 0xffffff00
611 /* The reset value of the ALT_H2F_ID_COMP_ID_3_PREAMBLE register field. */
612 #define ALT_H2F_ID_COMP_ID_3_PREAMBLE_RESET 0xb1
613 /* Extracts the ALT_H2F_ID_COMP_ID_3_PREAMBLE field value from a register. */
614 #define ALT_H2F_ID_COMP_ID_3_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
615 /* Produces a ALT_H2F_ID_COMP_ID_3_PREAMBLE register field value suitable for setting the register. */
616 #define ALT_H2F_ID_COMP_ID_3_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
617 
618 #ifndef __ASSEMBLY__
619 /*
620  * WARNING: The C register and register group struct declarations are provided for
621  * convenience and illustrative purposes. They should, however, be used with
622  * caution as the C language standard provides no guarantees about the alignment or
623  * atomicity of device memory accesses. The recommended practice for writing
624  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
625  * alt_write_word() functions.
626  *
627  * The struct declaration for register ALT_H2F_ID_COMP_ID_3.
628  */
629 struct ALT_H2F_ID_COMP_ID_3_s
630 {
631  const uint32_t preamble : 8; /* Preamble */
632  uint32_t : 24; /* *UNDEFINED* */
633 };
634 
635 /* The typedef declaration for register ALT_H2F_ID_COMP_ID_3. */
636 typedef volatile struct ALT_H2F_ID_COMP_ID_3_s ALT_H2F_ID_COMP_ID_3_t;
637 #endif /* __ASSEMBLY__ */
638 
639 /* The byte offset of the ALT_H2F_ID_COMP_ID_3 register from the beginning of the component. */
640 #define ALT_H2F_ID_COMP_ID_3_OFST 0xffc
641 
642 #ifndef __ASSEMBLY__
643 /*
644  * WARNING: The C register and register group struct declarations are provided for
645  * convenience and illustrative purposes. They should, however, be used with
646  * caution as the C language standard provides no guarantees about the alignment or
647  * atomicity of device memory accesses. The recommended practice for writing
648  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
649  * alt_write_word() functions.
650  *
651  * The struct declaration for register group ALT_H2F_IDGRP.
652  */
653 struct ALT_H2F_IDGRP_s
654 {
655  volatile uint32_t _pad_0x0_0xfcf[1012]; /* *UNDEFINED* */
656  ALT_H2F_ID_PERIPH_ID_4_t periph_id_4; /* ALT_H2F_ID_PERIPH_ID_4 */
657  volatile uint32_t _pad_0xfd4_0xfdf[3]; /* *UNDEFINED* */
658  ALT_H2F_ID_PERIPH_ID_0_t periph_id_0; /* ALT_H2F_ID_PERIPH_ID_0 */
659  ALT_H2F_ID_PERIPH_ID_1_t periph_id_1; /* ALT_H2F_ID_PERIPH_ID_1 */
660  ALT_H2F_ID_PERIPH_ID_2_t periph_id_2; /* ALT_H2F_ID_PERIPH_ID_2 */
661  ALT_H2F_ID_PERIPH_ID_3_t periph_id_3; /* ALT_H2F_ID_PERIPH_ID_3 */
662  ALT_H2F_ID_COMP_ID_0_t comp_id_0; /* ALT_H2F_ID_COMP_ID_0 */
663  ALT_H2F_ID_COMP_ID_1_t comp_id_1; /* ALT_H2F_ID_COMP_ID_1 */
664  ALT_H2F_ID_COMP_ID_2_t comp_id_2; /* ALT_H2F_ID_COMP_ID_2 */
665  ALT_H2F_ID_COMP_ID_3_t comp_id_3; /* ALT_H2F_ID_COMP_ID_3 */
666 };
667 
668 /* The typedef declaration for register group ALT_H2F_IDGRP. */
669 typedef volatile struct ALT_H2F_IDGRP_s ALT_H2F_IDGRP_t;
670 /* The struct declaration for the raw register contents of register group ALT_H2F_IDGRP. */
671 struct ALT_H2F_IDGRP_raw_s
672 {
673  uint32_t _pad_0x0_0xfcf[1012]; /* *UNDEFINED* */
674  volatile uint32_t periph_id_4; /* ALT_H2F_ID_PERIPH_ID_4 */
675  uint32_t _pad_0xfd4_0xfdf[3]; /* *UNDEFINED* */
676  volatile uint32_t periph_id_0; /* ALT_H2F_ID_PERIPH_ID_0 */
677  volatile uint32_t periph_id_1; /* ALT_H2F_ID_PERIPH_ID_1 */
678  volatile uint32_t periph_id_2; /* ALT_H2F_ID_PERIPH_ID_2 */
679  volatile uint32_t periph_id_3; /* ALT_H2F_ID_PERIPH_ID_3 */
680  volatile uint32_t comp_id_0; /* ALT_H2F_ID_COMP_ID_0 */
681  volatile uint32_t comp_id_1; /* ALT_H2F_ID_COMP_ID_1 */
682  volatile uint32_t comp_id_2; /* ALT_H2F_ID_COMP_ID_2 */
683  volatile uint32_t comp_id_3; /* ALT_H2F_ID_COMP_ID_3 */
684 };
685 
686 /* The typedef declaration for the raw register contents of register group ALT_H2F_IDGRP. */
687 typedef volatile struct ALT_H2F_IDGRP_raw_s ALT_H2F_IDGRP_raw_t;
688 #endif /* __ASSEMBLY__ */
689 
690 
691 /*
692  * Register Group : Master Register Group - ALT_H2F_MSTGRP
693  * Master Register Group
694  *
695  * Registers associated with master interfaces.
696  *
697  */
698 /*
699  * Register Group : 32-bit Master - ALT_H2F_MST_B32
700  * 32-bit Master
701  *
702  * Registers associated with the 32-bit AXI master interface.
703  *
704  * These registers are only active when the HPS2FPGA AXI Bridge is configured with
705  * a 32-bit FPGA AXI master interface.
706  *
707  */
708 /*
709  * Register : Functionality Modification 2 Register - fn_mod2
710  *
711  * Controls bypass merge of upsizing/downsizing.
712  *
713  * Register Layout
714  *
715  * Bits | Access | Reset | Description
716  * :-------|:-------|:------|:-------------
717  * [0] | RW | 0x0 | Bypass Merge
718  * [31:1] | ??? | 0x0 | *UNDEFINED*
719  *
720  */
721 /*
722  * Field : Bypass Merge - bypass_merge
723  *
724  * Controls bypass merge of upsizing/downsizing.
725  *
726  * Field Enumeration Values:
727  *
728  * Enum | Value | Description
729  * :---------------------------------------|:------|:-------------------------------------------------
730  * ALT_H2F_FN_MOD2_BYPASS_MERGE_E_ALTER | 0x0 | The network can alter transactions.
731  * ALT_H2F_FN_MOD2_BYPASS_MERGE_E_NOALTER | 0x1 | The network does not alter any transactions that
732  * : | | could pass through the upsizer legally without
733  * : | | alteration.
734  *
735  * Field Access Macros:
736  *
737  */
738 /*
739  * Enumerated value for register field ALT_H2F_FN_MOD2_BYPASS_MERGE
740  *
741  * The network can alter transactions.
742  */
743 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_E_ALTER 0x0
744 /*
745  * Enumerated value for register field ALT_H2F_FN_MOD2_BYPASS_MERGE
746  *
747  * The network does not alter any transactions that could pass through the upsizer
748  * legally without alteration.
749  */
750 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_E_NOALTER 0x1
751 
752 /* The Least Significant Bit (LSB) position of the ALT_H2F_FN_MOD2_BYPASS_MERGE register field. */
753 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_LSB 0
754 /* The Most Significant Bit (MSB) position of the ALT_H2F_FN_MOD2_BYPASS_MERGE register field. */
755 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_MSB 0
756 /* The width in bits of the ALT_H2F_FN_MOD2_BYPASS_MERGE register field. */
757 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_WIDTH 1
758 /* The mask used to set the ALT_H2F_FN_MOD2_BYPASS_MERGE register field value. */
759 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_SET_MSK 0x00000001
760 /* The mask used to clear the ALT_H2F_FN_MOD2_BYPASS_MERGE register field value. */
761 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_CLR_MSK 0xfffffffe
762 /* The reset value of the ALT_H2F_FN_MOD2_BYPASS_MERGE register field. */
763 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_RESET 0x0
764 /* Extracts the ALT_H2F_FN_MOD2_BYPASS_MERGE field value from a register. */
765 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_GET(value) (((value) & 0x00000001) >> 0)
766 /* Produces a ALT_H2F_FN_MOD2_BYPASS_MERGE register field value suitable for setting the register. */
767 #define ALT_H2F_FN_MOD2_BYPASS_MERGE_SET(value) (((value) << 0) & 0x00000001)
768 
769 #ifndef __ASSEMBLY__
770 /*
771  * WARNING: The C register and register group struct declarations are provided for
772  * convenience and illustrative purposes. They should, however, be used with
773  * caution as the C language standard provides no guarantees about the alignment or
774  * atomicity of device memory accesses. The recommended practice for writing
775  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
776  * alt_write_word() functions.
777  *
778  * The struct declaration for register ALT_H2F_FN_MOD2.
779  */
780 struct ALT_H2F_FN_MOD2_s
781 {
782  uint32_t bypass_merge : 1; /* Bypass Merge */
783  uint32_t : 31; /* *UNDEFINED* */
784 };
785 
786 /* The typedef declaration for register ALT_H2F_FN_MOD2. */
787 typedef volatile struct ALT_H2F_FN_MOD2_s ALT_H2F_FN_MOD2_t;
788 #endif /* __ASSEMBLY__ */
789 
790 /* The byte offset of the ALT_H2F_FN_MOD2 register from the beginning of the component. */
791 #define ALT_H2F_FN_MOD2_OFST 0x24
792 /* The address of the ALT_H2F_FN_MOD2 register. */
793 #define ALT_H2F_FN_MOD2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_H2F_FN_MOD2_OFST))
794 
795 /*
796  * Register : Issuing Functionality Modification Register - fn_mod
797  *
798  * Sets the block issuing capability to multiple or single outstanding
799  * transactions.
800  *
801  * Register Layout
802  *
803  * Bits | Access | Reset | Description
804  * :-------|:-------|:------|:------------------
805  * [0] | RW | 0x0 | ALT_H2F_FN_MOD_RD
806  * [1] | RW | 0x0 | ALT_H2F_FN_MOD_WR
807  * [31:2] | ??? | 0x0 | *UNDEFINED*
808  *
809  */
810 /*
811  * Field : rd
812  *
813  * Field Enumeration Values:
814  *
815  * Enum | Value | Description
816  * :---------------------------|:------|:-------------------------------------------
817  * ALT_H2F_FN_MOD_RD_E_MULT | 0x0 | Multiple outstanding read transactions
818  * ALT_H2F_FN_MOD_RD_E_SINGLE | 0x1 | Only a single outstanding read transaction
819  *
820  * Field Access Macros:
821  *
822  */
823 /*
824  * Enumerated value for register field ALT_H2F_FN_MOD_RD
825  *
826  * Multiple outstanding read transactions
827  */
828 #define ALT_H2F_FN_MOD_RD_E_MULT 0x0
829 /*
830  * Enumerated value for register field ALT_H2F_FN_MOD_RD
831  *
832  * Only a single outstanding read transaction
833  */
834 #define ALT_H2F_FN_MOD_RD_E_SINGLE 0x1
835 
836 /* The Least Significant Bit (LSB) position of the ALT_H2F_FN_MOD_RD register field. */
837 #define ALT_H2F_FN_MOD_RD_LSB 0
838 /* The Most Significant Bit (MSB) position of the ALT_H2F_FN_MOD_RD register field. */
839 #define ALT_H2F_FN_MOD_RD_MSB 0
840 /* The width in bits of the ALT_H2F_FN_MOD_RD register field. */
841 #define ALT_H2F_FN_MOD_RD_WIDTH 1
842 /* The mask used to set the ALT_H2F_FN_MOD_RD register field value. */
843 #define ALT_H2F_FN_MOD_RD_SET_MSK 0x00000001
844 /* The mask used to clear the ALT_H2F_FN_MOD_RD register field value. */
845 #define ALT_H2F_FN_MOD_RD_CLR_MSK 0xfffffffe
846 /* The reset value of the ALT_H2F_FN_MOD_RD register field. */
847 #define ALT_H2F_FN_MOD_RD_RESET 0x0
848 /* Extracts the ALT_H2F_FN_MOD_RD field value from a register. */
849 #define ALT_H2F_FN_MOD_RD_GET(value) (((value) & 0x00000001) >> 0)
850 /* Produces a ALT_H2F_FN_MOD_RD register field value suitable for setting the register. */
851 #define ALT_H2F_FN_MOD_RD_SET(value) (((value) << 0) & 0x00000001)
852 
853 /*
854  * Field : wr
855  *
856  * Field Enumeration Values:
857  *
858  * Enum | Value | Description
859  * :---------------------------|:------|:--------------------------------------------
860  * ALT_H2F_FN_MOD_WR_E_MULT | 0x0 | Multiple outstanding write transactions
861  * ALT_H2F_FN_MOD_WR_E_SINGLE | 0x1 | Only a single outstanding write transaction
862  *
863  * Field Access Macros:
864  *
865  */
866 /*
867  * Enumerated value for register field ALT_H2F_FN_MOD_WR
868  *
869  * Multiple outstanding write transactions
870  */
871 #define ALT_H2F_FN_MOD_WR_E_MULT 0x0
872 /*
873  * Enumerated value for register field ALT_H2F_FN_MOD_WR
874  *
875  * Only a single outstanding write transaction
876  */
877 #define ALT_H2F_FN_MOD_WR_E_SINGLE 0x1
878 
879 /* The Least Significant Bit (LSB) position of the ALT_H2F_FN_MOD_WR register field. */
880 #define ALT_H2F_FN_MOD_WR_LSB 1
881 /* The Most Significant Bit (MSB) position of the ALT_H2F_FN_MOD_WR register field. */
882 #define ALT_H2F_FN_MOD_WR_MSB 1
883 /* The width in bits of the ALT_H2F_FN_MOD_WR register field. */
884 #define ALT_H2F_FN_MOD_WR_WIDTH 1
885 /* The mask used to set the ALT_H2F_FN_MOD_WR register field value. */
886 #define ALT_H2F_FN_MOD_WR_SET_MSK 0x00000002
887 /* The mask used to clear the ALT_H2F_FN_MOD_WR register field value. */
888 #define ALT_H2F_FN_MOD_WR_CLR_MSK 0xfffffffd
889 /* The reset value of the ALT_H2F_FN_MOD_WR register field. */
890 #define ALT_H2F_FN_MOD_WR_RESET 0x0
891 /* Extracts the ALT_H2F_FN_MOD_WR field value from a register. */
892 #define ALT_H2F_FN_MOD_WR_GET(value) (((value) & 0x00000002) >> 1)
893 /* Produces a ALT_H2F_FN_MOD_WR register field value suitable for setting the register. */
894 #define ALT_H2F_FN_MOD_WR_SET(value) (((value) << 1) & 0x00000002)
895 
896 #ifndef __ASSEMBLY__
897 /*
898  * WARNING: The C register and register group struct declarations are provided for
899  * convenience and illustrative purposes. They should, however, be used with
900  * caution as the C language standard provides no guarantees about the alignment or
901  * atomicity of device memory accesses. The recommended practice for writing
902  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
903  * alt_write_word() functions.
904  *
905  * The struct declaration for register ALT_H2F_FN_MOD.
906  */
907 struct ALT_H2F_FN_MOD_s
908 {
909  uint32_t rd : 1; /* ALT_H2F_FN_MOD_RD */
910  uint32_t wr : 1; /* ALT_H2F_FN_MOD_WR */
911  uint32_t : 30; /* *UNDEFINED* */
912 };
913 
914 /* The typedef declaration for register ALT_H2F_FN_MOD. */
915 typedef volatile struct ALT_H2F_FN_MOD_s ALT_H2F_FN_MOD_t;
916 #endif /* __ASSEMBLY__ */
917 
918 /* The byte offset of the ALT_H2F_FN_MOD register from the beginning of the component. */
919 #define ALT_H2F_FN_MOD_OFST 0x108
920 /* The address of the ALT_H2F_FN_MOD register. */
921 #define ALT_H2F_FN_MOD_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_H2F_FN_MOD_OFST))
922 
923 #ifndef __ASSEMBLY__
924 /*
925  * WARNING: The C register and register group struct declarations are provided for
926  * convenience and illustrative purposes. They should, however, be used with
927  * caution as the C language standard provides no guarantees about the alignment or
928  * atomicity of device memory accesses. The recommended practice for writing
929  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
930  * alt_write_word() functions.
931  *
932  * The struct declaration for register group ALT_H2F_MST_B32.
933  */
934 struct ALT_H2F_MST_B32_s
935 {
936  volatile uint32_t _pad_0x0_0x23[9]; /* *UNDEFINED* */
937  ALT_H2F_FN_MOD2_t fn_mod2; /* ALT_H2F_FN_MOD2 */
938  volatile uint32_t _pad_0x28_0x107[56]; /* *UNDEFINED* */
939  ALT_H2F_FN_MOD_t fn_mod; /* ALT_H2F_FN_MOD */
940 };
941 
942 /* The typedef declaration for register group ALT_H2F_MST_B32. */
943 typedef volatile struct ALT_H2F_MST_B32_s ALT_H2F_MST_B32_t;
944 /* The struct declaration for the raw register contents of register group ALT_H2F_MST_B32. */
945 struct ALT_H2F_MST_B32_raw_s
946 {
947  uint32_t _pad_0x0_0x23[9]; /* *UNDEFINED* */
948  volatile uint32_t fn_mod2; /* ALT_H2F_FN_MOD2 */
949  uint32_t _pad_0x28_0x107[56]; /* *UNDEFINED* */
950  volatile uint32_t fn_mod; /* ALT_H2F_FN_MOD */
951 };
952 
953 /* The typedef declaration for the raw register contents of register group ALT_H2F_MST_B32. */
954 typedef volatile struct ALT_H2F_MST_B32_raw_s ALT_H2F_MST_B32_raw_t;
955 #endif /* __ASSEMBLY__ */
956 
957 
958 /*
959  * Register Group : 128-bit Master - ALT_H2F_MST_B128
960  * 128-bit Master
961  *
962  * Registers associated with the 128-bit AXI master interface.
963  *
964  * These registers are only active when the HPS2FPGA AXI Bridge is configured with
965  * a 128-bit FPGA AXI master interface.
966  *
967  */
968 #ifndef __ASSEMBLY__
969 /*
970  * WARNING: The C register and register group struct declarations are provided for
971  * convenience and illustrative purposes. They should, however, be used with
972  * caution as the C language standard provides no guarantees about the alignment or
973  * atomicity of device memory accesses. The recommended practice for writing
974  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
975  * alt_write_word() functions.
976  *
977  * The struct declaration for register group ALT_H2F_MST_B128.
978  */
979 struct ALT_H2F_MST_B128_s
980 {
981  volatile uint32_t _pad_0x0_0x23[9]; /* *UNDEFINED* */
982  ALT_H2F_FN_MOD2_t fn_mod2; /* ALT_H2F_FN_MOD2 */
983  volatile uint32_t _pad_0x28_0x107[56]; /* *UNDEFINED* */
984  ALT_H2F_FN_MOD_t fn_mod; /* ALT_H2F_FN_MOD */
985 };
986 
987 /* The typedef declaration for register group ALT_H2F_MST_B128. */
988 typedef volatile struct ALT_H2F_MST_B128_s ALT_H2F_MST_B128_t;
989 /* The struct declaration for the raw register contents of register group ALT_H2F_MST_B128. */
990 struct ALT_H2F_MST_B128_raw_s
991 {
992  uint32_t _pad_0x0_0x23[9]; /* *UNDEFINED* */
993  volatile uint32_t fn_mod2; /* ALT_H2F_FN_MOD2 */
994  uint32_t _pad_0x28_0x107[56]; /* *UNDEFINED* */
995  volatile uint32_t fn_mod; /* ALT_H2F_FN_MOD */
996 };
997 
998 /* The typedef declaration for the raw register contents of register group ALT_H2F_MST_B128. */
999 typedef volatile struct ALT_H2F_MST_B128_raw_s ALT_H2F_MST_B128_raw_t;
1000 #endif /* __ASSEMBLY__ */
1001 
1002 
1003 #ifndef __ASSEMBLY__
1004 /*
1005  * WARNING: The C register and register group struct declarations are provided for
1006  * convenience and illustrative purposes. They should, however, be used with
1007  * caution as the C language standard provides no guarantees about the alignment or
1008  * atomicity of device memory accesses. The recommended practice for writing
1009  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1010  * alt_write_word() functions.
1011  *
1012  * The struct declaration for register group ALT_H2F_MSTGRP.
1013  */
1014 struct ALT_H2F_MSTGRP_s
1015 {
1016  ALT_H2F_MST_B32_t mastergrp_b32; /* ALT_H2F_MST_B32 */
1017  volatile uint32_t _pad_0x10c_0x1fff[1981]; /* *UNDEFINED* */
1018  ALT_H2F_MST_B128_t mastergrp_b128; /* ALT_H2F_MST_B128 */
1019 };
1020 
1021 /* The typedef declaration for register group ALT_H2F_MSTGRP. */
1022 typedef volatile struct ALT_H2F_MSTGRP_s ALT_H2F_MSTGRP_t;
1023 /* The struct declaration for the raw register contents of register group ALT_H2F_MSTGRP. */
1024 struct ALT_H2F_MSTGRP_raw_s
1025 {
1026  ALT_H2F_MST_B32_raw_t mastergrp_b32; /* ALT_H2F_MST_B32 */
1027  uint32_t _pad_0x10c_0x1fff[1981]; /* *UNDEFINED* */
1028  ALT_H2F_MST_B128_raw_t mastergrp_b128; /* ALT_H2F_MST_B128 */
1029 };
1030 
1031 /* The typedef declaration for the raw register contents of register group ALT_H2F_MSTGRP. */
1032 typedef volatile struct ALT_H2F_MSTGRP_raw_s ALT_H2F_MSTGRP_raw_t;
1033 #endif /* __ASSEMBLY__ */
1034 
1035 
1036 #ifndef __ASSEMBLY__
1037 /*
1038  * WARNING: The C register and register group struct declarations are provided for
1039  * convenience and illustrative purposes. They should, however, be used with
1040  * caution as the C language standard provides no guarantees about the alignment or
1041  * atomicity of device memory accesses. The recommended practice for writing
1042  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1043  * alt_write_word() functions.
1044  *
1045  * The struct declaration for register group ALT_H2F.
1046  */
1047 struct ALT_H2F_s
1048 {
1049  volatile uint32_t _pad_0x0_0xfff[1024]; /* *UNDEFINED* */
1050  ALT_H2F_IDGRP_t idgrp; /* ALT_H2F_IDGRP */
1051  ALT_H2F_MSTGRP_t mastergrp; /* ALT_H2F_MSTGRP */
1052  volatile uint32_t _pad_0x410c_0x8000[4029]; /* *UNDEFINED* */
1053 };
1054 
1055 /* The typedef declaration for register group ALT_H2F. */
1056 typedef volatile struct ALT_H2F_s ALT_H2F_t;
1057 /* The struct declaration for the raw register contents of register group ALT_H2F. */
1058 struct ALT_H2F_raw_s
1059 {
1060  uint32_t _pad_0x0_0xfff[1024]; /* *UNDEFINED* */
1061  ALT_H2F_IDGRP_raw_t idgrp; /* ALT_H2F_IDGRP */
1062  ALT_H2F_MSTGRP_raw_t mastergrp; /* ALT_H2F_MSTGRP */
1063  uint32_t _pad_0x410c_0x8000[4029]; /* *UNDEFINED* */
1064 };
1065 
1066 /* The typedef declaration for the raw register contents of register group ALT_H2F. */
1067 typedef volatile struct ALT_H2F_raw_s ALT_H2F_raw_t;
1068 #endif /* __ASSEMBLY__ */
1069 
1070 
1071 #ifdef __cplusplus
1072 }
1073 #endif /* __cplusplus */
1074 #endif /* __ALTERA_ALT_H2F_H__ */
1075