35 #ifndef __ALTERA_ALT_L3_H__
36 #define __ALTERA_ALT_L3_H__
101 #define ALT_L3_REMAP_MPUZERO_E_BOOTROM 0x0
109 #define ALT_L3_REMAP_MPUZERO_E_OCRAM 0x1
112 #define ALT_L3_REMAP_MPUZERO_LSB 0
114 #define ALT_L3_REMAP_MPUZERO_MSB 0
116 #define ALT_L3_REMAP_MPUZERO_WIDTH 1
118 #define ALT_L3_REMAP_MPUZERO_SET_MSK 0x00000001
120 #define ALT_L3_REMAP_MPUZERO_CLR_MSK 0xfffffffe
122 #define ALT_L3_REMAP_MPUZERO_RESET 0x0
124 #define ALT_L3_REMAP_MPUZERO_GET(value) (((value) & 0x00000001) >> 0)
126 #define ALT_L3_REMAP_MPUZERO_SET(value) (((value) << 0) & 0x00000001)
156 #define ALT_L3_REMAP_NONMPUZERO_E_SDRAM 0x0
164 #define ALT_L3_REMAP_NONMPUZERO_E_OCRAM 0x1
167 #define ALT_L3_REMAP_NONMPUZERO_LSB 1
169 #define ALT_L3_REMAP_NONMPUZERO_MSB 1
171 #define ALT_L3_REMAP_NONMPUZERO_WIDTH 1
173 #define ALT_L3_REMAP_NONMPUZERO_SET_MSK 0x00000002
175 #define ALT_L3_REMAP_NONMPUZERO_CLR_MSK 0xfffffffd
177 #define ALT_L3_REMAP_NONMPUZERO_RESET 0x0
179 #define ALT_L3_REMAP_NONMPUZERO_GET(value) (((value) & 0x00000002) >> 1)
181 #define ALT_L3_REMAP_NONMPUZERO_SET(value) (((value) << 1) & 0x00000002)
207 #define ALT_L3_REMAP_H2F_E_INVISIBLE 0x0
213 #define ALT_L3_REMAP_H2F_E_VISIBLE 0x1
216 #define ALT_L3_REMAP_H2F_LSB 3
218 #define ALT_L3_REMAP_H2F_MSB 3
220 #define ALT_L3_REMAP_H2F_WIDTH 1
222 #define ALT_L3_REMAP_H2F_SET_MSK 0x00000008
224 #define ALT_L3_REMAP_H2F_CLR_MSK 0xfffffff7
226 #define ALT_L3_REMAP_H2F_RESET 0x0
228 #define ALT_L3_REMAP_H2F_GET(value) (((value) & 0x00000008) >> 3)
230 #define ALT_L3_REMAP_H2F_SET(value) (((value) << 3) & 0x00000008)
257 #define ALT_L3_REMAP_LWH2F_E_INVISIBLE 0x0
263 #define ALT_L3_REMAP_LWH2F_E_VISIBLE 0x1
266 #define ALT_L3_REMAP_LWH2F_LSB 4
268 #define ALT_L3_REMAP_LWH2F_MSB 4
270 #define ALT_L3_REMAP_LWH2F_WIDTH 1
272 #define ALT_L3_REMAP_LWH2F_SET_MSK 0x00000010
274 #define ALT_L3_REMAP_LWH2F_CLR_MSK 0xffffffef
276 #define ALT_L3_REMAP_LWH2F_RESET 0x0
278 #define ALT_L3_REMAP_LWH2F_GET(value) (((value) & 0x00000010) >> 4)
280 #define ALT_L3_REMAP_LWH2F_SET(value) (((value) << 4) & 0x00000010)
293 struct ALT_L3_REMAP_s
295 uint32_t mpuzero : 1;
296 uint32_t nonmpuzero : 1;
298 uint32_t hps2fpga : 1;
299 uint32_t lwhps2fpga : 1;
304 typedef volatile struct ALT_L3_REMAP_s ALT_L3_REMAP_t;
308 #define ALT_L3_REMAP_OFST 0x0
355 #define ALT_L3_SEC_L4MAIN_SPIS0_E_SECURE 0x0
361 #define ALT_L3_SEC_L4MAIN_SPIS0_E_NONSECURE 0x1
364 #define ALT_L3_SEC_L4MAIN_SPIS0_LSB 0
366 #define ALT_L3_SEC_L4MAIN_SPIS0_MSB 0
368 #define ALT_L3_SEC_L4MAIN_SPIS0_WIDTH 1
370 #define ALT_L3_SEC_L4MAIN_SPIS0_SET_MSK 0x00000001
372 #define ALT_L3_SEC_L4MAIN_SPIS0_CLR_MSK 0xfffffffe
374 #define ALT_L3_SEC_L4MAIN_SPIS0_RESET 0x0
376 #define ALT_L3_SEC_L4MAIN_SPIS0_GET(value) (((value) & 0x00000001) >> 0)
378 #define ALT_L3_SEC_L4MAIN_SPIS0_SET(value) (((value) << 0) & 0x00000001)
402 #define ALT_L3_SEC_L4MAIN_SPIS1_E_SECURE 0x0
408 #define ALT_L3_SEC_L4MAIN_SPIS1_E_NONSECURE 0x1
411 #define ALT_L3_SEC_L4MAIN_SPIS1_LSB 1
413 #define ALT_L3_SEC_L4MAIN_SPIS1_MSB 1
415 #define ALT_L3_SEC_L4MAIN_SPIS1_WIDTH 1
417 #define ALT_L3_SEC_L4MAIN_SPIS1_SET_MSK 0x00000002
419 #define ALT_L3_SEC_L4MAIN_SPIS1_CLR_MSK 0xfffffffd
421 #define ALT_L3_SEC_L4MAIN_SPIS1_RESET 0x0
423 #define ALT_L3_SEC_L4MAIN_SPIS1_GET(value) (((value) & 0x00000002) >> 1)
425 #define ALT_L3_SEC_L4MAIN_SPIS1_SET(value) (((value) << 1) & 0x00000002)
449 #define ALT_L3_SEC_L4MAIN_DMASECURE_E_SECURE 0x0
455 #define ALT_L3_SEC_L4MAIN_DMASECURE_E_NONSECURE 0x1
458 #define ALT_L3_SEC_L4MAIN_DMASECURE_LSB 2
460 #define ALT_L3_SEC_L4MAIN_DMASECURE_MSB 2
462 #define ALT_L3_SEC_L4MAIN_DMASECURE_WIDTH 1
464 #define ALT_L3_SEC_L4MAIN_DMASECURE_SET_MSK 0x00000004
466 #define ALT_L3_SEC_L4MAIN_DMASECURE_CLR_MSK 0xfffffffb
468 #define ALT_L3_SEC_L4MAIN_DMASECURE_RESET 0x0
470 #define ALT_L3_SEC_L4MAIN_DMASECURE_GET(value) (((value) & 0x00000004) >> 2)
472 #define ALT_L3_SEC_L4MAIN_DMASECURE_SET(value) (((value) << 2) & 0x00000004)
497 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_E_SECURE 0x0
503 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_E_NONSECURE 0x1
506 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_LSB 3
508 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_MSB 3
510 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_WIDTH 1
512 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_SET_MSK 0x00000008
514 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_CLR_MSK 0xfffffff7
516 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_RESET 0x0
518 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_GET(value) (((value) & 0x00000008) >> 3)
520 #define ALT_L3_SEC_L4MAIN_DMANONSECURE_SET(value) (((value) << 3) & 0x00000008)
533 struct ALT_L3_SEC_L4MAIN_s
537 uint32_t dmasecure : 1;
538 uint32_t dmanonsecure : 1;
543 typedef volatile struct ALT_L3_SEC_L4MAIN_s ALT_L3_SEC_L4MAIN_t;
547 #define ALT_L3_SEC_L4MAIN_OFST 0x0
595 #define ALT_L3_SEC_L4SP_SDRREGS_E_SECURE 0x0
601 #define ALT_L3_SEC_L4SP_SDRREGS_E_NONSECURE 0x1
604 #define ALT_L3_SEC_L4SP_SDRREGS_LSB 0
606 #define ALT_L3_SEC_L4SP_SDRREGS_MSB 0
608 #define ALT_L3_SEC_L4SP_SDRREGS_WIDTH 1
610 #define ALT_L3_SEC_L4SP_SDRREGS_SET_MSK 0x00000001
612 #define ALT_L3_SEC_L4SP_SDRREGS_CLR_MSK 0xfffffffe
614 #define ALT_L3_SEC_L4SP_SDRREGS_RESET 0x0
616 #define ALT_L3_SEC_L4SP_SDRREGS_GET(value) (((value) & 0x00000001) >> 0)
618 #define ALT_L3_SEC_L4SP_SDRREGS_SET(value) (((value) << 0) & 0x00000001)
642 #define ALT_L3_SEC_L4SP_SPTMR0_E_SECURE 0x0
648 #define ALT_L3_SEC_L4SP_SPTMR0_E_NONSECURE 0x1
651 #define ALT_L3_SEC_L4SP_SPTMR0_LSB 1
653 #define ALT_L3_SEC_L4SP_SPTMR0_MSB 1
655 #define ALT_L3_SEC_L4SP_SPTMR0_WIDTH 1
657 #define ALT_L3_SEC_L4SP_SPTMR0_SET_MSK 0x00000002
659 #define ALT_L3_SEC_L4SP_SPTMR0_CLR_MSK 0xfffffffd
661 #define ALT_L3_SEC_L4SP_SPTMR0_RESET 0x0
663 #define ALT_L3_SEC_L4SP_SPTMR0_GET(value) (((value) & 0x00000002) >> 1)
665 #define ALT_L3_SEC_L4SP_SPTMR0_SET(value) (((value) << 1) & 0x00000002)
689 #define ALT_L3_SEC_L4SP_I2C0_E_SECURE 0x0
695 #define ALT_L3_SEC_L4SP_I2C0_E_NONSECURE 0x1
698 #define ALT_L3_SEC_L4SP_I2C0_LSB 2
700 #define ALT_L3_SEC_L4SP_I2C0_MSB 2
702 #define ALT_L3_SEC_L4SP_I2C0_WIDTH 1
704 #define ALT_L3_SEC_L4SP_I2C0_SET_MSK 0x00000004
706 #define ALT_L3_SEC_L4SP_I2C0_CLR_MSK 0xfffffffb
708 #define ALT_L3_SEC_L4SP_I2C0_RESET 0x0
710 #define ALT_L3_SEC_L4SP_I2C0_GET(value) (((value) & 0x00000004) >> 2)
712 #define ALT_L3_SEC_L4SP_I2C0_SET(value) (((value) << 2) & 0x00000004)
736 #define ALT_L3_SEC_L4SP_I2C1_E_SECURE 0x0
742 #define ALT_L3_SEC_L4SP_I2C1_E_NONSECURE 0x1
745 #define ALT_L3_SEC_L4SP_I2C1_LSB 3
747 #define ALT_L3_SEC_L4SP_I2C1_MSB 3
749 #define ALT_L3_SEC_L4SP_I2C1_WIDTH 1
751 #define ALT_L3_SEC_L4SP_I2C1_SET_MSK 0x00000008
753 #define ALT_L3_SEC_L4SP_I2C1_CLR_MSK 0xfffffff7
755 #define ALT_L3_SEC_L4SP_I2C1_RESET 0x0
757 #define ALT_L3_SEC_L4SP_I2C1_GET(value) (((value) & 0x00000008) >> 3)
759 #define ALT_L3_SEC_L4SP_I2C1_SET(value) (((value) << 3) & 0x00000008)
784 #define ALT_L3_SEC_L4SP_I2C2_E_SECURE 0x0
790 #define ALT_L3_SEC_L4SP_I2C2_E_NONSECURE 0x1
793 #define ALT_L3_SEC_L4SP_I2C2_LSB 4
795 #define ALT_L3_SEC_L4SP_I2C2_MSB 4
797 #define ALT_L3_SEC_L4SP_I2C2_WIDTH 1
799 #define ALT_L3_SEC_L4SP_I2C2_SET_MSK 0x00000010
801 #define ALT_L3_SEC_L4SP_I2C2_CLR_MSK 0xffffffef
803 #define ALT_L3_SEC_L4SP_I2C2_RESET 0x0
805 #define ALT_L3_SEC_L4SP_I2C2_GET(value) (((value) & 0x00000010) >> 4)
807 #define ALT_L3_SEC_L4SP_I2C2_SET(value) (((value) << 4) & 0x00000010)
832 #define ALT_L3_SEC_L4SP_I2C3_E_SECURE 0x0
838 #define ALT_L3_SEC_L4SP_I2C3_E_NONSECURE 0x1
841 #define ALT_L3_SEC_L4SP_I2C3_LSB 5
843 #define ALT_L3_SEC_L4SP_I2C3_MSB 5
845 #define ALT_L3_SEC_L4SP_I2C3_WIDTH 1
847 #define ALT_L3_SEC_L4SP_I2C3_SET_MSK 0x00000020
849 #define ALT_L3_SEC_L4SP_I2C3_CLR_MSK 0xffffffdf
851 #define ALT_L3_SEC_L4SP_I2C3_RESET 0x0
853 #define ALT_L3_SEC_L4SP_I2C3_GET(value) (((value) & 0x00000020) >> 5)
855 #define ALT_L3_SEC_L4SP_I2C3_SET(value) (((value) << 5) & 0x00000020)
879 #define ALT_L3_SEC_L4SP_UART0_E_SECURE 0x0
885 #define ALT_L3_SEC_L4SP_UART0_E_NONSECURE 0x1
888 #define ALT_L3_SEC_L4SP_UART0_LSB 6
890 #define ALT_L3_SEC_L4SP_UART0_MSB 6
892 #define ALT_L3_SEC_L4SP_UART0_WIDTH 1
894 #define ALT_L3_SEC_L4SP_UART0_SET_MSK 0x00000040
896 #define ALT_L3_SEC_L4SP_UART0_CLR_MSK 0xffffffbf
898 #define ALT_L3_SEC_L4SP_UART0_RESET 0x0
900 #define ALT_L3_SEC_L4SP_UART0_GET(value) (((value) & 0x00000040) >> 6)
902 #define ALT_L3_SEC_L4SP_UART0_SET(value) (((value) << 6) & 0x00000040)
926 #define ALT_L3_SEC_L4SP_UART1_E_SECURE 0x0
932 #define ALT_L3_SEC_L4SP_UART1_E_NONSECURE 0x1
935 #define ALT_L3_SEC_L4SP_UART1_LSB 7
937 #define ALT_L3_SEC_L4SP_UART1_MSB 7
939 #define ALT_L3_SEC_L4SP_UART1_WIDTH 1
941 #define ALT_L3_SEC_L4SP_UART1_SET_MSK 0x00000080
943 #define ALT_L3_SEC_L4SP_UART1_CLR_MSK 0xffffff7f
945 #define ALT_L3_SEC_L4SP_UART1_RESET 0x0
947 #define ALT_L3_SEC_L4SP_UART1_GET(value) (((value) & 0x00000080) >> 7)
949 #define ALT_L3_SEC_L4SP_UART1_SET(value) (((value) << 7) & 0x00000080)
973 #define ALT_L3_SEC_L4SP_CAN0_E_SECURE 0x0
979 #define ALT_L3_SEC_L4SP_CAN0_E_NONSECURE 0x1
982 #define ALT_L3_SEC_L4SP_CAN0_LSB 8
984 #define ALT_L3_SEC_L4SP_CAN0_MSB 8
986 #define ALT_L3_SEC_L4SP_CAN0_WIDTH 1
988 #define ALT_L3_SEC_L4SP_CAN0_SET_MSK 0x00000100
990 #define ALT_L3_SEC_L4SP_CAN0_CLR_MSK 0xfffffeff
992 #define ALT_L3_SEC_L4SP_CAN0_RESET 0x0
994 #define ALT_L3_SEC_L4SP_CAN0_GET(value) (((value) & 0x00000100) >> 8)
996 #define ALT_L3_SEC_L4SP_CAN0_SET(value) (((value) << 8) & 0x00000100)
1020 #define ALT_L3_SEC_L4SP_CAN1_E_SECURE 0x0
1026 #define ALT_L3_SEC_L4SP_CAN1_E_NONSECURE 0x1
1029 #define ALT_L3_SEC_L4SP_CAN1_LSB 9
1031 #define ALT_L3_SEC_L4SP_CAN1_MSB 9
1033 #define ALT_L3_SEC_L4SP_CAN1_WIDTH 1
1035 #define ALT_L3_SEC_L4SP_CAN1_SET_MSK 0x00000200
1037 #define ALT_L3_SEC_L4SP_CAN1_CLR_MSK 0xfffffdff
1039 #define ALT_L3_SEC_L4SP_CAN1_RESET 0x0
1041 #define ALT_L3_SEC_L4SP_CAN1_GET(value) (((value) & 0x00000200) >> 9)
1043 #define ALT_L3_SEC_L4SP_CAN1_SET(value) (((value) << 9) & 0x00000200)
1067 #define ALT_L3_SEC_L4SP_SPTMR1_E_SECURE 0x0
1073 #define ALT_L3_SEC_L4SP_SPTMR1_E_NONSECURE 0x1
1076 #define ALT_L3_SEC_L4SP_SPTMR1_LSB 10
1078 #define ALT_L3_SEC_L4SP_SPTMR1_MSB 10
1080 #define ALT_L3_SEC_L4SP_SPTMR1_WIDTH 1
1082 #define ALT_L3_SEC_L4SP_SPTMR1_SET_MSK 0x00000400
1084 #define ALT_L3_SEC_L4SP_SPTMR1_CLR_MSK 0xfffffbff
1086 #define ALT_L3_SEC_L4SP_SPTMR1_RESET 0x0
1088 #define ALT_L3_SEC_L4SP_SPTMR1_GET(value) (((value) & 0x00000400) >> 10)
1090 #define ALT_L3_SEC_L4SP_SPTMR1_SET(value) (((value) << 10) & 0x00000400)
1092 #ifndef __ASSEMBLY__
1103 struct ALT_L3_SEC_L4SP_s
1105 uint32_t sdrregs : 1;
1106 uint32_t sptimer0 : 1;
1115 uint32_t sptimer1 : 1;
1120 typedef volatile struct ALT_L3_SEC_L4SP_s ALT_L3_SEC_L4SP_t;
1124 #define ALT_L3_SEC_L4SP_OFST 0x4
1171 #define ALT_L3_SEC_L4MP_FPGAMGR_E_SECURE 0x0
1177 #define ALT_L3_SEC_L4MP_FPGAMGR_E_NONSECURE 0x1
1180 #define ALT_L3_SEC_L4MP_FPGAMGR_LSB 0
1182 #define ALT_L3_SEC_L4MP_FPGAMGR_MSB 0
1184 #define ALT_L3_SEC_L4MP_FPGAMGR_WIDTH 1
1186 #define ALT_L3_SEC_L4MP_FPGAMGR_SET_MSK 0x00000001
1188 #define ALT_L3_SEC_L4MP_FPGAMGR_CLR_MSK 0xfffffffe
1190 #define ALT_L3_SEC_L4MP_FPGAMGR_RESET 0x0
1192 #define ALT_L3_SEC_L4MP_FPGAMGR_GET(value) (((value) & 0x00000001) >> 0)
1194 #define ALT_L3_SEC_L4MP_FPGAMGR_SET(value) (((value) << 0) & 0x00000001)
1218 #define ALT_L3_SEC_L4MP_DAP_E_SECURE 0x0
1224 #define ALT_L3_SEC_L4MP_DAP_E_NONSECURE 0x1
1227 #define ALT_L3_SEC_L4MP_DAP_LSB 1
1229 #define ALT_L3_SEC_L4MP_DAP_MSB 1
1231 #define ALT_L3_SEC_L4MP_DAP_WIDTH 1
1233 #define ALT_L3_SEC_L4MP_DAP_SET_MSK 0x00000002
1235 #define ALT_L3_SEC_L4MP_DAP_CLR_MSK 0xfffffffd
1237 #define ALT_L3_SEC_L4MP_DAP_RESET 0x0
1239 #define ALT_L3_SEC_L4MP_DAP_GET(value) (((value) & 0x00000002) >> 1)
1241 #define ALT_L3_SEC_L4MP_DAP_SET(value) (((value) << 1) & 0x00000002)
1266 #define ALT_L3_SEC_L4MP_QSPI_E_SECURE 0x0
1272 #define ALT_L3_SEC_L4MP_QSPI_E_NONSECURE 0x1
1275 #define ALT_L3_SEC_L4MP_QSPI_LSB 2
1277 #define ALT_L3_SEC_L4MP_QSPI_MSB 2
1279 #define ALT_L3_SEC_L4MP_QSPI_WIDTH 1
1281 #define ALT_L3_SEC_L4MP_QSPI_SET_MSK 0x00000004
1283 #define ALT_L3_SEC_L4MP_QSPI_CLR_MSK 0xfffffffb
1285 #define ALT_L3_SEC_L4MP_QSPI_RESET 0x0
1287 #define ALT_L3_SEC_L4MP_QSPI_GET(value) (((value) & 0x00000004) >> 2)
1289 #define ALT_L3_SEC_L4MP_QSPI_SET(value) (((value) << 2) & 0x00000004)
1313 #define ALT_L3_SEC_L4MP_SDMMC_E_SECURE 0x0
1319 #define ALT_L3_SEC_L4MP_SDMMC_E_NONSECURE 0x1
1322 #define ALT_L3_SEC_L4MP_SDMMC_LSB 3
1324 #define ALT_L3_SEC_L4MP_SDMMC_MSB 3
1326 #define ALT_L3_SEC_L4MP_SDMMC_WIDTH 1
1328 #define ALT_L3_SEC_L4MP_SDMMC_SET_MSK 0x00000008
1330 #define ALT_L3_SEC_L4MP_SDMMC_CLR_MSK 0xfffffff7
1332 #define ALT_L3_SEC_L4MP_SDMMC_RESET 0x0
1334 #define ALT_L3_SEC_L4MP_SDMMC_GET(value) (((value) & 0x00000008) >> 3)
1336 #define ALT_L3_SEC_L4MP_SDMMC_SET(value) (((value) << 3) & 0x00000008)
1360 #define ALT_L3_SEC_L4MP_EMAC0_E_SECURE 0x0
1366 #define ALT_L3_SEC_L4MP_EMAC0_E_NONSECURE 0x1
1369 #define ALT_L3_SEC_L4MP_EMAC0_LSB 4
1371 #define ALT_L3_SEC_L4MP_EMAC0_MSB 4
1373 #define ALT_L3_SEC_L4MP_EMAC0_WIDTH 1
1375 #define ALT_L3_SEC_L4MP_EMAC0_SET_MSK 0x00000010
1377 #define ALT_L3_SEC_L4MP_EMAC0_CLR_MSK 0xffffffef
1379 #define ALT_L3_SEC_L4MP_EMAC0_RESET 0x0
1381 #define ALT_L3_SEC_L4MP_EMAC0_GET(value) (((value) & 0x00000010) >> 4)
1383 #define ALT_L3_SEC_L4MP_EMAC0_SET(value) (((value) << 4) & 0x00000010)
1407 #define ALT_L3_SEC_L4MP_EMAC1_E_SECURE 0x0
1413 #define ALT_L3_SEC_L4MP_EMAC1_E_NONSECURE 0x1
1416 #define ALT_L3_SEC_L4MP_EMAC1_LSB 5
1418 #define ALT_L3_SEC_L4MP_EMAC1_MSB 5
1420 #define ALT_L3_SEC_L4MP_EMAC1_WIDTH 1
1422 #define ALT_L3_SEC_L4MP_EMAC1_SET_MSK 0x00000020
1424 #define ALT_L3_SEC_L4MP_EMAC1_CLR_MSK 0xffffffdf
1426 #define ALT_L3_SEC_L4MP_EMAC1_RESET 0x0
1428 #define ALT_L3_SEC_L4MP_EMAC1_GET(value) (((value) & 0x00000020) >> 5)
1430 #define ALT_L3_SEC_L4MP_EMAC1_SET(value) (((value) << 5) & 0x00000020)
1455 #define ALT_L3_SEC_L4MP_ACPIDMAP_E_SECURE 0x0
1461 #define ALT_L3_SEC_L4MP_ACPIDMAP_E_NONSECURE 0x1
1464 #define ALT_L3_SEC_L4MP_ACPIDMAP_LSB 6
1466 #define ALT_L3_SEC_L4MP_ACPIDMAP_MSB 6
1468 #define ALT_L3_SEC_L4MP_ACPIDMAP_WIDTH 1
1470 #define ALT_L3_SEC_L4MP_ACPIDMAP_SET_MSK 0x00000040
1472 #define ALT_L3_SEC_L4MP_ACPIDMAP_CLR_MSK 0xffffffbf
1474 #define ALT_L3_SEC_L4MP_ACPIDMAP_RESET 0x0
1476 #define ALT_L3_SEC_L4MP_ACPIDMAP_GET(value) (((value) & 0x00000040) >> 6)
1478 #define ALT_L3_SEC_L4MP_ACPIDMAP_SET(value) (((value) << 6) & 0x00000040)
1502 #define ALT_L3_SEC_L4MP_GPIO0_E_SECURE 0x0
1508 #define ALT_L3_SEC_L4MP_GPIO0_E_NONSECURE 0x1
1511 #define ALT_L3_SEC_L4MP_GPIO0_LSB 7
1513 #define ALT_L3_SEC_L4MP_GPIO0_MSB 7
1515 #define ALT_L3_SEC_L4MP_GPIO0_WIDTH 1
1517 #define ALT_L3_SEC_L4MP_GPIO0_SET_MSK 0x00000080
1519 #define ALT_L3_SEC_L4MP_GPIO0_CLR_MSK 0xffffff7f
1521 #define ALT_L3_SEC_L4MP_GPIO0_RESET 0x0
1523 #define ALT_L3_SEC_L4MP_GPIO0_GET(value) (((value) & 0x00000080) >> 7)
1525 #define ALT_L3_SEC_L4MP_GPIO0_SET(value) (((value) << 7) & 0x00000080)
1549 #define ALT_L3_SEC_L4MP_GPIO1_E_SECURE 0x0
1555 #define ALT_L3_SEC_L4MP_GPIO1_E_NONSECURE 0x1
1558 #define ALT_L3_SEC_L4MP_GPIO1_LSB 8
1560 #define ALT_L3_SEC_L4MP_GPIO1_MSB 8
1562 #define ALT_L3_SEC_L4MP_GPIO1_WIDTH 1
1564 #define ALT_L3_SEC_L4MP_GPIO1_SET_MSK 0x00000100
1566 #define ALT_L3_SEC_L4MP_GPIO1_CLR_MSK 0xfffffeff
1568 #define ALT_L3_SEC_L4MP_GPIO1_RESET 0x0
1570 #define ALT_L3_SEC_L4MP_GPIO1_GET(value) (((value) & 0x00000100) >> 8)
1572 #define ALT_L3_SEC_L4MP_GPIO1_SET(value) (((value) << 8) & 0x00000100)
1596 #define ALT_L3_SEC_L4MP_GPIO2_E_SECURE 0x0
1602 #define ALT_L3_SEC_L4MP_GPIO2_E_NONSECURE 0x1
1605 #define ALT_L3_SEC_L4MP_GPIO2_LSB 9
1607 #define ALT_L3_SEC_L4MP_GPIO2_MSB 9
1609 #define ALT_L3_SEC_L4MP_GPIO2_WIDTH 1
1611 #define ALT_L3_SEC_L4MP_GPIO2_SET_MSK 0x00000200
1613 #define ALT_L3_SEC_L4MP_GPIO2_CLR_MSK 0xfffffdff
1615 #define ALT_L3_SEC_L4MP_GPIO2_RESET 0x0
1617 #define ALT_L3_SEC_L4MP_GPIO2_GET(value) (((value) & 0x00000200) >> 9)
1619 #define ALT_L3_SEC_L4MP_GPIO2_SET(value) (((value) << 9) & 0x00000200)
1621 #ifndef __ASSEMBLY__
1632 struct ALT_L3_SEC_L4MP_s
1634 uint32_t fpgamgrregs : 1;
1636 uint32_t qspiregs : 1;
1640 uint32_t acpidmap : 1;
1648 typedef volatile struct ALT_L3_SEC_L4MP_s ALT_L3_SEC_L4MP_t;
1652 #define ALT_L3_SEC_L4MP_OFST 0x8
1696 #define ALT_L3_SEC_L4OSC1_L4WD0_E_SECURE 0x0
1702 #define ALT_L3_SEC_L4OSC1_L4WD0_E_NONSECURE 0x1
1705 #define ALT_L3_SEC_L4OSC1_L4WD0_LSB 0
1707 #define ALT_L3_SEC_L4OSC1_L4WD0_MSB 0
1709 #define ALT_L3_SEC_L4OSC1_L4WD0_WIDTH 1
1711 #define ALT_L3_SEC_L4OSC1_L4WD0_SET_MSK 0x00000001
1713 #define ALT_L3_SEC_L4OSC1_L4WD0_CLR_MSK 0xfffffffe
1715 #define ALT_L3_SEC_L4OSC1_L4WD0_RESET 0x0
1717 #define ALT_L3_SEC_L4OSC1_L4WD0_GET(value) (((value) & 0x00000001) >> 0)
1719 #define ALT_L3_SEC_L4OSC1_L4WD0_SET(value) (((value) << 0) & 0x00000001)
1744 #define ALT_L3_SEC_L4OSC1_L4WD1_E_SECURE 0x0
1750 #define ALT_L3_SEC_L4OSC1_L4WD1_E_NONSECURE 0x1
1753 #define ALT_L3_SEC_L4OSC1_L4WD1_LSB 1
1755 #define ALT_L3_SEC_L4OSC1_L4WD1_MSB 1
1757 #define ALT_L3_SEC_L4OSC1_L4WD1_WIDTH 1
1759 #define ALT_L3_SEC_L4OSC1_L4WD1_SET_MSK 0x00000002
1761 #define ALT_L3_SEC_L4OSC1_L4WD1_CLR_MSK 0xfffffffd
1763 #define ALT_L3_SEC_L4OSC1_L4WD1_RESET 0x0
1765 #define ALT_L3_SEC_L4OSC1_L4WD1_GET(value) (((value) & 0x00000002) >> 1)
1767 #define ALT_L3_SEC_L4OSC1_L4WD1_SET(value) (((value) << 1) & 0x00000002)
1792 #define ALT_L3_SEC_L4OSC1_CLKMGR_E_SECURE 0x0
1798 #define ALT_L3_SEC_L4OSC1_CLKMGR_E_NONSECURE 0x1
1801 #define ALT_L3_SEC_L4OSC1_CLKMGR_LSB 2
1803 #define ALT_L3_SEC_L4OSC1_CLKMGR_MSB 2
1805 #define ALT_L3_SEC_L4OSC1_CLKMGR_WIDTH 1
1807 #define ALT_L3_SEC_L4OSC1_CLKMGR_SET_MSK 0x00000004
1809 #define ALT_L3_SEC_L4OSC1_CLKMGR_CLR_MSK 0xfffffffb
1811 #define ALT_L3_SEC_L4OSC1_CLKMGR_RESET 0x0
1813 #define ALT_L3_SEC_L4OSC1_CLKMGR_GET(value) (((value) & 0x00000004) >> 2)
1815 #define ALT_L3_SEC_L4OSC1_CLKMGR_SET(value) (((value) << 2) & 0x00000004)
1840 #define ALT_L3_SEC_L4OSC1_RSTMGR_E_SECURE 0x0
1846 #define ALT_L3_SEC_L4OSC1_RSTMGR_E_NONSECURE 0x1
1849 #define ALT_L3_SEC_L4OSC1_RSTMGR_LSB 3
1851 #define ALT_L3_SEC_L4OSC1_RSTMGR_MSB 3
1853 #define ALT_L3_SEC_L4OSC1_RSTMGR_WIDTH 1
1855 #define ALT_L3_SEC_L4OSC1_RSTMGR_SET_MSK 0x00000008
1857 #define ALT_L3_SEC_L4OSC1_RSTMGR_CLR_MSK 0xfffffff7
1859 #define ALT_L3_SEC_L4OSC1_RSTMGR_RESET 0x0
1861 #define ALT_L3_SEC_L4OSC1_RSTMGR_GET(value) (((value) & 0x00000008) >> 3)
1863 #define ALT_L3_SEC_L4OSC1_RSTMGR_SET(value) (((value) << 3) & 0x00000008)
1888 #define ALT_L3_SEC_L4OSC1_SYSMGR_E_SECURE 0x0
1894 #define ALT_L3_SEC_L4OSC1_SYSMGR_E_NONSECURE 0x1
1897 #define ALT_L3_SEC_L4OSC1_SYSMGR_LSB 4
1899 #define ALT_L3_SEC_L4OSC1_SYSMGR_MSB 4
1901 #define ALT_L3_SEC_L4OSC1_SYSMGR_WIDTH 1
1903 #define ALT_L3_SEC_L4OSC1_SYSMGR_SET_MSK 0x00000010
1905 #define ALT_L3_SEC_L4OSC1_SYSMGR_CLR_MSK 0xffffffef
1907 #define ALT_L3_SEC_L4OSC1_SYSMGR_RESET 0x0
1909 #define ALT_L3_SEC_L4OSC1_SYSMGR_GET(value) (((value) & 0x00000010) >> 4)
1911 #define ALT_L3_SEC_L4OSC1_SYSMGR_SET(value) (((value) << 4) & 0x00000010)
1935 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_E_SECURE 0x0
1941 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_E_NONSECURE 0x1
1944 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_LSB 5
1946 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_MSB 5
1948 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_WIDTH 1
1950 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_SET_MSK 0x00000020
1952 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_CLR_MSK 0xffffffdf
1954 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_RESET 0x0
1956 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_GET(value) (((value) & 0x00000020) >> 5)
1958 #define ALT_L3_SEC_L4OSC1_OSC1TMR0_SET(value) (((value) << 5) & 0x00000020)
1982 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_E_SECURE 0x0
1988 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_E_NONSECURE 0x1
1991 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_LSB 6
1993 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_MSB 6
1995 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_WIDTH 1
1997 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_SET_MSK 0x00000040
1999 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_CLR_MSK 0xffffffbf
2001 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_RESET 0x0
2003 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_GET(value) (((value) & 0x00000040) >> 6)
2005 #define ALT_L3_SEC_L4OSC1_OSC1TMR1_SET(value) (((value) << 6) & 0x00000040)
2007 #ifndef __ASSEMBLY__
2018 struct ALT_L3_SEC_L4OSC1_s
2022 uint32_t clkmgr : 1;
2023 uint32_t rstmgr : 1;
2024 uint32_t sysmgr : 1;
2025 uint32_t osc1timer0 : 1;
2026 uint32_t osc1timer1 : 1;
2031 typedef volatile struct ALT_L3_SEC_L4OSC1_s ALT_L3_SEC_L4OSC1_t;
2035 #define ALT_L3_SEC_L4OSC1_OFST 0xc
2074 #define ALT_L3_SEC_L4SPIM_SPIM0_E_SECURE 0x0
2080 #define ALT_L3_SEC_L4SPIM_SPIM0_E_NONSECURE 0x1
2083 #define ALT_L3_SEC_L4SPIM_SPIM0_LSB 0
2085 #define ALT_L3_SEC_L4SPIM_SPIM0_MSB 0
2087 #define ALT_L3_SEC_L4SPIM_SPIM0_WIDTH 1
2089 #define ALT_L3_SEC_L4SPIM_SPIM0_SET_MSK 0x00000001
2091 #define ALT_L3_SEC_L4SPIM_SPIM0_CLR_MSK 0xfffffffe
2093 #define ALT_L3_SEC_L4SPIM_SPIM0_RESET 0x0
2095 #define ALT_L3_SEC_L4SPIM_SPIM0_GET(value) (((value) & 0x00000001) >> 0)
2097 #define ALT_L3_SEC_L4SPIM_SPIM0_SET(value) (((value) << 0) & 0x00000001)
2121 #define ALT_L3_SEC_L4SPIM_SPIM1_E_SECURE 0x0
2127 #define ALT_L3_SEC_L4SPIM_SPIM1_E_NONSECURE 0x1
2130 #define ALT_L3_SEC_L4SPIM_SPIM1_LSB 1
2132 #define ALT_L3_SEC_L4SPIM_SPIM1_MSB 1
2134 #define ALT_L3_SEC_L4SPIM_SPIM1_WIDTH 1
2136 #define ALT_L3_SEC_L4SPIM_SPIM1_SET_MSK 0x00000002
2138 #define ALT_L3_SEC_L4SPIM_SPIM1_CLR_MSK 0xfffffffd
2140 #define ALT_L3_SEC_L4SPIM_SPIM1_RESET 0x0
2142 #define ALT_L3_SEC_L4SPIM_SPIM1_GET(value) (((value) & 0x00000002) >> 1)
2144 #define ALT_L3_SEC_L4SPIM_SPIM1_SET(value) (((value) << 1) & 0x00000002)
2168 #define ALT_L3_SEC_L4SPIM_SCANMGR_E_SECURE 0x0
2174 #define ALT_L3_SEC_L4SPIM_SCANMGR_E_NONSECURE 0x1
2177 #define ALT_L3_SEC_L4SPIM_SCANMGR_LSB 2
2179 #define ALT_L3_SEC_L4SPIM_SCANMGR_MSB 2
2181 #define ALT_L3_SEC_L4SPIM_SCANMGR_WIDTH 1
2183 #define ALT_L3_SEC_L4SPIM_SCANMGR_SET_MSK 0x00000004
2185 #define ALT_L3_SEC_L4SPIM_SCANMGR_CLR_MSK 0xfffffffb
2187 #define ALT_L3_SEC_L4SPIM_SCANMGR_RESET 0x0
2189 #define ALT_L3_SEC_L4SPIM_SCANMGR_GET(value) (((value) & 0x00000004) >> 2)
2191 #define ALT_L3_SEC_L4SPIM_SCANMGR_SET(value) (((value) << 2) & 0x00000004)
2193 #ifndef __ASSEMBLY__
2204 struct ALT_L3_SEC_L4SPIM_s
2208 uint32_t scanmgr : 1;
2213 typedef volatile struct ALT_L3_SEC_L4SPIM_s ALT_L3_SEC_L4SPIM_t;
2217 #define ALT_L3_SEC_L4SPIM_OFST 0x10
2254 #define ALT_L3_SEC_STM_S_E_SECURE 0x0
2260 #define ALT_L3_SEC_STM_S_E_NONSECURE 0x1
2263 #define ALT_L3_SEC_STM_S_LSB 0
2265 #define ALT_L3_SEC_STM_S_MSB 0
2267 #define ALT_L3_SEC_STM_S_WIDTH 1
2269 #define ALT_L3_SEC_STM_S_SET_MSK 0x00000001
2271 #define ALT_L3_SEC_STM_S_CLR_MSK 0xfffffffe
2273 #define ALT_L3_SEC_STM_S_RESET 0x0
2275 #define ALT_L3_SEC_STM_S_GET(value) (((value) & 0x00000001) >> 0)
2277 #define ALT_L3_SEC_STM_S_SET(value) (((value) << 0) & 0x00000001)
2279 #ifndef __ASSEMBLY__
2290 struct ALT_L3_SEC_STM_s
2297 typedef volatile struct ALT_L3_SEC_STM_s ALT_L3_SEC_STM_t;
2301 #define ALT_L3_SEC_STM_OFST 0x14
2339 #define ALT_L3_SEC_LWH2F_S_E_SECURE 0x0
2345 #define ALT_L3_SEC_LWH2F_S_E_NONSECURE 0x1
2348 #define ALT_L3_SEC_LWH2F_S_LSB 0
2350 #define ALT_L3_SEC_LWH2F_S_MSB 0
2352 #define ALT_L3_SEC_LWH2F_S_WIDTH 1
2354 #define ALT_L3_SEC_LWH2F_S_SET_MSK 0x00000001
2356 #define ALT_L3_SEC_LWH2F_S_CLR_MSK 0xfffffffe
2358 #define ALT_L3_SEC_LWH2F_S_RESET 0x0
2360 #define ALT_L3_SEC_LWH2F_S_GET(value) (((value) & 0x00000001) >> 0)
2362 #define ALT_L3_SEC_LWH2F_S_SET(value) (((value) << 0) & 0x00000001)
2364 #ifndef __ASSEMBLY__
2375 struct ALT_L3_SEC_LWH2F_s
2382 typedef volatile struct ALT_L3_SEC_LWH2F_s ALT_L3_SEC_LWH2F_t;
2386 #define ALT_L3_SEC_LWH2F_OFST 0x18
2424 #define ALT_L3_SEC_USB1_S_E_SECURE 0x0
2430 #define ALT_L3_SEC_USB1_S_E_NONSECURE 0x1
2433 #define ALT_L3_SEC_USB1_S_LSB 0
2435 #define ALT_L3_SEC_USB1_S_MSB 0
2437 #define ALT_L3_SEC_USB1_S_WIDTH 1
2439 #define ALT_L3_SEC_USB1_S_SET_MSK 0x00000001
2441 #define ALT_L3_SEC_USB1_S_CLR_MSK 0xfffffffe
2443 #define ALT_L3_SEC_USB1_S_RESET 0x0
2445 #define ALT_L3_SEC_USB1_S_GET(value) (((value) & 0x00000001) >> 0)
2447 #define ALT_L3_SEC_USB1_S_SET(value) (((value) << 0) & 0x00000001)
2449 #ifndef __ASSEMBLY__
2460 struct ALT_L3_SEC_USB1_s
2467 typedef volatile struct ALT_L3_SEC_USB1_s ALT_L3_SEC_USB1_t;
2471 #define ALT_L3_SEC_USB1_OFST 0x20
2509 #define ALT_L3_SEC_NANDDATA_S_E_SECURE 0x0
2515 #define ALT_L3_SEC_NANDDATA_S_E_NONSECURE 0x1
2518 #define ALT_L3_SEC_NANDDATA_S_LSB 0
2520 #define ALT_L3_SEC_NANDDATA_S_MSB 0
2522 #define ALT_L3_SEC_NANDDATA_S_WIDTH 1
2524 #define ALT_L3_SEC_NANDDATA_S_SET_MSK 0x00000001
2526 #define ALT_L3_SEC_NANDDATA_S_CLR_MSK 0xfffffffe
2528 #define ALT_L3_SEC_NANDDATA_S_RESET 0x0
2530 #define ALT_L3_SEC_NANDDATA_S_GET(value) (((value) & 0x00000001) >> 0)
2532 #define ALT_L3_SEC_NANDDATA_S_SET(value) (((value) << 0) & 0x00000001)
2534 #ifndef __ASSEMBLY__
2545 struct ALT_L3_SEC_NANDDATA_s
2552 typedef volatile struct ALT_L3_SEC_NANDDATA_s ALT_L3_SEC_NANDDATA_t;
2556 #define ALT_L3_SEC_NANDDATA_OFST 0x24
2594 #define ALT_L3_SEC_USB0_S_E_SECURE 0x0
2600 #define ALT_L3_SEC_USB0_S_E_NONSECURE 0x1
2603 #define ALT_L3_SEC_USB0_S_LSB 0
2605 #define ALT_L3_SEC_USB0_S_MSB 0
2607 #define ALT_L3_SEC_USB0_S_WIDTH 1
2609 #define ALT_L3_SEC_USB0_S_SET_MSK 0x00000001
2611 #define ALT_L3_SEC_USB0_S_CLR_MSK 0xfffffffe
2613 #define ALT_L3_SEC_USB0_S_RESET 0x0
2615 #define ALT_L3_SEC_USB0_S_GET(value) (((value) & 0x00000001) >> 0)
2617 #define ALT_L3_SEC_USB0_S_SET(value) (((value) << 0) & 0x00000001)
2619 #ifndef __ASSEMBLY__
2630 struct ALT_L3_SEC_USB0_s
2637 typedef volatile struct ALT_L3_SEC_USB0_s ALT_L3_SEC_USB0_t;
2641 #define ALT_L3_SEC_USB0_OFST 0x78
2679 #define ALT_L3_SEC_NAND_S_E_SECURE 0x0
2685 #define ALT_L3_SEC_NAND_S_E_NONSECURE 0x1
2688 #define ALT_L3_SEC_NAND_S_LSB 0
2690 #define ALT_L3_SEC_NAND_S_MSB 0
2692 #define ALT_L3_SEC_NAND_S_WIDTH 1
2694 #define ALT_L3_SEC_NAND_S_SET_MSK 0x00000001
2696 #define ALT_L3_SEC_NAND_S_CLR_MSK 0xfffffffe
2698 #define ALT_L3_SEC_NAND_S_RESET 0x0
2700 #define ALT_L3_SEC_NAND_S_GET(value) (((value) & 0x00000001) >> 0)
2702 #define ALT_L3_SEC_NAND_S_SET(value) (((value) << 0) & 0x00000001)
2704 #ifndef __ASSEMBLY__
2715 struct ALT_L3_SEC_NAND_s
2722 typedef volatile struct ALT_L3_SEC_NAND_s ALT_L3_SEC_NAND_t;
2726 #define ALT_L3_SEC_NAND_OFST 0x7c
2764 #define ALT_L3_SEC_QSPIDATA_S_E_SECURE 0x0
2770 #define ALT_L3_SEC_QSPIDATA_S_E_NONSECURE 0x1
2773 #define ALT_L3_SEC_QSPIDATA_S_LSB 0
2775 #define ALT_L3_SEC_QSPIDATA_S_MSB 0
2777 #define ALT_L3_SEC_QSPIDATA_S_WIDTH 1
2779 #define ALT_L3_SEC_QSPIDATA_S_SET_MSK 0x00000001
2781 #define ALT_L3_SEC_QSPIDATA_S_CLR_MSK 0xfffffffe
2783 #define ALT_L3_SEC_QSPIDATA_S_RESET 0x0
2785 #define ALT_L3_SEC_QSPIDATA_S_GET(value) (((value) & 0x00000001) >> 0)
2787 #define ALT_L3_SEC_QSPIDATA_S_SET(value) (((value) << 0) & 0x00000001)
2789 #ifndef __ASSEMBLY__
2800 struct ALT_L3_SEC_QSPIDATA_s
2807 typedef volatile struct ALT_L3_SEC_QSPIDATA_s ALT_L3_SEC_QSPIDATA_t;
2811 #define ALT_L3_SEC_QSPIDATA_OFST 0x80
2849 #define ALT_L3_SEC_FPGAMGRDATA_S_E_SECURE 0x0
2855 #define ALT_L3_SEC_FPGAMGRDATA_S_E_NONSECURE 0x1
2858 #define ALT_L3_SEC_FPGAMGRDATA_S_LSB 0
2860 #define ALT_L3_SEC_FPGAMGRDATA_S_MSB 0
2862 #define ALT_L3_SEC_FPGAMGRDATA_S_WIDTH 1
2864 #define ALT_L3_SEC_FPGAMGRDATA_S_SET_MSK 0x00000001
2866 #define ALT_L3_SEC_FPGAMGRDATA_S_CLR_MSK 0xfffffffe
2868 #define ALT_L3_SEC_FPGAMGRDATA_S_RESET 0x0
2870 #define ALT_L3_SEC_FPGAMGRDATA_S_GET(value) (((value) & 0x00000001) >> 0)
2872 #define ALT_L3_SEC_FPGAMGRDATA_S_SET(value) (((value) << 0) & 0x00000001)
2874 #ifndef __ASSEMBLY__
2885 struct ALT_L3_SEC_FPGAMGRDATA_s
2892 typedef volatile struct ALT_L3_SEC_FPGAMGRDATA_s ALT_L3_SEC_FPGAMGRDATA_t;
2896 #define ALT_L3_SEC_FPGAMGRDATA_OFST 0x84
2934 #define ALT_L3_SEC_H2F_S_E_SECURE 0x0
2940 #define ALT_L3_SEC_H2F_S_E_NONSECURE 0x1
2943 #define ALT_L3_SEC_H2F_S_LSB 0
2945 #define ALT_L3_SEC_H2F_S_MSB 0
2947 #define ALT_L3_SEC_H2F_S_WIDTH 1
2949 #define ALT_L3_SEC_H2F_S_SET_MSK 0x00000001
2951 #define ALT_L3_SEC_H2F_S_CLR_MSK 0xfffffffe
2953 #define ALT_L3_SEC_H2F_S_RESET 0x0
2955 #define ALT_L3_SEC_H2F_S_GET(value) (((value) & 0x00000001) >> 0)
2957 #define ALT_L3_SEC_H2F_S_SET(value) (((value) << 0) & 0x00000001)
2959 #ifndef __ASSEMBLY__
2970 struct ALT_L3_SEC_H2F_s
2977 typedef volatile struct ALT_L3_SEC_H2F_s ALT_L3_SEC_H2F_t;
2981 #define ALT_L3_SEC_H2F_OFST 0x88
3018 #define ALT_L3_SEC_ACP_S_E_SECURE 0x0
3024 #define ALT_L3_SEC_ACP_S_E_NONSECURE 0x1
3027 #define ALT_L3_SEC_ACP_S_LSB 0
3029 #define ALT_L3_SEC_ACP_S_MSB 0
3031 #define ALT_L3_SEC_ACP_S_WIDTH 1
3033 #define ALT_L3_SEC_ACP_S_SET_MSK 0x00000001
3035 #define ALT_L3_SEC_ACP_S_CLR_MSK 0xfffffffe
3037 #define ALT_L3_SEC_ACP_S_RESET 0x0
3039 #define ALT_L3_SEC_ACP_S_GET(value) (((value) & 0x00000001) >> 0)
3041 #define ALT_L3_SEC_ACP_S_SET(value) (((value) << 0) & 0x00000001)
3043 #ifndef __ASSEMBLY__
3054 struct ALT_L3_SEC_ACP_s
3061 typedef volatile struct ALT_L3_SEC_ACP_s ALT_L3_SEC_ACP_t;
3065 #define ALT_L3_SEC_ACP_OFST 0x8c
3102 #define ALT_L3_SEC_ROM_S_E_SECURE 0x0
3108 #define ALT_L3_SEC_ROM_S_E_NONSECURE 0x1
3111 #define ALT_L3_SEC_ROM_S_LSB 0
3113 #define ALT_L3_SEC_ROM_S_MSB 0
3115 #define ALT_L3_SEC_ROM_S_WIDTH 1
3117 #define ALT_L3_SEC_ROM_S_SET_MSK 0x00000001
3119 #define ALT_L3_SEC_ROM_S_CLR_MSK 0xfffffffe
3121 #define ALT_L3_SEC_ROM_S_RESET 0x0
3123 #define ALT_L3_SEC_ROM_S_GET(value) (((value) & 0x00000001) >> 0)
3125 #define ALT_L3_SEC_ROM_S_SET(value) (((value) << 0) & 0x00000001)
3127 #ifndef __ASSEMBLY__
3138 struct ALT_L3_SEC_ROM_s
3145 typedef volatile struct ALT_L3_SEC_ROM_s ALT_L3_SEC_ROM_t;
3149 #define ALT_L3_SEC_ROM_OFST 0x90
3186 #define ALT_L3_SEC_OCRAM_S_E_SECURE 0x0
3192 #define ALT_L3_SEC_OCRAM_S_E_NONSECURE 0x1
3195 #define ALT_L3_SEC_OCRAM_S_LSB 0
3197 #define ALT_L3_SEC_OCRAM_S_MSB 0
3199 #define ALT_L3_SEC_OCRAM_S_WIDTH 1
3201 #define ALT_L3_SEC_OCRAM_S_SET_MSK 0x00000001
3203 #define ALT_L3_SEC_OCRAM_S_CLR_MSK 0xfffffffe
3205 #define ALT_L3_SEC_OCRAM_S_RESET 0x0
3207 #define ALT_L3_SEC_OCRAM_S_GET(value) (((value) & 0x00000001) >> 0)
3209 #define ALT_L3_SEC_OCRAM_S_SET(value) (((value) << 0) & 0x00000001)
3211 #ifndef __ASSEMBLY__
3222 struct ALT_L3_SEC_OCRAM_s
3229 typedef volatile struct ALT_L3_SEC_OCRAM_s ALT_L3_SEC_OCRAM_t;
3233 #define ALT_L3_SEC_OCRAM_OFST 0x94
3270 #define ALT_L3_SEC_SDRDATA_S_E_SECURE 0x0
3276 #define ALT_L3_SEC_SDRDATA_S_E_NONSECURE 0x1
3279 #define ALT_L3_SEC_SDRDATA_S_LSB 0
3281 #define ALT_L3_SEC_SDRDATA_S_MSB 0
3283 #define ALT_L3_SEC_SDRDATA_S_WIDTH 1
3285 #define ALT_L3_SEC_SDRDATA_S_SET_MSK 0x00000001
3287 #define ALT_L3_SEC_SDRDATA_S_CLR_MSK 0xfffffffe
3289 #define ALT_L3_SEC_SDRDATA_S_RESET 0x0
3291 #define ALT_L3_SEC_SDRDATA_S_GET(value) (((value) & 0x00000001) >> 0)
3293 #define ALT_L3_SEC_SDRDATA_S_SET(value) (((value) << 0) & 0x00000001)
3295 #ifndef __ASSEMBLY__
3306 struct ALT_L3_SEC_SDRDATA_s
3313 typedef volatile struct ALT_L3_SEC_SDRDATA_s ALT_L3_SEC_SDRDATA_t;
3317 #define ALT_L3_SEC_SDRDATA_OFST 0x98
3319 #ifndef __ASSEMBLY__
3330 struct ALT_L3_SECGRP_s
3332 ALT_L3_SEC_L4MAIN_t l4main;
3333 ALT_L3_SEC_L4SP_t l4sp;
3334 ALT_L3_SEC_L4MP_t l4mp;
3335 ALT_L3_SEC_L4OSC1_t l4osc1;
3336 ALT_L3_SEC_L4SPIM_t l4spim;
3337 ALT_L3_SEC_STM_t stm;
3338 ALT_L3_SEC_LWH2F_t lwhps2fpgaregs;
3339 volatile uint32_t _pad_0x1c_0x1f;
3340 ALT_L3_SEC_USB1_t usb1;
3341 ALT_L3_SEC_NANDDATA_t nanddata;
3342 volatile uint32_t _pad_0x28_0x77[20];
3343 ALT_L3_SEC_USB0_t usb0;
3344 ALT_L3_SEC_NAND_t nandregs;
3345 ALT_L3_SEC_QSPIDATA_t qspidata;
3346 ALT_L3_SEC_FPGAMGRDATA_t fpgamgrdata;
3347 ALT_L3_SEC_H2F_t hps2fpgaregs;
3348 ALT_L3_SEC_ACP_t acp;
3349 ALT_L3_SEC_ROM_t rom;
3350 ALT_L3_SEC_OCRAM_t ocram;
3351 ALT_L3_SEC_SDRDATA_t sdrdata;
3355 typedef volatile struct ALT_L3_SECGRP_s ALT_L3_SECGRP_t;
3357 struct ALT_L3_SECGRP_raw_s
3359 volatile uint32_t l4main;
3360 volatile uint32_t l4sp;
3361 volatile uint32_t l4mp;
3362 volatile uint32_t l4osc1;
3363 volatile uint32_t l4spim;
3364 volatile uint32_t stm;
3365 volatile uint32_t lwhps2fpgaregs;
3366 uint32_t _pad_0x1c_0x1f;
3367 volatile uint32_t usb1;
3368 volatile uint32_t nanddata;
3369 uint32_t _pad_0x28_0x77[20];
3370 volatile uint32_t usb0;
3371 volatile uint32_t nandregs;
3372 volatile uint32_t qspidata;
3373 volatile uint32_t fpgamgrdata;
3374 volatile uint32_t hps2fpgaregs;
3375 volatile uint32_t acp;
3376 volatile uint32_t rom;
3377 volatile uint32_t ocram;
3378 volatile uint32_t sdrdata;
3382 typedef volatile struct ALT_L3_SECGRP_raw_s ALT_L3_SECGRP_raw_t;
3415 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_LSB 0
3417 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_MSB 7
3419 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_WIDTH 8
3421 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_SET_MSK 0x000000ff
3423 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_CLR_MSK 0xffffff00
3425 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_RESET 0x4
3427 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_GET(value) (((value) & 0x000000ff) >> 0)
3429 #define ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_SET(value) (((value) << 0) & 0x000000ff)
3431 #ifndef __ASSEMBLY__
3442 struct ALT_L3_ID_PERIPH_ID_4_s
3444 const uint32_t periph_id_4 : 8;
3449 typedef volatile struct ALT_L3_ID_PERIPH_ID_4_s ALT_L3_ID_PERIPH_ID_4_t;
3453 #define ALT_L3_ID_PERIPH_ID_4_OFST 0xfd0
3477 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_LSB 0
3479 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_MSB 7
3481 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_WIDTH 8
3483 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET_MSK 0x000000ff
3485 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_CLR_MSK 0xffffff00
3487 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_RESET 0x1
3489 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_GET(value) (((value) & 0x000000ff) >> 0)
3491 #define ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET(value) (((value) << 0) & 0x000000ff)
3493 #ifndef __ASSEMBLY__
3504 struct ALT_L3_ID_PERIPH_ID_0_s
3506 const uint32_t pn7to0 : 8;
3511 typedef volatile struct ALT_L3_ID_PERIPH_ID_0_s ALT_L3_ID_PERIPH_ID_0_t;
3515 #define ALT_L3_ID_PERIPH_ID_0_OFST 0xfe0
3539 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_LSB 0
3541 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_MSB 7
3543 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_WIDTH 8
3545 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_SET_MSK 0x000000ff
3547 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_CLR_MSK 0xffffff00
3549 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_RESET 0xb3
3551 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_GET(value) (((value) & 0x000000ff) >> 0)
3553 #define ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_SET(value) (((value) << 0) & 0x000000ff)
3555 #ifndef __ASSEMBLY__
3566 struct ALT_L3_ID_PERIPH_ID_1_s
3568 const uint32_t jep3to0_pn11to8 : 8;
3573 typedef volatile struct ALT_L3_ID_PERIPH_ID_1_s ALT_L3_ID_PERIPH_ID_1_t;
3577 #define ALT_L3_ID_PERIPH_ID_1_OFST 0xfe4
3601 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_LSB 0
3603 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_MSB 7
3605 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_WIDTH 8
3607 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_SET_MSK 0x000000ff
3609 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_CLR_MSK 0xffffff00
3611 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_RESET 0x6b
3613 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_GET(value) (((value) & 0x000000ff) >> 0)
3615 #define ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_SET(value) (((value) << 0) & 0x000000ff)
3617 #ifndef __ASSEMBLY__
3628 struct ALT_L3_ID_PERIPH_ID_2_s
3630 const uint32_t rev_jepcode_jep6to4 : 8;
3635 typedef volatile struct ALT_L3_ID_PERIPH_ID_2_s ALT_L3_ID_PERIPH_ID_2_t;
3639 #define ALT_L3_ID_PERIPH_ID_2_OFST 0xfe8
3664 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_LSB 0
3666 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_MSB 3
3668 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_WIDTH 4
3670 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_SET_MSK 0x0000000f
3672 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_CLR_MSK 0xfffffff0
3674 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_RESET 0x0
3676 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_GET(value) (((value) & 0x0000000f) >> 0)
3678 #define ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_SET(value) (((value) << 0) & 0x0000000f)
3689 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_LSB 4
3691 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_MSB 7
3693 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_WIDTH 4
3695 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_SET_MSK 0x000000f0
3697 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_CLR_MSK 0xffffff0f
3699 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_RESET 0x0
3701 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_GET(value) (((value) & 0x000000f0) >> 4)
3703 #define ALT_L3_ID_PERIPH_ID_3_REV_AND_SET(value) (((value) << 4) & 0x000000f0)
3705 #ifndef __ASSEMBLY__
3716 struct ALT_L3_ID_PERIPH_ID_3_s
3718 const uint32_t cust_mod_num : 4;
3719 const uint32_t rev_and : 4;
3724 typedef volatile struct ALT_L3_ID_PERIPH_ID_3_s ALT_L3_ID_PERIPH_ID_3_t;
3728 #define ALT_L3_ID_PERIPH_ID_3_OFST 0xfec
3752 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_LSB 0
3754 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_MSB 7
3756 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_WIDTH 8
3758 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_SET_MSK 0x000000ff
3760 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_CLR_MSK 0xffffff00
3762 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_RESET 0xd
3764 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
3766 #define ALT_L3_ID_COMP_ID_0_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
3768 #ifndef __ASSEMBLY__
3779 struct ALT_L3_ID_COMP_ID_0_s
3781 const uint32_t preamble : 8;
3786 typedef volatile struct ALT_L3_ID_COMP_ID_0_s ALT_L3_ID_COMP_ID_0_t;
3790 #define ALT_L3_ID_COMP_ID_0_OFST 0xff0
3814 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_LSB 0
3816 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_MSB 7
3818 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_WIDTH 8
3820 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_SET_MSK 0x000000ff
3822 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_CLR_MSK 0xffffff00
3824 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_RESET 0xf0
3826 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
3828 #define ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
3830 #ifndef __ASSEMBLY__
3841 struct ALT_L3_ID_COMP_ID_1_s
3843 const uint32_t genipcompcls_preamble : 8;
3848 typedef volatile struct ALT_L3_ID_COMP_ID_1_s ALT_L3_ID_COMP_ID_1_t;
3852 #define ALT_L3_ID_COMP_ID_1_OFST 0xff4
3876 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_LSB 0
3878 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_MSB 7
3880 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_WIDTH 8
3882 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_SET_MSK 0x000000ff
3884 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_CLR_MSK 0xffffff00
3886 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_RESET 0x5
3888 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
3890 #define ALT_L3_ID_COMP_ID_2_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
3892 #ifndef __ASSEMBLY__
3903 struct ALT_L3_ID_COMP_ID_2_s
3905 const uint32_t preamble : 8;
3910 typedef volatile struct ALT_L3_ID_COMP_ID_2_s ALT_L3_ID_COMP_ID_2_t;
3914 #define ALT_L3_ID_COMP_ID_2_OFST 0xff8
3938 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_LSB 0
3940 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_MSB 7
3942 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_WIDTH 8
3944 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_SET_MSK 0x000000ff
3946 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_CLR_MSK 0xffffff00
3948 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_RESET 0xb1
3950 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0)
3952 #define ALT_L3_ID_COMP_ID_3_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff)
3954 #ifndef __ASSEMBLY__
3965 struct ALT_L3_ID_COMP_ID_3_s
3967 const uint32_t preamble : 8;
3972 typedef volatile struct ALT_L3_ID_COMP_ID_3_s ALT_L3_ID_COMP_ID_3_t;
3976 #define ALT_L3_ID_COMP_ID_3_OFST 0xffc
3978 #ifndef __ASSEMBLY__
3989 struct ALT_L3_IDGRP_s
3991 volatile uint32_t _pad_0x0_0xfcf[1012];
3992 ALT_L3_ID_PERIPH_ID_4_t periph_id_4;
3993 volatile uint32_t _pad_0xfd4_0xfdf[3];
3994 ALT_L3_ID_PERIPH_ID_0_t periph_id_0;
3995 ALT_L3_ID_PERIPH_ID_1_t periph_id_1;
3996 ALT_L3_ID_PERIPH_ID_2_t periph_id_2;
3997 ALT_L3_ID_PERIPH_ID_3_t periph_id_3;
3998 ALT_L3_ID_COMP_ID_0_t comp_id_0;
3999 ALT_L3_ID_COMP_ID_1_t comp_id_1;
4000 ALT_L3_ID_COMP_ID_2_t comp_id_2;
4001 ALT_L3_ID_COMP_ID_3_t comp_id_3;
4005 typedef volatile struct ALT_L3_IDGRP_s ALT_L3_IDGRP_t;
4007 struct ALT_L3_IDGRP_raw_s
4009 uint32_t _pad_0x0_0xfcf[1012];
4010 volatile uint32_t periph_id_4;
4011 uint32_t _pad_0xfd4_0xfdf[3];
4012 volatile uint32_t periph_id_0;
4013 volatile uint32_t periph_id_1;
4014 volatile uint32_t periph_id_2;
4015 volatile uint32_t periph_id_3;
4016 volatile uint32_t comp_id_0;
4017 volatile uint32_t comp_id_1;
4018 volatile uint32_t comp_id_2;
4019 volatile uint32_t comp_id_3;
4023 typedef volatile struct ALT_L3_IDGRP_raw_s ALT_L3_IDGRP_raw_t;
4076 #define ALT_L3_FN_MOD_BM_ISS_RD_E_MULT 0x0
4082 #define ALT_L3_FN_MOD_BM_ISS_RD_E_SINGLE 0x1
4085 #define ALT_L3_FN_MOD_BM_ISS_RD_LSB 0
4087 #define ALT_L3_FN_MOD_BM_ISS_RD_MSB 0
4089 #define ALT_L3_FN_MOD_BM_ISS_RD_WIDTH 1
4091 #define ALT_L3_FN_MOD_BM_ISS_RD_SET_MSK 0x00000001
4093 #define ALT_L3_FN_MOD_BM_ISS_RD_CLR_MSK 0xfffffffe
4095 #define ALT_L3_FN_MOD_BM_ISS_RD_RESET 0x0
4097 #define ALT_L3_FN_MOD_BM_ISS_RD_GET(value) (((value) & 0x00000001) >> 0)
4099 #define ALT_L3_FN_MOD_BM_ISS_RD_SET(value) (((value) << 0) & 0x00000001)
4119 #define ALT_L3_FN_MOD_BM_ISS_WR_E_MULT 0x0
4125 #define ALT_L3_FN_MOD_BM_ISS_WR_E_SINGLE 0x1
4128 #define ALT_L3_FN_MOD_BM_ISS_WR_LSB 1
4130 #define ALT_L3_FN_MOD_BM_ISS_WR_MSB 1
4132 #define ALT_L3_FN_MOD_BM_ISS_WR_WIDTH 1
4134 #define ALT_L3_FN_MOD_BM_ISS_WR_SET_MSK 0x00000002
4136 #define ALT_L3_FN_MOD_BM_ISS_WR_CLR_MSK 0xfffffffd
4138 #define ALT_L3_FN_MOD_BM_ISS_WR_RESET 0x0
4140 #define ALT_L3_FN_MOD_BM_ISS_WR_GET(value) (((value) & 0x00000002) >> 1)
4142 #define ALT_L3_FN_MOD_BM_ISS_WR_SET(value) (((value) << 1) & 0x00000002)
4144 #ifndef __ASSEMBLY__
4155 struct ALT_L3_FN_MOD_BM_ISS_s
4163 typedef volatile struct ALT_L3_FN_MOD_BM_ISS_s ALT_L3_FN_MOD_BM_ISS_t;
4167 #define ALT_L3_FN_MOD_BM_ISS_OFST 0x8
4169 #define ALT_L3_FN_MOD_BM_ISS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_BM_ISS_OFST))
4171 #ifndef __ASSEMBLY__
4182 struct ALT_L3_MST_L4MAIN_s
4184 volatile uint32_t _pad_0x0_0x7[2];
4185 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4189 typedef volatile struct ALT_L3_MST_L4MAIN_s ALT_L3_MST_L4MAIN_t;
4191 struct ALT_L3_MST_L4MAIN_raw_s
4193 uint32_t _pad_0x0_0x7[2];
4194 volatile uint32_t fn_mod_bm_iss;
4198 typedef volatile struct ALT_L3_MST_L4MAIN_raw_s ALT_L3_MST_L4MAIN_raw_t;
4210 #ifndef __ASSEMBLY__
4221 struct ALT_L3_MST_L4SP_s
4223 volatile uint32_t _pad_0x0_0x7[2];
4224 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4228 typedef volatile struct ALT_L3_MST_L4SP_s ALT_L3_MST_L4SP_t;
4230 struct ALT_L3_MST_L4SP_raw_s
4232 uint32_t _pad_0x0_0x7[2];
4233 volatile uint32_t fn_mod_bm_iss;
4237 typedef volatile struct ALT_L3_MST_L4SP_raw_s ALT_L3_MST_L4SP_raw_t;
4249 #ifndef __ASSEMBLY__
4260 struct ALT_L3_MST_L4MP_s
4262 volatile uint32_t _pad_0x0_0x7[2];
4263 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4267 typedef volatile struct ALT_L3_MST_L4MP_s ALT_L3_MST_L4MP_t;
4269 struct ALT_L3_MST_L4MP_raw_s
4271 uint32_t _pad_0x0_0x7[2];
4272 volatile uint32_t fn_mod_bm_iss;
4276 typedef volatile struct ALT_L3_MST_L4MP_raw_s ALT_L3_MST_L4MP_raw_t;
4288 #ifndef __ASSEMBLY__
4299 struct ALT_L3_MST_L4OSC1_s
4301 volatile uint32_t _pad_0x0_0x7[2];
4302 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4306 typedef volatile struct ALT_L3_MST_L4OSC1_s ALT_L3_MST_L4OSC1_t;
4308 struct ALT_L3_MST_L4OSC1_raw_s
4310 uint32_t _pad_0x0_0x7[2];
4311 volatile uint32_t fn_mod_bm_iss;
4315 typedef volatile struct ALT_L3_MST_L4OSC1_raw_s ALT_L3_MST_L4OSC1_raw_t;
4327 #ifndef __ASSEMBLY__
4338 struct ALT_L3_MST_L4SPIM_s
4340 volatile uint32_t _pad_0x0_0x7[2];
4341 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4345 typedef volatile struct ALT_L3_MST_L4SPIM_s ALT_L3_MST_L4SPIM_t;
4347 struct ALT_L3_MST_L4SPIM_raw_s
4349 uint32_t _pad_0x0_0x7[2];
4350 volatile uint32_t fn_mod_bm_iss;
4354 typedef volatile struct ALT_L3_MST_L4SPIM_raw_s ALT_L3_MST_L4SPIM_raw_t;
4399 #define ALT_L3_FN_MOD_RD_E_MULT 0x0
4405 #define ALT_L3_FN_MOD_RD_E_SINGLE 0x1
4408 #define ALT_L3_FN_MOD_RD_LSB 0
4410 #define ALT_L3_FN_MOD_RD_MSB 0
4412 #define ALT_L3_FN_MOD_RD_WIDTH 1
4414 #define ALT_L3_FN_MOD_RD_SET_MSK 0x00000001
4416 #define ALT_L3_FN_MOD_RD_CLR_MSK 0xfffffffe
4418 #define ALT_L3_FN_MOD_RD_RESET 0x0
4420 #define ALT_L3_FN_MOD_RD_GET(value) (((value) & 0x00000001) >> 0)
4422 #define ALT_L3_FN_MOD_RD_SET(value) (((value) << 0) & 0x00000001)
4442 #define ALT_L3_FN_MOD_WR_E_MULT 0x0
4448 #define ALT_L3_FN_MOD_WR_E_SINGLE 0x1
4451 #define ALT_L3_FN_MOD_WR_LSB 1
4453 #define ALT_L3_FN_MOD_WR_MSB 1
4455 #define ALT_L3_FN_MOD_WR_WIDTH 1
4457 #define ALT_L3_FN_MOD_WR_SET_MSK 0x00000002
4459 #define ALT_L3_FN_MOD_WR_CLR_MSK 0xfffffffd
4461 #define ALT_L3_FN_MOD_WR_RESET 0x0
4463 #define ALT_L3_FN_MOD_WR_GET(value) (((value) & 0x00000002) >> 1)
4465 #define ALT_L3_FN_MOD_WR_SET(value) (((value) << 1) & 0x00000002)
4467 #ifndef __ASSEMBLY__
4478 struct ALT_L3_FN_MOD_s
4486 typedef volatile struct ALT_L3_FN_MOD_s ALT_L3_FN_MOD_t;
4490 #define ALT_L3_FN_MOD_OFST 0x108
4492 #define ALT_L3_FN_MOD_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_OFST))
4494 #ifndef __ASSEMBLY__
4505 struct ALT_L3_MST_STM_s
4507 volatile uint32_t _pad_0x0_0x7[2];
4508 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4509 volatile uint32_t _pad_0xc_0x107[63];
4510 ALT_L3_FN_MOD_t fn_mod;
4514 typedef volatile struct ALT_L3_MST_STM_s ALT_L3_MST_STM_t;
4516 struct ALT_L3_MST_STM_raw_s
4518 uint32_t _pad_0x0_0x7[2];
4519 volatile uint32_t fn_mod_bm_iss;
4520 uint32_t _pad_0xc_0x107[63];
4521 volatile uint32_t fn_mod;
4525 typedef volatile struct ALT_L3_MST_STM_raw_s ALT_L3_MST_STM_raw_t;
4539 #ifndef __ASSEMBLY__
4550 struct ALT_L3_MST_LWH2F_s
4552 volatile uint32_t _pad_0x0_0x7[2];
4553 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4554 volatile uint32_t _pad_0xc_0x107[63];
4555 ALT_L3_FN_MOD_t fn_mod;
4559 typedef volatile struct ALT_L3_MST_LWH2F_s ALT_L3_MST_LWH2F_t;
4561 struct ALT_L3_MST_LWH2F_raw_s
4563 uint32_t _pad_0x0_0x7[2];
4564 volatile uint32_t fn_mod_bm_iss;
4565 uint32_t _pad_0xc_0x107[63];
4566 volatile uint32_t fn_mod;
4570 typedef volatile struct ALT_L3_MST_LWH2F_raw_s ALT_L3_MST_LWH2F_raw_t;
4617 #define ALT_L3_AHB_CNTL_DECERR_EN_E_DIS 0x0
4624 #define ALT_L3_AHB_CNTL_DECERR_EN_E_EN 0x1
4627 #define ALT_L3_AHB_CNTL_DECERR_EN_LSB 0
4629 #define ALT_L3_AHB_CNTL_DECERR_EN_MSB 0
4631 #define ALT_L3_AHB_CNTL_DECERR_EN_WIDTH 1
4633 #define ALT_L3_AHB_CNTL_DECERR_EN_SET_MSK 0x00000001
4635 #define ALT_L3_AHB_CNTL_DECERR_EN_CLR_MSK 0xfffffffe
4637 #define ALT_L3_AHB_CNTL_DECERR_EN_RESET 0x0
4639 #define ALT_L3_AHB_CNTL_DECERR_EN_GET(value) (((value) & 0x00000001) >> 0)
4641 #define ALT_L3_AHB_CNTL_DECERR_EN_SET(value) (((value) << 0) & 0x00000001)
4665 #define ALT_L3_AHB_CNTL_FORCE_INCR_E_DIS 0x0
4673 #define ALT_L3_AHB_CNTL_FORCE_INCR_E_EN 0x1
4676 #define ALT_L3_AHB_CNTL_FORCE_INCR_LSB 1
4678 #define ALT_L3_AHB_CNTL_FORCE_INCR_MSB 1
4680 #define ALT_L3_AHB_CNTL_FORCE_INCR_WIDTH 1
4682 #define ALT_L3_AHB_CNTL_FORCE_INCR_SET_MSK 0x00000002
4684 #define ALT_L3_AHB_CNTL_FORCE_INCR_CLR_MSK 0xfffffffd
4686 #define ALT_L3_AHB_CNTL_FORCE_INCR_RESET 0x0
4688 #define ALT_L3_AHB_CNTL_FORCE_INCR_GET(value) (((value) & 0x00000002) >> 1)
4690 #define ALT_L3_AHB_CNTL_FORCE_INCR_SET(value) (((value) << 1) & 0x00000002)
4692 #ifndef __ASSEMBLY__
4703 struct ALT_L3_AHB_CNTL_s
4705 uint32_t decerr_en : 1;
4706 uint32_t force_incr : 1;
4711 typedef volatile struct ALT_L3_AHB_CNTL_s ALT_L3_AHB_CNTL_t;
4715 #define ALT_L3_AHB_CNTL_OFST 0x44
4717 #define ALT_L3_AHB_CNTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_AHB_CNTL_OFST))
4719 #ifndef __ASSEMBLY__
4730 struct ALT_L3_MST_USB1_s
4732 volatile uint32_t _pad_0x0_0x7[2];
4733 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4734 volatile uint32_t _pad_0xc_0x43[14];
4735 ALT_L3_AHB_CNTL_t ahb_cntl;
4739 typedef volatile struct ALT_L3_MST_USB1_s ALT_L3_MST_USB1_t;
4741 struct ALT_L3_MST_USB1_raw_s
4743 uint32_t _pad_0x0_0x7[2];
4744 volatile uint32_t fn_mod_bm_iss;
4745 uint32_t _pad_0xc_0x43[14];
4746 volatile uint32_t ahb_cntl;
4750 typedef volatile struct ALT_L3_MST_USB1_raw_s ALT_L3_MST_USB1_raw_t;
4762 #ifndef __ASSEMBLY__
4773 struct ALT_L3_MST_NANDDATA_s
4775 volatile uint32_t _pad_0x0_0x7[2];
4776 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4777 volatile uint32_t _pad_0xc_0x107[63];
4778 ALT_L3_FN_MOD_t fn_mod;
4782 typedef volatile struct ALT_L3_MST_NANDDATA_s ALT_L3_MST_NANDDATA_t;
4784 struct ALT_L3_MST_NANDDATA_raw_s
4786 uint32_t _pad_0x0_0x7[2];
4787 volatile uint32_t fn_mod_bm_iss;
4788 uint32_t _pad_0xc_0x107[63];
4789 volatile uint32_t fn_mod;
4793 typedef volatile struct ALT_L3_MST_NANDDATA_raw_s ALT_L3_MST_NANDDATA_raw_t;
4805 #ifndef __ASSEMBLY__
4816 struct ALT_L3_MST_USB0_s
4818 volatile uint32_t _pad_0x0_0x7[2];
4819 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4820 volatile uint32_t _pad_0xc_0x43[14];
4821 ALT_L3_AHB_CNTL_t ahb_cntl;
4825 typedef volatile struct ALT_L3_MST_USB0_s ALT_L3_MST_USB0_t;
4827 struct ALT_L3_MST_USB0_raw_s
4829 uint32_t _pad_0x0_0x7[2];
4830 volatile uint32_t fn_mod_bm_iss;
4831 uint32_t _pad_0xc_0x43[14];
4832 volatile uint32_t ahb_cntl;
4836 typedef volatile struct ALT_L3_MST_USB0_raw_s ALT_L3_MST_USB0_raw_t;
4848 #ifndef __ASSEMBLY__
4859 struct ALT_L3_MST_NAND_s
4861 volatile uint32_t _pad_0x0_0x7[2];
4862 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4863 volatile uint32_t _pad_0xc_0x107[63];
4864 ALT_L3_FN_MOD_t fn_mod;
4868 typedef volatile struct ALT_L3_MST_NAND_s ALT_L3_MST_NAND_t;
4870 struct ALT_L3_MST_NAND_raw_s
4872 uint32_t _pad_0x0_0x7[2];
4873 volatile uint32_t fn_mod_bm_iss;
4874 uint32_t _pad_0xc_0x107[63];
4875 volatile uint32_t fn_mod;
4879 typedef volatile struct ALT_L3_MST_NAND_raw_s ALT_L3_MST_NAND_raw_t;
4891 #ifndef __ASSEMBLY__
4902 struct ALT_L3_MST_QSPIDATA_s
4904 volatile uint32_t _pad_0x0_0x7[2];
4905 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
4906 volatile uint32_t _pad_0xc_0x43[14];
4907 ALT_L3_AHB_CNTL_t ahb_cntl;
4911 typedef volatile struct ALT_L3_MST_QSPIDATA_s ALT_L3_MST_QSPIDATA_t;
4913 struct ALT_L3_MST_QSPIDATA_raw_s
4915 uint32_t _pad_0x0_0x7[2];
4916 volatile uint32_t fn_mod_bm_iss;
4917 uint32_t _pad_0xc_0x43[14];
4918 volatile uint32_t ahb_cntl;
4922 typedef volatile struct ALT_L3_MST_QSPIDATA_raw_s ALT_L3_MST_QSPIDATA_raw_t;
4959 #define ALT_L3_WR_TIDEMARK_LEVEL_LSB 0
4961 #define ALT_L3_WR_TIDEMARK_LEVEL_MSB 3
4963 #define ALT_L3_WR_TIDEMARK_LEVEL_WIDTH 4
4965 #define ALT_L3_WR_TIDEMARK_LEVEL_SET_MSK 0x0000000f
4967 #define ALT_L3_WR_TIDEMARK_LEVEL_CLR_MSK 0xfffffff0
4969 #define ALT_L3_WR_TIDEMARK_LEVEL_RESET 0x4
4971 #define ALT_L3_WR_TIDEMARK_LEVEL_GET(value) (((value) & 0x0000000f) >> 0)
4973 #define ALT_L3_WR_TIDEMARK_LEVEL_SET(value) (((value) << 0) & 0x0000000f)
4975 #ifndef __ASSEMBLY__
4986 struct ALT_L3_WR_TIDEMARK_s
4993 typedef volatile struct ALT_L3_WR_TIDEMARK_s ALT_L3_WR_TIDEMARK_t;
4997 #define ALT_L3_WR_TIDEMARK_OFST 0x40
4999 #define ALT_L3_WR_TIDEMARK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_WR_TIDEMARK_OFST))
5001 #ifndef __ASSEMBLY__
5012 struct ALT_L3_MST_FPGAMGRDATA_s
5014 volatile uint32_t _pad_0x0_0x7[2];
5015 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
5016 volatile uint32_t _pad_0xc_0x3f[13];
5017 ALT_L3_WR_TIDEMARK_t wr_tidemark;
5018 volatile uint32_t _pad_0x44_0x107[49];
5019 ALT_L3_FN_MOD_t fn_mod;
5023 typedef volatile struct ALT_L3_MST_FPGAMGRDATA_s ALT_L3_MST_FPGAMGRDATA_t;
5025 struct ALT_L3_MST_FPGAMGRDATA_raw_s
5027 uint32_t _pad_0x0_0x7[2];
5028 volatile uint32_t fn_mod_bm_iss;
5029 uint32_t _pad_0xc_0x3f[13];
5030 volatile uint32_t wr_tidemark;
5031 uint32_t _pad_0x44_0x107[49];
5032 volatile uint32_t fn_mod;
5036 typedef volatile struct ALT_L3_MST_FPGAMGRDATA_raw_s ALT_L3_MST_FPGAMGRDATA_raw_t;
5049 #ifndef __ASSEMBLY__
5060 struct ALT_L3_MST_H2F_s
5062 volatile uint32_t _pad_0x0_0x7[2];
5063 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
5064 volatile uint32_t _pad_0xc_0x3f[13];
5065 ALT_L3_WR_TIDEMARK_t wr_tidemark;
5066 volatile uint32_t _pad_0x44_0x107[49];
5067 ALT_L3_FN_MOD_t fn_mod;
5071 typedef volatile struct ALT_L3_MST_H2F_s ALT_L3_MST_H2F_t;
5073 struct ALT_L3_MST_H2F_raw_s
5075 uint32_t _pad_0x0_0x7[2];
5076 volatile uint32_t fn_mod_bm_iss;
5077 uint32_t _pad_0xc_0x3f[13];
5078 volatile uint32_t wr_tidemark;
5079 uint32_t _pad_0x44_0x107[49];
5080 volatile uint32_t fn_mod;
5084 typedef volatile struct ALT_L3_MST_H2F_raw_s ALT_L3_MST_H2F_raw_t;
5096 #ifndef __ASSEMBLY__
5107 struct ALT_L3_MST_ACP_s
5109 volatile uint32_t _pad_0x0_0x7[2];
5110 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
5111 volatile uint32_t _pad_0xc_0x107[63];
5112 ALT_L3_FN_MOD_t fn_mod;
5116 typedef volatile struct ALT_L3_MST_ACP_s ALT_L3_MST_ACP_t;
5118 struct ALT_L3_MST_ACP_raw_s
5120 uint32_t _pad_0x0_0x7[2];
5121 volatile uint32_t fn_mod_bm_iss;
5122 uint32_t _pad_0xc_0x107[63];
5123 volatile uint32_t fn_mod;
5127 typedef volatile struct ALT_L3_MST_ACP_raw_s ALT_L3_MST_ACP_raw_t;
5139 #ifndef __ASSEMBLY__
5150 struct ALT_L3_MST_ROM_s
5152 volatile uint32_t _pad_0x0_0x7[2];
5153 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
5154 volatile uint32_t _pad_0xc_0x107[63];
5155 ALT_L3_FN_MOD_t fn_mod;
5159 typedef volatile struct ALT_L3_MST_ROM_s ALT_L3_MST_ROM_t;
5161 struct ALT_L3_MST_ROM_raw_s
5163 uint32_t _pad_0x0_0x7[2];
5164 volatile uint32_t fn_mod_bm_iss;
5165 uint32_t _pad_0xc_0x107[63];
5166 volatile uint32_t fn_mod;
5170 typedef volatile struct ALT_L3_MST_ROM_raw_s ALT_L3_MST_ROM_raw_t;
5182 #ifndef __ASSEMBLY__
5193 struct ALT_L3_MST_OCRAM_s
5195 volatile uint32_t _pad_0x0_0x7[2];
5196 ALT_L3_FN_MOD_BM_ISS_t fn_mod_bm_iss;
5197 volatile uint32_t _pad_0xc_0x3f[13];
5198 ALT_L3_WR_TIDEMARK_t wr_tidemark;
5199 volatile uint32_t _pad_0x44_0x107[49];
5200 ALT_L3_FN_MOD_t fn_mod;
5204 typedef volatile struct ALT_L3_MST_OCRAM_s ALT_L3_MST_OCRAM_t;
5206 struct ALT_L3_MST_OCRAM_raw_s
5208 uint32_t _pad_0x0_0x7[2];
5209 volatile uint32_t fn_mod_bm_iss;
5210 uint32_t _pad_0xc_0x3f[13];
5211 volatile uint32_t wr_tidemark;
5212 uint32_t _pad_0x44_0x107[49];
5213 volatile uint32_t fn_mod;
5217 typedef volatile struct ALT_L3_MST_OCRAM_raw_s ALT_L3_MST_OCRAM_raw_t;
5221 #ifndef __ASSEMBLY__
5232 struct ALT_L3_MSTGRP_s
5234 ALT_L3_MST_L4MAIN_t mastergrp_l4main;
5235 volatile uint32_t _pad_0xc_0xfff[1021];
5236 ALT_L3_MST_L4SP_t mastergrp_l4sp;
5237 volatile uint32_t _pad_0x100c_0x1fff[1021];
5238 ALT_L3_MST_L4MP_t mastergrp_l4mp;
5239 volatile uint32_t _pad_0x200c_0x2fff[1021];
5240 ALT_L3_MST_L4OSC1_t mastergrp_l4osc1;
5241 volatile uint32_t _pad_0x300c_0x3fff[1021];
5242 ALT_L3_MST_L4SPIM_t mastergrp_l4spim;
5243 volatile uint32_t _pad_0x400c_0x4fff[1021];
5244 ALT_L3_MST_STM_t mastergrp_stm;
5245 volatile uint32_t _pad_0x510c_0x5fff[957];
5246 ALT_L3_MST_LWH2F_t mastergrp_lwhps2fpga;
5247 volatile uint32_t _pad_0x610c_0x7fff[1981];
5248 ALT_L3_MST_USB1_t mastergrp_usb1;
5249 volatile uint32_t _pad_0x8048_0x8fff[1006];
5250 ALT_L3_MST_NANDDATA_t mastergrp_nanddata;
5251 volatile uint32_t _pad_0x910c_0x1dfff[21437];
5252 ALT_L3_MST_USB0_t mastergrp_usb0;
5253 volatile uint32_t _pad_0x1e048_0x1efff[1006];
5254 ALT_L3_MST_NAND_t mastergrp_nandregs;
5255 volatile uint32_t _pad_0x1f10c_0x1ffff[957];
5256 ALT_L3_MST_QSPIDATA_t mastergrp_qspidata;
5257 volatile uint32_t _pad_0x20048_0x20fff[1006];
5258 ALT_L3_MST_FPGAMGRDATA_t mastergrp_fpgamgrdata;
5259 volatile uint32_t _pad_0x2110c_0x21fff[957];
5260 ALT_L3_MST_H2F_t mastergrp_hps2fpga;
5261 volatile uint32_t _pad_0x2210c_0x22fff[957];
5262 ALT_L3_MST_ACP_t mastergrp_acp;
5263 volatile uint32_t _pad_0x2310c_0x23fff[957];
5264 ALT_L3_MST_ROM_t mastergrp_rom;
5265 volatile uint32_t _pad_0x2410c_0x24fff[957];
5266 ALT_L3_MST_OCRAM_t mastergrp_ocram;
5270 typedef volatile struct ALT_L3_MSTGRP_s ALT_L3_MSTGRP_t;
5272 struct ALT_L3_MSTGRP_raw_s
5274 ALT_L3_MST_L4MAIN_raw_t mastergrp_l4main;
5275 uint32_t _pad_0xc_0xfff[1021];
5276 ALT_L3_MST_L4SP_raw_t mastergrp_l4sp;
5277 uint32_t _pad_0x100c_0x1fff[1021];
5278 ALT_L3_MST_L4MP_raw_t mastergrp_l4mp;
5279 uint32_t _pad_0x200c_0x2fff[1021];
5280 ALT_L3_MST_L4OSC1_raw_t mastergrp_l4osc1;
5281 uint32_t _pad_0x300c_0x3fff[1021];
5282 ALT_L3_MST_L4SPIM_raw_t mastergrp_l4spim;
5283 uint32_t _pad_0x400c_0x4fff[1021];
5284 ALT_L3_MST_STM_raw_t mastergrp_stm;
5285 uint32_t _pad_0x510c_0x5fff[957];
5286 ALT_L3_MST_LWH2F_raw_t mastergrp_lwhps2fpga;
5287 uint32_t _pad_0x610c_0x7fff[1981];
5288 ALT_L3_MST_USB1_raw_t mastergrp_usb1;
5289 uint32_t _pad_0x8048_0x8fff[1006];
5290 ALT_L3_MST_NANDDATA_raw_t mastergrp_nanddata;
5291 uint32_t _pad_0x910c_0x1dfff[21437];
5292 ALT_L3_MST_USB0_raw_t mastergrp_usb0;
5293 uint32_t _pad_0x1e048_0x1efff[1006];
5294 ALT_L3_MST_NAND_raw_t mastergrp_nandregs;
5295 uint32_t _pad_0x1f10c_0x1ffff[957];
5296 ALT_L3_MST_QSPIDATA_raw_t mastergrp_qspidata;
5297 uint32_t _pad_0x20048_0x20fff[1006];
5298 ALT_L3_MST_FPGAMGRDATA_raw_t mastergrp_fpgamgrdata;
5299 uint32_t _pad_0x2110c_0x21fff[957];
5300 ALT_L3_MST_H2F_raw_t mastergrp_hps2fpga;
5301 uint32_t _pad_0x2210c_0x22fff[957];
5302 ALT_L3_MST_ACP_raw_t mastergrp_acp;
5303 uint32_t _pad_0x2310c_0x23fff[957];
5304 ALT_L3_MST_ROM_raw_t mastergrp_rom;
5305 uint32_t _pad_0x2410c_0x24fff[957];
5306 ALT_L3_MST_OCRAM_raw_t mastergrp_ocram;
5310 typedef volatile struct ALT_L3_MSTGRP_raw_s ALT_L3_MSTGRP_raw_t;
5364 #define ALT_L3_FN_MOD2_BYPASS_MERGE_E_ALTER 0x0
5371 #define ALT_L3_FN_MOD2_BYPASS_MERGE_E_NOALTER 0x1
5374 #define ALT_L3_FN_MOD2_BYPASS_MERGE_LSB 0
5376 #define ALT_L3_FN_MOD2_BYPASS_MERGE_MSB 0
5378 #define ALT_L3_FN_MOD2_BYPASS_MERGE_WIDTH 1
5380 #define ALT_L3_FN_MOD2_BYPASS_MERGE_SET_MSK 0x00000001
5382 #define ALT_L3_FN_MOD2_BYPASS_MERGE_CLR_MSK 0xfffffffe
5384 #define ALT_L3_FN_MOD2_BYPASS_MERGE_RESET 0x0
5386 #define ALT_L3_FN_MOD2_BYPASS_MERGE_GET(value) (((value) & 0x00000001) >> 0)
5388 #define ALT_L3_FN_MOD2_BYPASS_MERGE_SET(value) (((value) << 0) & 0x00000001)
5390 #ifndef __ASSEMBLY__
5401 struct ALT_L3_FN_MOD2_s
5403 uint32_t bypass_merge : 1;
5408 typedef volatile struct ALT_L3_FN_MOD2_s ALT_L3_FN_MOD2_t;
5412 #define ALT_L3_FN_MOD2_OFST 0x24
5414 #define ALT_L3_FN_MOD2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD2_OFST))
5456 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_E_DEFAULT 0x0
5462 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_E_SINGLES 0x1
5465 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_LSB 0
5467 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_MSB 0
5469 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_WIDTH 1
5471 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_SET_MSK 0x00000001
5473 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_CLR_MSK 0xfffffffe
5475 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_RESET 0x0
5477 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_GET(value) (((value) & 0x00000001) >> 0)
5479 #define ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_SET(value) (((value) << 0) & 0x00000001)
5507 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_E_DEFAULT 0x0
5513 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_E_SINGLES 0x1
5516 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_LSB 1
5518 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_MSB 1
5520 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_WIDTH 1
5522 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_SET_MSK 0x00000002
5524 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_CLR_MSK 0xfffffffd
5526 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_RESET 0x0
5528 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_GET(value) (((value) & 0x00000002) >> 1)
5530 #define ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_SET(value) (((value) << 1) & 0x00000002)
5532 #ifndef __ASSEMBLY__
5543 struct ALT_L3_FN_MOD_AHB_s
5545 uint32_t rd_incr_override : 1;
5546 uint32_t wr_incr_override : 1;
5551 typedef volatile struct ALT_L3_FN_MOD_AHB_s ALT_L3_FN_MOD_AHB_t;
5555 #define ALT_L3_FN_MOD_AHB_OFST 0x28
5557 #define ALT_L3_FN_MOD_AHB_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_AHB_OFST))
5582 #define ALT_L3_RD_QOS_PRI_LSB 0
5584 #define ALT_L3_RD_QOS_PRI_MSB 3
5586 #define ALT_L3_RD_QOS_PRI_WIDTH 4
5588 #define ALT_L3_RD_QOS_PRI_SET_MSK 0x0000000f
5590 #define ALT_L3_RD_QOS_PRI_CLR_MSK 0xfffffff0
5592 #define ALT_L3_RD_QOS_PRI_RESET 0x0
5594 #define ALT_L3_RD_QOS_PRI_GET(value) (((value) & 0x0000000f) >> 0)
5596 #define ALT_L3_RD_QOS_PRI_SET(value) (((value) << 0) & 0x0000000f)
5598 #ifndef __ASSEMBLY__
5609 struct ALT_L3_RD_QOS_s
5616 typedef volatile struct ALT_L3_RD_QOS_s ALT_L3_RD_QOS_t;
5620 #define ALT_L3_RD_QOS_OFST 0x100
5622 #define ALT_L3_RD_QOS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_RD_QOS_OFST))
5647 #define ALT_L3_WR_QOS_PRI_LSB 0
5649 #define ALT_L3_WR_QOS_PRI_MSB 3
5651 #define ALT_L3_WR_QOS_PRI_WIDTH 4
5653 #define ALT_L3_WR_QOS_PRI_SET_MSK 0x0000000f
5655 #define ALT_L3_WR_QOS_PRI_CLR_MSK 0xfffffff0
5657 #define ALT_L3_WR_QOS_PRI_RESET 0x0
5659 #define ALT_L3_WR_QOS_PRI_GET(value) (((value) & 0x0000000f) >> 0)
5661 #define ALT_L3_WR_QOS_PRI_SET(value) (((value) << 0) & 0x0000000f)
5663 #ifndef __ASSEMBLY__
5674 struct ALT_L3_WR_QOS_s
5681 typedef volatile struct ALT_L3_WR_QOS_s ALT_L3_WR_QOS_t;
5685 #define ALT_L3_WR_QOS_OFST 0x104
5687 #define ALT_L3_WR_QOS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_WR_QOS_OFST))
5689 #ifndef __ASSEMBLY__
5700 struct ALT_L3_SLV_DAP_s
5702 volatile uint32_t _pad_0x0_0x23[9];
5703 ALT_L3_FN_MOD2_t fn_mod2;
5704 ALT_L3_FN_MOD_AHB_t fn_mod_ahb;
5705 volatile uint32_t _pad_0x2c_0xff[53];
5706 ALT_L3_RD_QOS_t read_qos;
5707 ALT_L3_WR_QOS_t write_qos;
5708 ALT_L3_FN_MOD_t fn_mod;
5712 typedef volatile struct ALT_L3_SLV_DAP_s ALT_L3_SLV_DAP_t;
5714 struct ALT_L3_SLV_DAP_raw_s
5716 uint32_t _pad_0x0_0x23[9];
5717 volatile uint32_t fn_mod2;
5718 volatile uint32_t fn_mod_ahb;
5719 uint32_t _pad_0x2c_0xff[53];
5720 volatile uint32_t read_qos;
5721 volatile uint32_t write_qos;
5722 volatile uint32_t fn_mod;
5726 typedef volatile struct ALT_L3_SLV_DAP_raw_s ALT_L3_SLV_DAP_raw_t;
5738 #ifndef __ASSEMBLY__
5749 struct ALT_L3_SLV_MPU_s
5751 volatile uint32_t _pad_0x0_0xff[64];
5752 ALT_L3_RD_QOS_t read_qos;
5753 ALT_L3_WR_QOS_t write_qos;
5754 ALT_L3_FN_MOD_t fn_mod;
5758 typedef volatile struct ALT_L3_SLV_MPU_s ALT_L3_SLV_MPU_t;
5760 struct ALT_L3_SLV_MPU_raw_s
5762 uint32_t _pad_0x0_0xff[64];
5763 volatile uint32_t read_qos;
5764 volatile uint32_t write_qos;
5765 volatile uint32_t fn_mod;
5769 typedef volatile struct ALT_L3_SLV_MPU_raw_s ALT_L3_SLV_MPU_raw_t;
5782 #ifndef __ASSEMBLY__
5793 struct ALT_L3_SLV_SDMMC_s
5795 volatile uint32_t _pad_0x0_0x27[10];
5796 ALT_L3_FN_MOD_AHB_t fn_mod_ahb;
5797 volatile uint32_t _pad_0x2c_0xff[53];
5798 ALT_L3_RD_QOS_t read_qos;
5799 ALT_L3_WR_QOS_t write_qos;
5800 ALT_L3_FN_MOD_t fn_mod;
5804 typedef volatile struct ALT_L3_SLV_SDMMC_s ALT_L3_SLV_SDMMC_t;
5806 struct ALT_L3_SLV_SDMMC_raw_s
5808 uint32_t _pad_0x0_0x27[10];
5809 volatile uint32_t fn_mod_ahb;
5810 uint32_t _pad_0x2c_0xff[53];
5811 volatile uint32_t read_qos;
5812 volatile uint32_t write_qos;
5813 volatile uint32_t fn_mod;
5817 typedef volatile struct ALT_L3_SLV_SDMMC_raw_s ALT_L3_SLV_SDMMC_raw_t;
5829 #ifndef __ASSEMBLY__
5840 struct ALT_L3_SLV_DMA_s
5842 volatile uint32_t _pad_0x0_0xff[64];
5843 ALT_L3_RD_QOS_t read_qos;
5844 ALT_L3_WR_QOS_t write_qos;
5845 ALT_L3_FN_MOD_t fn_mod;
5849 typedef volatile struct ALT_L3_SLV_DMA_s ALT_L3_SLV_DMA_t;
5851 struct ALT_L3_SLV_DMA_raw_s
5853 uint32_t _pad_0x0_0xff[64];
5854 volatile uint32_t read_qos;
5855 volatile uint32_t write_qos;
5856 volatile uint32_t fn_mod;
5860 typedef volatile struct ALT_L3_SLV_DMA_raw_s ALT_L3_SLV_DMA_raw_t;
5873 #ifndef __ASSEMBLY__
5884 struct ALT_L3_SLV_F2H_s
5886 volatile uint32_t _pad_0x0_0x3f[16];
5887 ALT_L3_WR_TIDEMARK_t wr_tidemark;
5888 volatile uint32_t _pad_0x44_0xff[47];
5889 ALT_L3_RD_QOS_t read_qos;
5890 ALT_L3_WR_QOS_t write_qos;
5891 ALT_L3_FN_MOD_t fn_mod;
5895 typedef volatile struct ALT_L3_SLV_F2H_s ALT_L3_SLV_F2H_t;
5897 struct ALT_L3_SLV_F2H_raw_s
5899 uint32_t _pad_0x0_0x3f[16];
5900 volatile uint32_t wr_tidemark;
5901 uint32_t _pad_0x44_0xff[47];
5902 volatile uint32_t read_qos;
5903 volatile uint32_t write_qos;
5904 volatile uint32_t fn_mod;
5908 typedef volatile struct ALT_L3_SLV_F2H_raw_s ALT_L3_SLV_F2H_raw_t;
5920 #ifndef __ASSEMBLY__
5931 struct ALT_L3_SLV_ETR_s
5933 volatile uint32_t _pad_0x0_0xff[64];
5934 ALT_L3_RD_QOS_t read_qos;
5935 ALT_L3_WR_QOS_t write_qos;
5936 ALT_L3_FN_MOD_t fn_mod;
5940 typedef volatile struct ALT_L3_SLV_ETR_s ALT_L3_SLV_ETR_t;
5942 struct ALT_L3_SLV_ETR_raw_s
5944 uint32_t _pad_0x0_0xff[64];
5945 volatile uint32_t read_qos;
5946 volatile uint32_t write_qos;
5947 volatile uint32_t fn_mod;
5951 typedef volatile struct ALT_L3_SLV_ETR_raw_s ALT_L3_SLV_ETR_raw_t;
5964 #ifndef __ASSEMBLY__
5975 struct ALT_L3_SLV_EMAC0_s
5977 volatile uint32_t _pad_0x0_0xff[64];
5978 ALT_L3_RD_QOS_t read_qos;
5979 ALT_L3_WR_QOS_t write_qos;
5980 ALT_L3_FN_MOD_t fn_mod;
5984 typedef volatile struct ALT_L3_SLV_EMAC0_s ALT_L3_SLV_EMAC0_t;
5986 struct ALT_L3_SLV_EMAC0_raw_s
5988 uint32_t _pad_0x0_0xff[64];
5989 volatile uint32_t read_qos;
5990 volatile uint32_t write_qos;
5991 volatile uint32_t fn_mod;
5995 typedef volatile struct ALT_L3_SLV_EMAC0_raw_s ALT_L3_SLV_EMAC0_raw_t;
6008 #ifndef __ASSEMBLY__
6019 struct ALT_L3_SLV_EMAC1_s
6021 volatile uint32_t _pad_0x0_0xff[64];
6022 ALT_L3_RD_QOS_t read_qos;
6023 ALT_L3_WR_QOS_t write_qos;
6024 ALT_L3_FN_MOD_t fn_mod;
6028 typedef volatile struct ALT_L3_SLV_EMAC1_s ALT_L3_SLV_EMAC1_t;
6030 struct ALT_L3_SLV_EMAC1_raw_s
6032 uint32_t _pad_0x0_0xff[64];
6033 volatile uint32_t read_qos;
6034 volatile uint32_t write_qos;
6035 volatile uint32_t fn_mod;
6039 typedef volatile struct ALT_L3_SLV_EMAC1_raw_s ALT_L3_SLV_EMAC1_raw_t;
6052 #ifndef __ASSEMBLY__
6063 struct ALT_L3_SLV_USB0_s
6065 volatile uint32_t _pad_0x0_0x27[10];
6066 ALT_L3_FN_MOD_AHB_t fn_mod_ahb;
6067 volatile uint32_t _pad_0x2c_0xff[53];
6068 ALT_L3_RD_QOS_t read_qos;
6069 ALT_L3_WR_QOS_t write_qos;
6070 ALT_L3_FN_MOD_t fn_mod;
6074 typedef volatile struct ALT_L3_SLV_USB0_s ALT_L3_SLV_USB0_t;
6076 struct ALT_L3_SLV_USB0_raw_s
6078 uint32_t _pad_0x0_0x27[10];
6079 volatile uint32_t fn_mod_ahb;
6080 uint32_t _pad_0x2c_0xff[53];
6081 volatile uint32_t read_qos;
6082 volatile uint32_t write_qos;
6083 volatile uint32_t fn_mod;
6087 typedef volatile struct ALT_L3_SLV_USB0_raw_s ALT_L3_SLV_USB0_raw_t;
6100 #ifndef __ASSEMBLY__
6111 struct ALT_L3_SLV_NAND_s
6113 volatile uint32_t _pad_0x0_0xff[64];
6114 ALT_L3_RD_QOS_t read_qos;
6115 ALT_L3_WR_QOS_t write_qos;
6116 ALT_L3_FN_MOD_t fn_mod;
6120 typedef volatile struct ALT_L3_SLV_NAND_s ALT_L3_SLV_NAND_t;
6122 struct ALT_L3_SLV_NAND_raw_s
6124 uint32_t _pad_0x0_0xff[64];
6125 volatile uint32_t read_qos;
6126 volatile uint32_t write_qos;
6127 volatile uint32_t fn_mod;
6131 typedef volatile struct ALT_L3_SLV_NAND_raw_s ALT_L3_SLV_NAND_raw_t;
6144 #ifndef __ASSEMBLY__
6155 struct ALT_L3_SLV_USB1_s
6157 volatile uint32_t _pad_0x0_0x27[10];
6158 ALT_L3_FN_MOD_AHB_t fn_mod_ahb;
6159 volatile uint32_t _pad_0x2c_0xff[53];
6160 ALT_L3_RD_QOS_t read_qos;
6161 ALT_L3_WR_QOS_t write_qos;
6162 ALT_L3_FN_MOD_t fn_mod;
6166 typedef volatile struct ALT_L3_SLV_USB1_s ALT_L3_SLV_USB1_t;
6168 struct ALT_L3_SLV_USB1_raw_s
6170 uint32_t _pad_0x0_0x27[10];
6171 volatile uint32_t fn_mod_ahb;
6172 uint32_t _pad_0x2c_0xff[53];
6173 volatile uint32_t read_qos;
6174 volatile uint32_t write_qos;
6175 volatile uint32_t fn_mod;
6179 typedef volatile struct ALT_L3_SLV_USB1_raw_s ALT_L3_SLV_USB1_raw_t;
6183 #ifndef __ASSEMBLY__
6194 struct ALT_L3_SLVGRP_s
6196 ALT_L3_SLV_DAP_t slavegrp_dap;
6197 volatile uint32_t _pad_0x10c_0xfff[957];
6198 ALT_L3_SLV_MPU_t slavegrp_mpu;
6199 volatile uint32_t _pad_0x110c_0x1fff[957];
6200 ALT_L3_SLV_SDMMC_t slavegrp_sdmmc;
6201 volatile uint32_t _pad_0x210c_0x2fff[957];
6202 ALT_L3_SLV_DMA_t slavegrp_dma;
6203 volatile uint32_t _pad_0x310c_0x3fff[957];
6204 ALT_L3_SLV_F2H_t slavegrp_fpga2hps;
6205 volatile uint32_t _pad_0x410c_0x4fff[957];
6206 ALT_L3_SLV_ETR_t slavegrp_etr;
6207 volatile uint32_t _pad_0x510c_0x5fff[957];
6208 ALT_L3_SLV_EMAC0_t slavegrp_emac0;
6209 volatile uint32_t _pad_0x610c_0x6fff[957];
6210 ALT_L3_SLV_EMAC1_t slavegrp_emac1;
6211 volatile uint32_t _pad_0x710c_0x7fff[957];
6212 ALT_L3_SLV_USB0_t slavegrp_usb0;
6213 volatile uint32_t _pad_0x810c_0x8fff[957];
6214 ALT_L3_SLV_NAND_t slavegrp_nand;
6215 volatile uint32_t _pad_0x910c_0x9fff[957];
6216 ALT_L3_SLV_USB1_t slavegrp_usb1;
6220 typedef volatile struct ALT_L3_SLVGRP_s ALT_L3_SLVGRP_t;
6222 struct ALT_L3_SLVGRP_raw_s
6224 ALT_L3_SLV_DAP_raw_t slavegrp_dap;
6225 uint32_t _pad_0x10c_0xfff[957];
6226 ALT_L3_SLV_MPU_raw_t slavegrp_mpu;
6227 uint32_t _pad_0x110c_0x1fff[957];
6228 ALT_L3_SLV_SDMMC_raw_t slavegrp_sdmmc;
6229 uint32_t _pad_0x210c_0x2fff[957];
6230 ALT_L3_SLV_DMA_raw_t slavegrp_dma;
6231 uint32_t _pad_0x310c_0x3fff[957];
6232 ALT_L3_SLV_F2H_raw_t slavegrp_fpga2hps;
6233 uint32_t _pad_0x410c_0x4fff[957];
6234 ALT_L3_SLV_ETR_raw_t slavegrp_etr;
6235 uint32_t _pad_0x510c_0x5fff[957];
6236 ALT_L3_SLV_EMAC0_raw_t slavegrp_emac0;
6237 uint32_t _pad_0x610c_0x6fff[957];
6238 ALT_L3_SLV_EMAC1_raw_t slavegrp_emac1;
6239 uint32_t _pad_0x710c_0x7fff[957];
6240 ALT_L3_SLV_USB0_raw_t slavegrp_usb0;
6241 uint32_t _pad_0x810c_0x8fff[957];
6242 ALT_L3_SLV_NAND_raw_t slavegrp_nand;
6243 uint32_t _pad_0x910c_0x9fff[957];
6244 ALT_L3_SLV_USB1_raw_t slavegrp_usb1;
6248 typedef volatile struct ALT_L3_SLVGRP_raw_s ALT_L3_SLVGRP_raw_t;
6252 #ifndef __ASSEMBLY__
6265 ALT_L3_REMAP_t remap;
6266 volatile uint32_t _pad_0x4_0x7;
6267 ALT_L3_SECGRP_t secgrp;
6268 volatile uint32_t _pad_0xa4_0xfff[983];
6269 ALT_L3_IDGRP_t idgrp;
6270 ALT_L3_MSTGRP_t mastergrp;
6271 volatile uint32_t _pad_0x2710c_0x41fff[27581];
6272 ALT_L3_SLVGRP_t slavegrp;
6273 volatile uint32_t _pad_0x4c10c_0x80000[53181];
6277 typedef volatile struct ALT_L3_s ALT_L3_t;
6281 volatile uint32_t remap;
6282 uint32_t _pad_0x4_0x7;
6283 ALT_L3_SECGRP_raw_t secgrp;
6284 uint32_t _pad_0xa4_0xfff[983];
6285 ALT_L3_IDGRP_raw_t idgrp;
6286 ALT_L3_MSTGRP_raw_t mastergrp;
6287 uint32_t _pad_0x2710c_0x41fff[27581];
6288 ALT_L3_SLVGRP_raw_t slavegrp;
6289 uint32_t _pad_0x4c10c_0x80000[53181];
6293 typedef volatile struct ALT_L3_raw_s ALT_L3_raw_t;