Hardware Libraries  20.1
Stratix 10 SoC Hardware Manager
 All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Groups
alt_noc_ccu_ios_cs_obs_at_main_atbendpt.h
1 /***********************************************************************************
2 * *
3 * Copyright 2013-2015 Altera Corporation. All Rights Reserved. *
4 * *
5 * Redistribution and use in source and binary forms, with or without *
6 * modification, are permitted provided that the following conditions are met: *
7 * *
8 * 1. Redistributions of source code must retain the above copyright notice, *
9 * this list of conditions and the following disclaimer. *
10 * *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, *
12 * this list of conditions and the following disclaimer in the documentation *
13 * and/or other materials provided with the distribution. *
14 * *
15 * 3. Neither the name of the copyright holder nor the names of its contributors *
16 * may be used to endorse or promote products derived from this software without *
17 * specific prior written permission. *
18 * *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" *
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE *
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE *
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE *
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF *
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS *
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN *
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) *
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE *
29 * POSSIBILITY OF SUCH DAMAGE. *
30 * *
31 ***********************************************************************************/
32 
33 /* Altera - ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT */
34 
35 #ifndef __ALT_SOCAL_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_H__
36 #define __ALT_SOCAL_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
48 /*
49  * Component : NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT
50  *
51  */
52 /*
53  * Register : cs_obs_at_main_AtbEndPoint_Id_CoreId
54  *
55  * Register Layout
56  *
57  * Bits | Access | Reset | Description
58  * :-------|:-------|:---------|:------------------------------------------------------------------------------------------
59  * [7:0] | R | 0x7 | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID
60  * [31:8] | R | 0x5a13a9 | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM
61  *
62  */
63 /*
64  * Field : CORETYPEID
65  *
66  * Field identifying the type of IP.
67  *
68  * Field Access Macros:
69  *
70  */
71 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID register field. */
72 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID_LSB 0
73 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID register field. */
74 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID_MSB 7
75 /* The width in bits of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID register field. */
76 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID_WIDTH 8
77 /* The mask used to set the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID register field value. */
78 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID_SET_MSK 0x000000ff
79 /* The mask used to clear the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID register field value. */
80 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID_CLR_MSK 0xffffff00
81 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID register field. */
82 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID_RESET 0x7
83 /* Extracts the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID field value from a register. */
84 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID_GET(value) (((value) & 0x000000ff) >> 0)
85 /* Produces a ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID register field value suitable for setting the register. */
86 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID_SET(value) (((value) << 0) & 0x000000ff)
87 
88 /*
89  * Field : CORECHECKSUM
90  *
91  * Field containing a checksum of the parameters of the IP.
92  *
93  * Field Access Macros:
94  *
95  */
96 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM register field. */
97 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM_LSB 8
98 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM register field. */
99 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM_MSB 31
100 /* The width in bits of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM register field. */
101 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM_WIDTH 24
102 /* The mask used to set the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM register field value. */
103 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM_SET_MSK 0xffffff00
104 /* The mask used to clear the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM register field value. */
105 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM_CLR_MSK 0x000000ff
106 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM register field. */
107 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM_RESET 0x5a13a9
108 /* Extracts the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM field value from a register. */
109 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
110 /* Produces a ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM register field value suitable for setting the register. */
111 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
112 
113 #ifndef __ASSEMBLY__
114 /*
115  * WARNING: The C register and register group struct declarations are provided for
116  * convenience and illustrative purposes. They should, however, be used with
117  * caution as the C language standard provides no guarantees about the alignment or
118  * atomicity of device memory accesses. The recommended practice for coding device
119  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
120  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
121  * alt_write_dword() functions for 64 bit registers.
122  *
123  * The struct declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID.
124  */
125 struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_s
126 {
127  const volatile uint32_t CORETYPEID : 8; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORETYPEID */
128  const volatile uint32_t CORECHECKSUM : 24; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_CORECHECKSUM */
129 };
130 
131 /* The typedef declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID. */
132 typedef struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_s ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_t;
133 #endif /* __ASSEMBLY__ */
134 
135 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID register. */
136 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_RESET 0x5a13a907
137 /* The byte offset of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID register from the beginning of the component. */
138 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_OFST 0x0
139 
140 /*
141  * Register : cs_obs_at_main_AtbEndPoint_Id_RevisionId
142  *
143  * Register Layout
144  *
145  * Bits | Access | Reset | Description
146  * :-------|:-------|:------|:-------------------------------------------------------------------------------------------
147  * [7:0] | R | 0x0 | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID
148  * [31:8] | R | 0x148 | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID
149  *
150  */
151 /*
152  * Field : USERID
153  *
154  * Field containing a user defined value, not used anywhere inside the IP itself.
155  *
156  * Field Access Macros:
157  *
158  */
159 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID register field. */
160 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID_LSB 0
161 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID register field. */
162 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID_MSB 7
163 /* The width in bits of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID register field. */
164 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID_WIDTH 8
165 /* The mask used to set the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID register field value. */
166 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID_SET_MSK 0x000000ff
167 /* The mask used to clear the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID register field value. */
168 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID_CLR_MSK 0xffffff00
169 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID register field. */
170 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID_RESET 0x0
171 /* Extracts the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID field value from a register. */
172 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID_GET(value) (((value) & 0x000000ff) >> 0)
173 /* Produces a ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID register field value suitable for setting the register. */
174 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID_SET(value) (((value) << 0) & 0x000000ff)
175 
176 /*
177  * Field : FLEXNOCID
178  *
179  * Field containing the build revision of the software used to generate the IP HDL
180  * code.
181  *
182  * Field Access Macros:
183  *
184  */
185 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID register field. */
186 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID_LSB 8
187 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID register field. */
188 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID_MSB 31
189 /* The width in bits of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID register field. */
190 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID_WIDTH 24
191 /* The mask used to set the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID register field value. */
192 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID_SET_MSK 0xffffff00
193 /* The mask used to clear the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID register field value. */
194 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID_CLR_MSK 0x000000ff
195 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID register field. */
196 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID_RESET 0x148
197 /* Extracts the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID field value from a register. */
198 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
199 /* Produces a ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID register field value suitable for setting the register. */
200 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
201 
202 #ifndef __ASSEMBLY__
203 /*
204  * WARNING: The C register and register group struct declarations are provided for
205  * convenience and illustrative purposes. They should, however, be used with
206  * caution as the C language standard provides no guarantees about the alignment or
207  * atomicity of device memory accesses. The recommended practice for coding device
208  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
209  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
210  * alt_write_dword() functions for 64 bit registers.
211  *
212  * The struct declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID.
213  */
214 struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_s
215 {
216  const volatile uint32_t USERID : 8; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_USERID */
217  const volatile uint32_t FLEXNOCID : 24; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_FLEXNOCID */
218 };
219 
220 /* The typedef declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID. */
221 typedef struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_s ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_t;
222 #endif /* __ASSEMBLY__ */
223 
224 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID register. */
225 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_RESET 0x00014800
226 /* The byte offset of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID register from the beginning of the component. */
227 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_OFST 0x4
228 
229 /*
230  * Register : cs_obs_at_main_AtbEndPoint_AtbId
231  *
232  * Register Layout
233  *
234  * Bits | Access | Reset | Description
235  * :-------|:-------|:--------|:-------------------------------------------------------------------------------
236  * [6:0] | RW | 0x0 | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID
237  * [31:7] | ??? | Unknown | *UNDEFINED*
238  *
239  */
240 /*
241  * Field : ATBID
242  *
243  * ATB AtId
244  *
245  * Field Access Macros:
246  *
247  */
248 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID register field. */
249 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID_LSB 0
250 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID register field. */
251 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID_MSB 6
252 /* The width in bits of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID register field. */
253 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID_WIDTH 7
254 /* The mask used to set the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID register field value. */
255 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID_SET_MSK 0x0000007f
256 /* The mask used to clear the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID register field value. */
257 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID_CLR_MSK 0xffffff80
258 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID register field. */
259 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID_RESET 0x0
260 /* Extracts the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID field value from a register. */
261 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID_GET(value) (((value) & 0x0000007f) >> 0)
262 /* Produces a ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID register field value suitable for setting the register. */
263 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID_SET(value) (((value) << 0) & 0x0000007f)
264 
265 #ifndef __ASSEMBLY__
266 /*
267  * WARNING: The C register and register group struct declarations are provided for
268  * convenience and illustrative purposes. They should, however, be used with
269  * caution as the C language standard provides no guarantees about the alignment or
270  * atomicity of device memory accesses. The recommended practice for coding device
271  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
272  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
273  * alt_write_dword() functions for 64 bit registers.
274  *
275  * The struct declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID.
276  */
277 struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_s
278 {
279  volatile uint32_t ATBID : 7; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_ATBID */
280  uint32_t : 25; /* *UNDEFINED* */
281 };
282 
283 /* The typedef declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID. */
284 typedef struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_s ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_t;
285 #endif /* __ASSEMBLY__ */
286 
287 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID register. */
288 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_RESET 0x00000000
289 /* The byte offset of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID register from the beginning of the component. */
290 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_OFST 0x8
291 
292 /*
293  * Register : cs_obs_at_main_AtbEndPoint_AtbEn
294  *
295  * Register Layout
296  *
297  * Bits | Access | Reset | Description
298  * :-------|:-------|:--------|:-------------------------------------------------------------------------------
299  * [0] | RW | 0x0 | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN
300  * [31:1] | ??? | Unknown | *UNDEFINED*
301  *
302  */
303 /*
304  * Field : ATBEN
305  *
306  * ATB Unit Enable
307  *
308  * Field Access Macros:
309  *
310  */
311 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN register field. */
312 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN_LSB 0
313 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN register field. */
314 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN_MSB 0
315 /* The width in bits of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN register field. */
316 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN_WIDTH 1
317 /* The mask used to set the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN register field value. */
318 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN_SET_MSK 0x00000001
319 /* The mask used to clear the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN register field value. */
320 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN_CLR_MSK 0xfffffffe
321 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN register field. */
322 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN_RESET 0x0
323 /* Extracts the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN field value from a register. */
324 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN_GET(value) (((value) & 0x00000001) >> 0)
325 /* Produces a ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN register field value suitable for setting the register. */
326 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN_SET(value) (((value) << 0) & 0x00000001)
327 
328 #ifndef __ASSEMBLY__
329 /*
330  * WARNING: The C register and register group struct declarations are provided for
331  * convenience and illustrative purposes. They should, however, be used with
332  * caution as the C language standard provides no guarantees about the alignment or
333  * atomicity of device memory accesses. The recommended practice for coding device
334  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
335  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
336  * alt_write_dword() functions for 64 bit registers.
337  *
338  * The struct declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN.
339  */
340 struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_s
341 {
342  volatile uint32_t ATBEN : 1; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_ATBEN */
343  uint32_t : 31; /* *UNDEFINED* */
344 };
345 
346 /* The typedef declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN. */
347 typedef struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_s ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_t;
348 #endif /* __ASSEMBLY__ */
349 
350 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN register. */
351 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_RESET 0x00000000
352 /* The byte offset of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN register from the beginning of the component. */
353 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_OFST 0xc
354 
355 /*
356  * Register : cs_obs_at_main_AtbEndPoint_SyncPeriod
357  *
358  * Register Layout
359  *
360  * Bits | Access | Reset | Description
361  * :-------|:-------|:--------|:-----------------------------------------------------------------------------------------
362  * [4:0] | RW | 0x0 | ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD
363  * [31:5] | ??? | Unknown | *UNDEFINED*
364  *
365  */
366 /*
367  * Field : SYNCPERIOD
368  *
369  * ATB Synchro Period
370  *
371  * Field Access Macros:
372  *
373  */
374 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD register field. */
375 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD_LSB 0
376 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD register field. */
377 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD_MSB 4
378 /* The width in bits of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD register field. */
379 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD_WIDTH 5
380 /* The mask used to set the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD register field value. */
381 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD_SET_MSK 0x0000001f
382 /* The mask used to clear the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD register field value. */
383 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD_CLR_MSK 0xffffffe0
384 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD register field. */
385 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD_RESET 0x0
386 /* Extracts the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD field value from a register. */
387 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD_GET(value) (((value) & 0x0000001f) >> 0)
388 /* Produces a ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD register field value suitable for setting the register. */
389 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD_SET(value) (((value) << 0) & 0x0000001f)
390 
391 #ifndef __ASSEMBLY__
392 /*
393  * WARNING: The C register and register group struct declarations are provided for
394  * convenience and illustrative purposes. They should, however, be used with
395  * caution as the C language standard provides no guarantees about the alignment or
396  * atomicity of device memory accesses. The recommended practice for coding device
397  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
398  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
399  * alt_write_dword() functions for 64 bit registers.
400  *
401  * The struct declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD.
402  */
403 struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_s
404 {
405  volatile uint32_t SYNCPERIOD : 5; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_SYNCPERIOD */
406  uint32_t : 27; /* *UNDEFINED* */
407 };
408 
409 /* The typedef declaration for register ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD. */
410 typedef struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_s ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_t;
411 #endif /* __ASSEMBLY__ */
412 
413 /* The reset value of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD register. */
414 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_RESET 0x00000000
415 /* The byte offset of the ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD register from the beginning of the component. */
416 #define ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_OFST 0x10
417 
418 #ifndef __ASSEMBLY__
419 /*
420  * WARNING: The C register and register group struct declarations are provided for
421  * convenience and illustrative purposes. They should, however, be used with
422  * caution as the C language standard provides no guarantees about the alignment or
423  * atomicity of device memory accesses. The recommended practice for coding device
424  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
425  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
426  * alt_write_dword() functions for 64 bit registers.
427  *
428  * The struct declaration for register group ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT.
429  */
430 struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_s
431 {
432  volatile ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID_t cs_obs_at_main_AtbEndPoint_Id_CoreId; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID */
433  volatile ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID_t cs_obs_at_main_AtbEndPoint_Id_RevisionId; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID */
434  volatile ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID_t cs_obs_at_main_AtbEndPoint_AtbId; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID */
435  volatile ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN_t cs_obs_at_main_AtbEndPoint_AtbEn; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN */
436  volatile ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD_t cs_obs_at_main_AtbEndPoint_SyncPeriod; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD */
437  volatile uint32_t _pad_0x14_0x80[27]; /* *UNDEFINED* */
438 };
439 
440 /* The typedef declaration for register group ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT. */
441 typedef struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_s ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_t;
442 /* The struct declaration for the raw register contents of register group ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT. */
443 struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_raw_s
444 {
445  volatile uint32_t cs_obs_at_main_AtbEndPoint_Id_CoreId; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_COREID */
446  volatile uint32_t cs_obs_at_main_AtbEndPoint_Id_RevisionId; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ID_REVISIONID */
447  volatile uint32_t cs_obs_at_main_AtbEndPoint_AtbId; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBID */
448  volatile uint32_t cs_obs_at_main_AtbEndPoint_AtbEn; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_ATBEN */
449  volatile uint32_t cs_obs_at_main_AtbEndPoint_SyncPeriod; /* ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_CS_OBS_AT_MAIN_ATBENDPOINT_SYNCPERIOD */
450  volatile uint32_t _pad_0x14_0x80[27]; /* *UNDEFINED* */
451 };
452 
453 /* The typedef declaration for the raw register contents of register group ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT. */
454 typedef struct ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_raw_s ALT_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_raw_t;
455 #endif /* __ASSEMBLY__ */
456 
457 
458 #ifdef __cplusplus
459 }
460 #endif /* __cplusplus */
461 #endif /* __ALT_SOCAL_NOC_CCU_IOS_CS_OBS_AT_MAIN_ATBENDPT_H__ */
462