This module defines the cache management API for enabling and disabling L1 data cache, L1 instruction cache, and L2 cache in the SoC. As well, the API allows users to perform cache maintenance operations on these caches. This includes the following operations:
- Invalidate: Marks the cache line as being invalid, freeing up the space to cache other data. All APIs which enable caches invalidate the memory before being enabling the cache.
- Clean: If the cache line is dirty, synchronizes the cache line data with the upper level memory system and marks that line as clean. All APIs which disable caches cleans the memory before disabling the cache.
- Purge: A term used in this API as a short form for clean and invalidate. This operation cleans and invalidates a cache line in that order, as a single command to the cache controller.
The following reference materials were used in the design of this API:
- ARM Architecture Reference Manual, ARMv8-A (ARM DDI 0487A)
- <em<Cortex-A53 MPCore Processor Technical Reference Manual (ARM DDI 0500G)