37 #ifndef __ALT_INT_DEVICE_H__
38 #define __ALT_INT_DEVICE_H__
48 typedef enum ALT_INT_INTERRUPT_e
54 ALT_INT_INTERRUPT_SGI0 = 0,
55 ALT_INT_INTERRUPT_SGI1 = 1,
56 ALT_INT_INTERRUPT_SGI2 = 2,
57 ALT_INT_INTERRUPT_SGI3 = 3,
58 ALT_INT_INTERRUPT_SGI4 = 4,
59 ALT_INT_INTERRUPT_SGI5 = 5,
60 ALT_INT_INTERRUPT_SGI6 = 6,
61 ALT_INT_INTERRUPT_SGI7 = 7,
62 ALT_INT_INTERRUPT_SGI8 = 8,
63 ALT_INT_INTERRUPT_SGI9 = 9,
64 ALT_INT_INTERRUPT_SGI10 = 10,
65 ALT_INT_INTERRUPT_SGI11 = 11,
66 ALT_INT_INTERRUPT_SGI12 = 12,
67 ALT_INT_INTERRUPT_SGI13 = 13,
68 ALT_INT_INTERRUPT_SGI14 = 14,
69 ALT_INT_INTERRUPT_SGI15 = 15,
71 ALT_INT_INTERRUPT_SDM_IRQ0 = 32,
72 ALT_INT_INTERRUPT_SDM_IRQ1 = 33,
73 ALT_INT_INTERRUPT_SDM_IRQ2 = 34,
74 ALT_INT_INTERRUPT_SDM_IRQ3 = 35,
75 ALT_INT_INTERRUPT_SDM_IRQ4 = 36,
76 ALT_INT_INTERRUPT_SDM_IRQ5 = 37,
77 ALT_INT_INTERRUPT_SDM_IRQ6 = 38,
78 ALT_INT_INTERRUPT_SDM_IRQ7 = 39,
80 ALT_INT_INTERRUPT_SCP_IRQ0 = 40,
81 ALT_INT_INTERRUPT_SCP_IRQ1 = 41,
82 ALT_INT_INTERRUPT_SCP_IRQ2 = 42,
83 ALT_INT_INTERRUPT_SCP_IRQ3 = 43,
84 ALT_INT_INTERRUPT_SCP_IRQ4 = 44,
85 ALT_INT_INTERRUPT_SCP_IRQ5 = 45,
86 ALT_INT_INTERRUPT_SCP_IRQ6 = 46,
87 ALT_INT_INTERRUPT_SCP_IRQ7 = 47,
97 ALT_INT_INTERRUPT_SERR_GLOBAL = 48,
104 ALT_INT_INTERRUPT_F2S_FPGA_IRQ0 = 49,
105 ALT_INT_INTERRUPT_F2S_FPGA_IRQ1 = 50,
106 ALT_INT_INTERRUPT_F2S_FPGA_IRQ2 = 51,
107 ALT_INT_INTERRUPT_F2S_FPGA_IRQ3 = 52,
108 ALT_INT_INTERRUPT_F2S_FPGA_IRQ4 = 53,
109 ALT_INT_INTERRUPT_F2S_FPGA_IRQ5 = 54,
110 ALT_INT_INTERRUPT_F2S_FPGA_IRQ6 = 55,
111 ALT_INT_INTERRUPT_F2S_FPGA_IRQ7 = 56,
112 ALT_INT_INTERRUPT_F2S_FPGA_IRQ8 = 57,
113 ALT_INT_INTERRUPT_F2S_FPGA_IRQ9 = 58,
114 ALT_INT_INTERRUPT_F2S_FPGA_IRQ10 = 59,
115 ALT_INT_INTERRUPT_F2S_FPGA_IRQ11 = 60,
116 ALT_INT_INTERRUPT_F2S_FPGA_IRQ12 = 61,
117 ALT_INT_INTERRUPT_F2S_FPGA_IRQ13 = 62,
118 ALT_INT_INTERRUPT_F2S_FPGA_IRQ14 = 63,
119 ALT_INT_INTERRUPT_F2S_FPGA_IRQ15 = 64,
120 ALT_INT_INTERRUPT_F2S_FPGA_IRQ16 = 65,
121 ALT_INT_INTERRUPT_F2S_FPGA_IRQ17 = 66,
122 ALT_INT_INTERRUPT_F2S_FPGA_IRQ18 = 67,
123 ALT_INT_INTERRUPT_F2S_FPGA_IRQ19 = 68,
124 ALT_INT_INTERRUPT_F2S_FPGA_IRQ20 = 69,
125 ALT_INT_INTERRUPT_F2S_FPGA_IRQ21 = 70,
126 ALT_INT_INTERRUPT_F2S_FPGA_IRQ22 = 71,
127 ALT_INT_INTERRUPT_F2S_FPGA_IRQ23 = 72,
128 ALT_INT_INTERRUPT_F2S_FPGA_IRQ24 = 73,
129 ALT_INT_INTERRUPT_F2S_FPGA_IRQ25 = 74,
130 ALT_INT_INTERRUPT_F2S_FPGA_IRQ26 = 75,
131 ALT_INT_INTERRUPT_F2S_FPGA_IRQ27 = 76,
132 ALT_INT_INTERRUPT_F2S_FPGA_IRQ28 = 77,
133 ALT_INT_INTERRUPT_F2S_FPGA_IRQ29 = 78,
134 ALT_INT_INTERRUPT_F2S_FPGA_IRQ30 = 79,
135 ALT_INT_INTERRUPT_F2S_FPGA_IRQ31 = 80,
136 ALT_INT_INTERRUPT_F2S_FPGA_IRQ32 = 81,
137 ALT_INT_INTERRUPT_F2S_FPGA_IRQ33 = 82,
138 ALT_INT_INTERRUPT_F2S_FPGA_IRQ34 = 83,
139 ALT_INT_INTERRUPT_F2S_FPGA_IRQ35 = 84,
140 ALT_INT_INTERRUPT_F2S_FPGA_IRQ36 = 85,
141 ALT_INT_INTERRUPT_F2S_FPGA_IRQ37 = 86,
142 ALT_INT_INTERRUPT_F2S_FPGA_IRQ38 = 87,
143 ALT_INT_INTERRUPT_F2S_FPGA_IRQ39 = 88,
144 ALT_INT_INTERRUPT_F2S_FPGA_IRQ40 = 89,
145 ALT_INT_INTERRUPT_F2S_FPGA_IRQ41 = 90,
146 ALT_INT_INTERRUPT_F2S_FPGA_IRQ42 = 91,
147 ALT_INT_INTERRUPT_F2S_FPGA_IRQ43 = 92,
148 ALT_INT_INTERRUPT_F2S_FPGA_IRQ44 = 93,
149 ALT_INT_INTERRUPT_F2S_FPGA_IRQ45 = 94,
150 ALT_INT_INTERRUPT_F2S_FPGA_IRQ46 = 95,
151 ALT_INT_INTERRUPT_F2S_FPGA_IRQ47 = 96,
152 ALT_INT_INTERRUPT_F2S_FPGA_IRQ48 = 97,
153 ALT_INT_INTERRUPT_F2S_FPGA_IRQ49 = 98,
154 ALT_INT_INTERRUPT_F2S_FPGA_IRQ50 = 99,
155 ALT_INT_INTERRUPT_F2S_FPGA_IRQ51 = 100,
156 ALT_INT_INTERRUPT_F2S_FPGA_IRQ52 = 101,
157 ALT_INT_INTERRUPT_F2S_FPGA_IRQ53 = 102,
158 ALT_INT_INTERRUPT_F2S_FPGA_IRQ54 = 103,
159 ALT_INT_INTERRUPT_F2S_FPGA_IRQ55 = 104,
160 ALT_INT_INTERRUPT_F2S_FPGA_IRQ56 = 105,
161 ALT_INT_INTERRUPT_F2S_FPGA_IRQ57 = 106,
162 ALT_INT_INTERRUPT_F2S_FPGA_IRQ58 = 107,
163 ALT_INT_INTERRUPT_F2S_FPGA_IRQ59 = 108,
164 ALT_INT_INTERRUPT_F2S_FPGA_IRQ60 = 109,
165 ALT_INT_INTERRUPT_F2S_FPGA_IRQ61 = 110,
166 ALT_INT_INTERRUPT_F2S_FPGA_IRQ62 = 111,
167 ALT_INT_INTERRUPT_F2S_FPGA_IRQ63 = 112,
174 ALT_INT_INTERRUPT_DMA_IRQ0 = 113,
175 ALT_INT_INTERRUPT_DMA_IRQ1 = 114,
176 ALT_INT_INTERRUPT_DMA_IRQ2 = 115,
177 ALT_INT_INTERRUPT_DMA_IRQ3 = 116,
178 ALT_INT_INTERRUPT_DMA_IRQ4 = 117,
179 ALT_INT_INTERRUPT_DMA_IRQ5 = 118,
180 ALT_INT_INTERRUPT_DMA_IRQ6 = 119,
181 ALT_INT_INTERRUPT_DMA_IRQ7 = 120,
182 ALT_INT_INTERRUPT_DMA_IRQ_ABORT = 121,
189 ALT_INT_INTERRUPT_EMAC0_IRQ = 122,
190 ALT_INT_INTERRUPT_EMAC1_IRQ = 123,
191 ALT_INT_INTERRUPT_EMAC2_IRQ = 124,
197 ALT_INT_INTERRUPT_USB0_IRQ = 125,
198 ALT_INT_INTERRUPT_USB1_IRQ = 126,
204 ALT_INT_INTERRUPT_HMC_ERROR = 127,
211 ALT_INT_INTERRUPT_SDMMC_IRQ = 128,
212 ALT_INT_INTERRUPT_NAND_IRQ = 129,
222 ALT_INT_INTERRUPT_SPI0_IRQ = 131,
223 ALT_INT_INTERRUPT_SPI1_IRQ = 132,
224 ALT_INT_INTERRUPT_SPI2_IRQ = 133,
225 ALT_INT_INTERRUPT_SPI3_IRQ = 134,
236 ALT_INT_INTERRUPT_I2C0_IRQ = 135,
237 ALT_INT_INTERRUPT_I2C1_IRQ = 136,
238 ALT_INT_INTERRUPT_I2C2_IRQ = 137,
239 ALT_INT_INTERRUPT_I2C3_IRQ = 138,
240 ALT_INT_INTERRUPT_I2C4_IRQ = 139,
246 ALT_INT_INTERRUPT_UART0 = 140,
247 ALT_INT_INTERRUPT_UART1 = 141,
253 ALT_INT_INTERRUPT_GPIO0 = 142,
254 ALT_INT_INTERRUPT_GPIO1 = 143,
255 ALT_INT_INTERRUPT_GPIO2 = 144,
261 ALT_INT_INTERRUPT_TIMER_L4SP_0_IRQ = 145,
262 ALT_INT_INTERRUPT_TIMER_L4SP_1_IRQ = 146,
263 ALT_INT_INTERRUPT_TIMER_OSC1_0_IRQ = 147,
264 ALT_INT_INTERRUPT_TIMER_OSC1_1_IRQ = 148,
270 ALT_INT_INTERRUPT_WDOG0_IRQ = 149,
271 ALT_INT_INTERRUPT_WDOG1_IRQ = 150,
272 ALT_INT_INTERRUPT_WDOG2_IRQ = 157,
273 ALT_INT_INTERRUPT_WDOG3_IRQ = 158,
279 ALT_INT_INTERRUPT_CLKMGR_IRQ = 151,
280 ALT_INT_INTERRUPT_RESTMGR_IRQ = 152,
286 ALT_INT_INTERRUPT_NCTIIRQ0 = 153,
287 ALT_INT_INTERRUPT_NCTIIRQ1 = 154,
288 ALT_INT_INTERRUPT_NCTIIRQ2 = 155,
289 ALT_INT_INTERRUPT_NCTIIRQ3 = 156,
298 ALT_INT_INTERRUPT_GLOBAL_FLT_S = 160,
299 ALT_INT_INTERRUPT_GLOBAL_FLT_NS = 161,
306 ALT_INT_INTERRUPT_FPGA_TBU = 162,
307 ALT_INT_INTERRUPT_DMA_TBU = 163,
308 ALT_INT_INTERRUPT_EMAC_TBU = 164,
309 ALT_INT_INTERRUPT_IO_TBU = 165,
310 ALT_INT_INTERRUPT_SCP_TBU = 166,
319 ALT_INT_INTERRUPT_CXT_NS = 168,
320 ALT_INT_INTERRUPT_CXT_S = 169,
321 ALT_INT_INTERRUPT_CXT0 = 170,
322 ALT_INT_INTERRUPT_CXT1 = 171,
323 ALT_INT_INTERRUPT_CXT2 = 172,
324 ALT_INT_INTERRUPT_CXT3 = 173,
325 ALT_INT_INTERRUPT_CXT4 = 174,
326 ALT_INT_INTERRUPT_CXT5 = 175,
327 ALT_INT_INTERRUPT_CXT6 = 176,
328 ALT_INT_INTERRUPT_CXT7 = 177,
329 ALT_INT_INTERRUPT_CXT8 = 178,
330 ALT_INT_INTERRUPT_CXT9 = 179,
331 ALT_INT_INTERRUPT_CXT10 = 180,
332 ALT_INT_INTERRUPT_CXT11 = 181,
333 ALT_INT_INTERRUPT_CXT12 = 182,
334 ALT_INT_INTERRUPT_CXT13 = 183,
335 ALT_INT_INTERRUPT_CXT14 = 184,
336 ALT_INT_INTERRUPT_CXT15 = 185,
337 ALT_INT_INTERRUPT_CXT16 = 186,
338 ALT_INT_INTERRUPT_CXT17 = 187,
339 ALT_INT_INTERRUPT_CXT18 = 188,
340 ALT_INT_INTERRUPT_CXT19 = 189,
341 ALT_INT_INTERRUPT_CXT20 = 190,
342 ALT_INT_INTERRUPT_CXT21 = 191,
343 ALT_INT_INTERRUPT_CXT22 = 192,
344 ALT_INT_INTERRUPT_CXT23 = 193,
345 ALT_INT_INTERRUPT_CXT24 = 194,
346 ALT_INT_INTERRUPT_CXT25 = 195,
347 ALT_INT_INTERRUPT_CXT26 = 196,
348 ALT_INT_INTERRUPT_CXT27 = 197,
349 ALT_INT_INTERRUPT_CXT28 = 198,
350 ALT_INT_INTERRUPT_CXT29 = 199,
351 ALT_INT_INTERRUPT_CXT30 = 200,
352 ALT_INT_INTERRUPT_CXT31 = 201,
356 ALT_INT_INTERRUPT_SYS_MON0 = 202,
357 ALT_INT_INTERRUPT_SYS_MON1 = 203,
358 ALT_INT_INTERRUPT_SYS_MON2 = 204,
359 ALT_INT_INTERRUPT_SYS_MON3 = 205,
360 ALT_INT_INTERRUPT_SYS_MON4 = 206,
361 ALT_INT_INTERRUPT_SYS_MON5 = 207,
362 ALT_INT_INTERRUPT_SYS_MON6 = 208,
363 ALT_INT_INTERRUPT_SYS_MON7 = 209,
364 ALT_INT_INTERRUPT_SYS_MON8 = 210,
365 ALT_INT_INTERRUPT_SYS_MON9 = 211,
366 ALT_INT_INTERRUPT_SYS_MON10 = 212,
367 ALT_INT_INTERRUPT_SYS_MON11 = 213
369 } ALT_INT_INTERRUPT_t;