35 #ifndef __ALT_SOCAL_CLKMGR_H__
36 #define __ALT_SOCAL_CLKMGR_H__
87 #define ALT_CLKMGR_CLKMGR_CTL_BOOTMOD_LSB 0
89 #define ALT_CLKMGR_CLKMGR_CTL_BOOTMOD_MSB 0
91 #define ALT_CLKMGR_CLKMGR_CTL_BOOTMOD_WIDTH 1
93 #define ALT_CLKMGR_CLKMGR_CTL_BOOTMOD_SET_MSK 0x00000001
95 #define ALT_CLKMGR_CLKMGR_CTL_BOOTMOD_CLR_MSK 0xfffffffe
97 #define ALT_CLKMGR_CLKMGR_CTL_BOOTMOD_RESET 0x1
99 #define ALT_CLKMGR_CLKMGR_CTL_BOOTMOD_GET(value) (((value) & 0x00000001) >> 0)
101 #define ALT_CLKMGR_CLKMGR_CTL_BOOTMOD_SET(value) (((value) << 0) & 0x00000001)
116 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKEN_LSB 8
118 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKEN_MSB 8
120 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKEN_WIDTH 1
122 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKEN_SET_MSK 0x00000100
124 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKEN_CLR_MSK 0xfffffeff
126 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKEN_RESET 0x0
128 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKEN_GET(value) (((value) & 0x00000100) >> 8)
130 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKEN_SET(value) (((value) << 8) & 0x00000100)
146 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKSEL_LSB 9
148 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKSEL_MSB 9
150 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKSEL_WIDTH 1
152 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKSEL_SET_MSK 0x00000200
154 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKSEL_CLR_MSK 0xfffffdff
156 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKSEL_RESET 0x0
158 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKSEL_GET(value) (((value) & 0x00000200) >> 9)
160 #define ALT_CLKMGR_CLKMGR_CTL_SWCTLBTCLKSEL_SET(value) (((value) << 9) & 0x00000200)
173 struct ALT_CLKMGR_CLKMGR_CTL_s
175 uint32_t bootmode : 1;
177 uint32_t swctrlbtclken : 1;
178 uint32_t swctrlbtclksel : 1;
183 typedef volatile struct ALT_CLKMGR_CLKMGR_CTL_s ALT_CLKMGR_CLKMGR_CTL_t;
187 #define ALT_CLKMGR_CLKMGR_CTL_RESET 0x00000003
189 #define ALT_CLKMGR_CLKMGR_CTL_OFST 0x0
222 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLACHIEVED_LSB 0
224 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLACHIEVED_MSB 0
226 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLACHIEVED_WIDTH 1
228 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLACHIEVED_SET_MSK 0x00000001
230 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLACHIEVED_CLR_MSK 0xfffffffe
232 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLACHIEVED_RESET 0x0
234 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLACHIEVED_GET(value) (((value) & 0x00000001) >> 0)
236 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLACHIEVED_SET(value) (((value) << 0) & 0x00000001)
249 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLACHIEVED_LSB 1
251 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLACHIEVED_MSB 1
253 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLACHIEVED_WIDTH 1
255 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLACHIEVED_SET_MSK 0x00000002
257 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLACHIEVED_CLR_MSK 0xfffffffd
259 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLACHIEVED_RESET 0x0
261 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLACHIEVED_GET(value) (((value) & 0x00000002) >> 1)
263 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLACHIEVED_SET(value) (((value) << 1) & 0x00000002)
275 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLLOST_LSB 2
277 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLLOST_MSB 2
279 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLLOST_WIDTH 1
281 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLLOST_SET_MSK 0x00000004
283 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLLOST_CLR_MSK 0xfffffffb
285 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLLOST_RESET 0x0
287 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLLOST_GET(value) (((value) & 0x00000004) >> 2)
289 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLLOST_SET(value) (((value) << 2) & 0x00000004)
301 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLLOST_LSB 3
303 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLLOST_MSB 3
305 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLLOST_WIDTH 1
307 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLLOST_SET_MSK 0x00000008
309 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLLOST_CLR_MSK 0xfffffff7
311 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLLOST_RESET 0x0
313 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLLOST_GET(value) (((value) & 0x00000008) >> 3)
315 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLLOST_SET(value) (((value) << 3) & 0x00000008)
328 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLRFSLIP_LSB 8
330 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLRFSLIP_MSB 8
332 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLRFSLIP_WIDTH 1
334 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLRFSLIP_SET_MSK 0x00000100
336 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLRFSLIP_CLR_MSK 0xfffffeff
338 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLRFSLIP_RESET 0x0
340 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLRFSLIP_GET(value) (((value) & 0x00000100) >> 8)
342 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLRFSLIP_SET(value) (((value) << 8) & 0x00000100)
355 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLRFSLIP_LSB 9
357 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLRFSLIP_MSB 9
359 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLRFSLIP_WIDTH 1
361 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLRFSLIP_SET_MSK 0x00000200
363 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLRFSLIP_CLR_MSK 0xfffffdff
365 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLRFSLIP_RESET 0x0
367 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLRFSLIP_GET(value) (((value) & 0x00000200) >> 9)
369 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLRFSLIP_SET(value) (((value) << 9) & 0x00000200)
381 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLFBSLIP_LSB 10
383 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLFBSLIP_MSB 10
385 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLFBSLIP_WIDTH 1
387 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLFBSLIP_SET_MSK 0x00000400
389 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLFBSLIP_CLR_MSK 0xfffffbff
391 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLFBSLIP_RESET 0x0
393 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLFBSLIP_GET(value) (((value) & 0x00000400) >> 10)
395 #define ALT_CLKMGR_CLKMGR_INTR_MAINPLLFBSLIP_SET(value) (((value) << 10) & 0x00000400)
408 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLFBSLIP_LSB 11
410 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLFBSLIP_MSB 11
412 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLFBSLIP_WIDTH 1
414 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLFBSLIP_SET_MSK 0x00000800
416 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLFBSLIP_CLR_MSK 0xfffff7ff
418 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLFBSLIP_RESET 0x0
420 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLFBSLIP_GET(value) (((value) & 0x00000800) >> 11)
422 #define ALT_CLKMGR_CLKMGR_INTR_PERPLLFBSLIP_SET(value) (((value) << 11) & 0x00000800)
435 struct ALT_CLKMGR_CLKMGR_INTR_s
437 uint32_t mainpllachieved : 1;
438 uint32_t perpllachieved : 1;
439 uint32_t mainplllost : 1;
440 uint32_t perplllost : 1;
442 uint32_t mainpllrfslip : 1;
443 uint32_t perpllrfslip : 1;
444 uint32_t mainpllfbslip : 1;
445 uint32_t perpllfbslip : 1;
450 typedef volatile struct ALT_CLKMGR_CLKMGR_INTR_s ALT_CLKMGR_CLKMGR_INTR_t;
454 #define ALT_CLKMGR_CLKMGR_INTR_RESET 0x00000000
456 #define ALT_CLKMGR_CLKMGR_INTR_OFST 0x4
489 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLACHIEVED_LSB 0
491 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLACHIEVED_MSB 0
493 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLACHIEVED_WIDTH 1
495 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLACHIEVED_SET_MSK 0x00000001
497 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLACHIEVED_CLR_MSK 0xfffffffe
499 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLACHIEVED_RESET 0x0
501 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLACHIEVED_GET(value) (((value) & 0x00000001) >> 0)
503 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLACHIEVED_SET(value) (((value) << 0) & 0x00000001)
516 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLACHIEVED_LSB 1
518 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLACHIEVED_MSB 1
520 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLACHIEVED_WIDTH 1
522 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLACHIEVED_SET_MSK 0x00000002
524 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLACHIEVED_CLR_MSK 0xfffffffd
526 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLACHIEVED_RESET 0x0
528 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLACHIEVED_GET(value) (((value) & 0x00000002) >> 1)
530 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLACHIEVED_SET(value) (((value) << 1) & 0x00000002)
542 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLLOST_LSB 2
544 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLLOST_MSB 2
546 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLLOST_WIDTH 1
548 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLLOST_SET_MSK 0x00000004
550 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLLOST_CLR_MSK 0xfffffffb
552 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLLOST_RESET 0x0
554 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLLOST_GET(value) (((value) & 0x00000004) >> 2)
556 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLLOST_SET(value) (((value) << 2) & 0x00000004)
568 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLLOST_LSB 3
570 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLLOST_MSB 3
572 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLLOST_WIDTH 1
574 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLLOST_SET_MSK 0x00000008
576 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLLOST_CLR_MSK 0xfffffff7
578 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLLOST_RESET 0x0
580 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLLOST_GET(value) (((value) & 0x00000008) >> 3)
582 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLLOST_SET(value) (((value) << 3) & 0x00000008)
595 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLRFSLIP_LSB 8
597 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLRFSLIP_MSB 8
599 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLRFSLIP_WIDTH 1
601 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLRFSLIP_SET_MSK 0x00000100
603 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLRFSLIP_CLR_MSK 0xfffffeff
605 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLRFSLIP_RESET 0x0
607 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLRFSLIP_GET(value) (((value) & 0x00000100) >> 8)
609 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLRFSLIP_SET(value) (((value) << 8) & 0x00000100)
622 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLRFSLIP_LSB 9
624 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLRFSLIP_MSB 9
626 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLRFSLIP_WIDTH 1
628 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLRFSLIP_SET_MSK 0x00000200
630 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLRFSLIP_CLR_MSK 0xfffffdff
632 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLRFSLIP_RESET 0x0
634 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLRFSLIP_GET(value) (((value) & 0x00000200) >> 9)
636 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLRFSLIP_SET(value) (((value) << 9) & 0x00000200)
648 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLFBSLIP_LSB 10
650 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLFBSLIP_MSB 10
652 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLFBSLIP_WIDTH 1
654 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLFBSLIP_SET_MSK 0x00000400
656 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLFBSLIP_CLR_MSK 0xfffffbff
658 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLFBSLIP_RESET 0x0
660 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLFBSLIP_GET(value) (((value) & 0x00000400) >> 10)
662 #define ALT_CLKMGR_CLKMGR_INTRS_MAINPLLFBSLIP_SET(value) (((value) << 10) & 0x00000400)
675 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLFBSLIP_LSB 11
677 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLFBSLIP_MSB 11
679 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLFBSLIP_WIDTH 1
681 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLFBSLIP_SET_MSK 0x00000800
683 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLFBSLIP_CLR_MSK 0xfffff7ff
685 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLFBSLIP_RESET 0x0
687 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLFBSLIP_GET(value) (((value) & 0x00000800) >> 11)
689 #define ALT_CLKMGR_CLKMGR_INTRS_PERPLLFBSLIP_SET(value) (((value) << 11) & 0x00000800)
702 struct ALT_CLKMGR_CLKMGR_INTRS_s
704 uint32_t mainpllachieved : 1;
705 uint32_t perpllachieved : 1;
706 uint32_t mainplllost : 1;
707 uint32_t perplllost : 1;
709 uint32_t mainpllrfslip : 1;
710 uint32_t perpllrfslip : 1;
711 uint32_t mainpllfbslip : 1;
712 uint32_t perpllfbslip : 1;
717 typedef volatile struct ALT_CLKMGR_CLKMGR_INTRS_s ALT_CLKMGR_CLKMGR_INTRS_t;
721 #define ALT_CLKMGR_CLKMGR_INTRS_RESET 0x00000000
723 #define ALT_CLKMGR_CLKMGR_INTRS_OFST 0x8
756 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLACHIEVED_LSB 0
758 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLACHIEVED_MSB 0
760 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLACHIEVED_WIDTH 1
762 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLACHIEVED_SET_MSK 0x00000001
764 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLACHIEVED_CLR_MSK 0xfffffffe
766 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLACHIEVED_RESET 0x0
768 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLACHIEVED_GET(value) (((value) & 0x00000001) >> 0)
770 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLACHIEVED_SET(value) (((value) << 0) & 0x00000001)
783 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLACHIEVED_LSB 1
785 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLACHIEVED_MSB 1
787 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLACHIEVED_WIDTH 1
789 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLACHIEVED_SET_MSK 0x00000002
791 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLACHIEVED_CLR_MSK 0xfffffffd
793 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLACHIEVED_RESET 0x0
795 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLACHIEVED_GET(value) (((value) & 0x00000002) >> 1)
797 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLACHIEVED_SET(value) (((value) << 1) & 0x00000002)
809 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLLOST_LSB 2
811 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLLOST_MSB 2
813 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLLOST_WIDTH 1
815 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLLOST_SET_MSK 0x00000004
817 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLLOST_CLR_MSK 0xfffffffb
819 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLLOST_RESET 0x0
821 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLLOST_GET(value) (((value) & 0x00000004) >> 2)
823 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLLOST_SET(value) (((value) << 2) & 0x00000004)
835 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLLOST_LSB 3
837 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLLOST_MSB 3
839 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLLOST_WIDTH 1
841 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLLOST_SET_MSK 0x00000008
843 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLLOST_CLR_MSK 0xfffffff7
845 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLLOST_RESET 0x0
847 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLLOST_GET(value) (((value) & 0x00000008) >> 3)
849 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLLOST_SET(value) (((value) << 3) & 0x00000008)
862 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLRFSLIP_LSB 8
864 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLRFSLIP_MSB 8
866 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLRFSLIP_WIDTH 1
868 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLRFSLIP_SET_MSK 0x00000100
870 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLRFSLIP_CLR_MSK 0xfffffeff
872 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLRFSLIP_RESET 0x0
874 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLRFSLIP_GET(value) (((value) & 0x00000100) >> 8)
876 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLRFSLIP_SET(value) (((value) << 8) & 0x00000100)
889 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLRFSLIP_LSB 9
891 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLRFSLIP_MSB 9
893 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLRFSLIP_WIDTH 1
895 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLRFSLIP_SET_MSK 0x00000200
897 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLRFSLIP_CLR_MSK 0xfffffdff
899 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLRFSLIP_RESET 0x0
901 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLRFSLIP_GET(value) (((value) & 0x00000200) >> 9)
903 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLRFSLIP_SET(value) (((value) << 9) & 0x00000200)
915 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLFBSLIP_LSB 10
917 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLFBSLIP_MSB 10
919 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLFBSLIP_WIDTH 1
921 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLFBSLIP_SET_MSK 0x00000400
923 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLFBSLIP_CLR_MSK 0xfffffbff
925 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLFBSLIP_RESET 0x0
927 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLFBSLIP_GET(value) (((value) & 0x00000400) >> 10)
929 #define ALT_CLKMGR_CLKMGR_INTRR_MAINPLLFBSLIP_SET(value) (((value) << 10) & 0x00000400)
942 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLFBSLIP_LSB 11
944 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLFBSLIP_MSB 11
946 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLFBSLIP_WIDTH 1
948 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLFBSLIP_SET_MSK 0x00000800
950 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLFBSLIP_CLR_MSK 0xfffff7ff
952 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLFBSLIP_RESET 0x0
954 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLFBSLIP_GET(value) (((value) & 0x00000800) >> 11)
956 #define ALT_CLKMGR_CLKMGR_INTRR_PERPLLFBSLIP_SET(value) (((value) << 11) & 0x00000800)
969 struct ALT_CLKMGR_CLKMGR_INTRR_s
971 uint32_t mainpllachieved : 1;
972 uint32_t perpllachieved : 1;
973 uint32_t mainplllost : 1;
974 uint32_t perplllost : 1;
976 uint32_t mainpllrfslip : 1;
977 uint32_t perpllrfslip : 1;
978 uint32_t mainpllfbslip : 1;
979 uint32_t perpllfbslip : 1;
984 typedef volatile struct ALT_CLKMGR_CLKMGR_INTRR_s ALT_CLKMGR_CLKMGR_INTRR_t;
988 #define ALT_CLKMGR_CLKMGR_INTRR_RESET 0x00000000
990 #define ALT_CLKMGR_CLKMGR_INTRR_OFST 0xc
1024 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_LSB 0
1026 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_MSB 0
1028 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_WIDTH 1
1030 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_SET_MSK 0x00000001
1032 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_CLR_MSK 0xfffffffe
1034 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_RESET 0x0
1036 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_GET(value) (((value) & 0x00000001) >> 0)
1038 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLACHIEVED_SET(value) (((value) << 0) & 0x00000001)
1051 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_LSB 1
1053 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_MSB 1
1055 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_WIDTH 1
1057 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_SET_MSK 0x00000002
1059 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_CLR_MSK 0xfffffffd
1061 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_RESET 0x0
1063 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_GET(value) (((value) & 0x00000002) >> 1)
1065 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLACHIEVED_SET(value) (((value) << 1) & 0x00000002)
1078 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_LSB 2
1080 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_MSB 2
1082 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_WIDTH 1
1084 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_SET_MSK 0x00000004
1086 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_CLR_MSK 0xfffffffb
1088 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_RESET 0x0
1090 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_GET(value) (((value) & 0x00000004) >> 2)
1092 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLLOST_SET(value) (((value) << 2) & 0x00000004)
1105 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_LSB 3
1107 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_MSB 3
1109 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_WIDTH 1
1111 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_SET_MSK 0x00000008
1113 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_CLR_MSK 0xfffffff7
1115 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_RESET 0x0
1117 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_GET(value) (((value) & 0x00000008) >> 3)
1119 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLLOST_SET(value) (((value) << 3) & 0x00000008)
1132 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_LSB 8
1134 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_MSB 8
1136 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_WIDTH 1
1138 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_SET_MSK 0x00000100
1140 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_CLR_MSK 0xfffffeff
1142 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_RESET 0x0
1144 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_GET(value) (((value) & 0x00000100) >> 8)
1146 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLRFSLIP_SET(value) (((value) << 8) & 0x00000100)
1159 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_LSB 9
1161 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_MSB 9
1163 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_WIDTH 1
1165 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_SET_MSK 0x00000200
1167 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_CLR_MSK 0xfffffdff
1169 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_RESET 0x0
1171 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_GET(value) (((value) & 0x00000200) >> 9)
1173 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLRFSLIP_SET(value) (((value) << 9) & 0x00000200)
1186 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_LSB 10
1188 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_MSB 10
1190 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_WIDTH 1
1192 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_SET_MSK 0x00000400
1194 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_CLR_MSK 0xfffffbff
1196 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_RESET 0x0
1198 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_GET(value) (((value) & 0x00000400) >> 10)
1200 #define ALT_CLKMGR_CLKMGR_INTREN_MAINPLLFBSLIP_SET(value) (((value) << 10) & 0x00000400)
1213 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_LSB 11
1215 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_MSB 11
1217 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_WIDTH 1
1219 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_SET_MSK 0x00000800
1221 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_CLR_MSK 0xfffff7ff
1223 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_RESET 0x0
1225 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_GET(value) (((value) & 0x00000800) >> 11)
1227 #define ALT_CLKMGR_CLKMGR_INTREN_PERPLLFBSLIP_SET(value) (((value) << 11) & 0x00000800)
1229 #ifndef __ASSEMBLY__
1240 struct ALT_CLKMGR_CLKMGR_INTREN_s
1242 uint32_t mainpllachieved : 1;
1243 uint32_t perpllachieved : 1;
1244 uint32_t mainplllost : 1;
1245 uint32_t perplllost : 1;
1247 uint32_t mainpllrfslip : 1;
1248 uint32_t perpllrfslip : 1;
1249 uint32_t mainpllfbslip : 1;
1250 uint32_t perpllfbslip : 1;
1255 typedef volatile struct ALT_CLKMGR_CLKMGR_INTREN_s ALT_CLKMGR_CLKMGR_INTREN_t;
1259 #define ALT_CLKMGR_CLKMGR_INTREN_RESET 0x00000000
1261 #define ALT_CLKMGR_CLKMGR_INTREN_OFST 0x10
1295 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLACHIEVED_LSB 0
1297 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLACHIEVED_MSB 0
1299 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLACHIEVED_WIDTH 1
1301 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLACHIEVED_SET_MSK 0x00000001
1303 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLACHIEVED_CLR_MSK 0xfffffffe
1305 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLACHIEVED_RESET 0x0
1307 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLACHIEVED_GET(value) (((value) & 0x00000001) >> 0)
1309 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLACHIEVED_SET(value) (((value) << 0) & 0x00000001)
1322 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLACHIEVED_LSB 1
1324 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLACHIEVED_MSB 1
1326 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLACHIEVED_WIDTH 1
1328 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLACHIEVED_SET_MSK 0x00000002
1330 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLACHIEVED_CLR_MSK 0xfffffffd
1332 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLACHIEVED_RESET 0x0
1334 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLACHIEVED_GET(value) (((value) & 0x00000002) >> 1)
1336 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLACHIEVED_SET(value) (((value) << 1) & 0x00000002)
1349 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLLOST_LSB 2
1351 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLLOST_MSB 2
1353 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLLOST_WIDTH 1
1355 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLLOST_SET_MSK 0x00000004
1357 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLLOST_CLR_MSK 0xfffffffb
1359 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLLOST_RESET 0x0
1361 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLLOST_GET(value) (((value) & 0x00000004) >> 2)
1363 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLLOST_SET(value) (((value) << 2) & 0x00000004)
1376 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLLOST_LSB 3
1378 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLLOST_MSB 3
1380 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLLOST_WIDTH 1
1382 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLLOST_SET_MSK 0x00000008
1384 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLLOST_CLR_MSK 0xfffffff7
1386 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLLOST_RESET 0x0
1388 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLLOST_GET(value) (((value) & 0x00000008) >> 3)
1390 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLLOST_SET(value) (((value) << 3) & 0x00000008)
1403 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLRFSLIP_LSB 8
1405 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLRFSLIP_MSB 8
1407 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLRFSLIP_WIDTH 1
1409 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLRFSLIP_SET_MSK 0x00000100
1411 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLRFSLIP_CLR_MSK 0xfffffeff
1413 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLRFSLIP_RESET 0x0
1415 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLRFSLIP_GET(value) (((value) & 0x00000100) >> 8)
1417 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLRFSLIP_SET(value) (((value) << 8) & 0x00000100)
1430 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLRFSLIP_LSB 9
1432 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLRFSLIP_MSB 9
1434 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLRFSLIP_WIDTH 1
1436 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLRFSLIP_SET_MSK 0x00000200
1438 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLRFSLIP_CLR_MSK 0xfffffdff
1440 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLRFSLIP_RESET 0x0
1442 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLRFSLIP_GET(value) (((value) & 0x00000200) >> 9)
1444 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLRFSLIP_SET(value) (((value) << 9) & 0x00000200)
1457 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLFBSLIP_LSB 10
1459 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLFBSLIP_MSB 10
1461 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLFBSLIP_WIDTH 1
1463 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLFBSLIP_SET_MSK 0x00000400
1465 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLFBSLIP_CLR_MSK 0xfffffbff
1467 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLFBSLIP_RESET 0x0
1469 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLFBSLIP_GET(value) (((value) & 0x00000400) >> 10)
1471 #define ALT_CLKMGR_CLKMGR_INTRENS_MAINPLLFBSLIP_SET(value) (((value) << 10) & 0x00000400)
1484 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLFBSLIP_LSB 11
1486 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLFBSLIP_MSB 11
1488 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLFBSLIP_WIDTH 1
1490 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLFBSLIP_SET_MSK 0x00000800
1492 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLFBSLIP_CLR_MSK 0xfffff7ff
1494 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLFBSLIP_RESET 0x0
1496 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLFBSLIP_GET(value) (((value) & 0x00000800) >> 11)
1498 #define ALT_CLKMGR_CLKMGR_INTRENS_PERPLLFBSLIP_SET(value) (((value) << 11) & 0x00000800)
1500 #ifndef __ASSEMBLY__
1511 struct ALT_CLKMGR_CLKMGR_INTRENS_s
1513 uint32_t mainpllachieved : 1;
1514 uint32_t perpllachieved : 1;
1515 uint32_t mainplllost : 1;
1516 uint32_t perplllost : 1;
1518 uint32_t mainpllrfslip : 1;
1519 uint32_t perpllrfslip : 1;
1520 uint32_t mainpllfbslip : 1;
1521 uint32_t perpllfbslip : 1;
1526 typedef volatile struct ALT_CLKMGR_CLKMGR_INTRENS_s ALT_CLKMGR_CLKMGR_INTRENS_t;
1530 #define ALT_CLKMGR_CLKMGR_INTRENS_RESET 0x00000000
1532 #define ALT_CLKMGR_CLKMGR_INTRENS_OFST 0x14
1566 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLACHIEVED_LSB 0
1568 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLACHIEVED_MSB 0
1570 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLACHIEVED_WIDTH 1
1572 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLACHIEVED_SET_MSK 0x00000001
1574 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLACHIEVED_CLR_MSK 0xfffffffe
1576 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLACHIEVED_RESET 0x0
1578 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLACHIEVED_GET(value) (((value) & 0x00000001) >> 0)
1580 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLACHIEVED_SET(value) (((value) << 0) & 0x00000001)
1593 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLACHIEVED_LSB 1
1595 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLACHIEVED_MSB 1
1597 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLACHIEVED_WIDTH 1
1599 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLACHIEVED_SET_MSK 0x00000002
1601 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLACHIEVED_CLR_MSK 0xfffffffd
1603 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLACHIEVED_RESET 0x0
1605 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLACHIEVED_GET(value) (((value) & 0x00000002) >> 1)
1607 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLACHIEVED_SET(value) (((value) << 1) & 0x00000002)
1620 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLLOST_LSB 2
1622 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLLOST_MSB 2
1624 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLLOST_WIDTH 1
1626 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLLOST_SET_MSK 0x00000004
1628 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLLOST_CLR_MSK 0xfffffffb
1630 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLLOST_RESET 0x0
1632 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLLOST_GET(value) (((value) & 0x00000004) >> 2)
1634 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLLOST_SET(value) (((value) << 2) & 0x00000004)
1647 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLLOST_LSB 3
1649 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLLOST_MSB 3
1651 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLLOST_WIDTH 1
1653 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLLOST_SET_MSK 0x00000008
1655 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLLOST_CLR_MSK 0xfffffff7
1657 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLLOST_RESET 0x0
1659 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLLOST_GET(value) (((value) & 0x00000008) >> 3)
1661 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLLOST_SET(value) (((value) << 3) & 0x00000008)
1674 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLRFSLIP_LSB 8
1676 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLRFSLIP_MSB 8
1678 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLRFSLIP_WIDTH 1
1680 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLRFSLIP_SET_MSK 0x00000100
1682 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLRFSLIP_CLR_MSK 0xfffffeff
1684 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLRFSLIP_RESET 0x0
1686 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLRFSLIP_GET(value) (((value) & 0x00000100) >> 8)
1688 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLRFSLIP_SET(value) (((value) << 8) & 0x00000100)
1701 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLRFSLIP_LSB 9
1703 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLRFSLIP_MSB 9
1705 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLRFSLIP_WIDTH 1
1707 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLRFSLIP_SET_MSK 0x00000200
1709 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLRFSLIP_CLR_MSK 0xfffffdff
1711 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLRFSLIP_RESET 0x0
1713 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLRFSLIP_GET(value) (((value) & 0x00000200) >> 9)
1715 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLRFSLIP_SET(value) (((value) << 9) & 0x00000200)
1728 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLFBSLIP_LSB 10
1730 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLFBSLIP_MSB 10
1732 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLFBSLIP_WIDTH 1
1734 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLFBSLIP_SET_MSK 0x00000400
1736 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLFBSLIP_CLR_MSK 0xfffffbff
1738 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLFBSLIP_RESET 0x0
1740 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLFBSLIP_GET(value) (((value) & 0x00000400) >> 10)
1742 #define ALT_CLKMGR_CLKMGR_INTRENR_MAINPLLFBSLIP_SET(value) (((value) << 10) & 0x00000400)
1755 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLFBSLIP_LSB 11
1757 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLFBSLIP_MSB 11
1759 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLFBSLIP_WIDTH 1
1761 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLFBSLIP_SET_MSK 0x00000800
1763 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLFBSLIP_CLR_MSK 0xfffff7ff
1765 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLFBSLIP_RESET 0x0
1767 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLFBSLIP_GET(value) (((value) & 0x00000800) >> 11)
1769 #define ALT_CLKMGR_CLKMGR_INTRENR_PERPLLFBSLIP_SET(value) (((value) << 11) & 0x00000800)
1771 #ifndef __ASSEMBLY__
1782 struct ALT_CLKMGR_CLKMGR_INTRENR_s
1784 uint32_t mainpllachieved : 1;
1785 uint32_t perpllachieved : 1;
1786 uint32_t mainplllost : 1;
1787 uint32_t perplllost : 1;
1789 uint32_t mainpllrfslip : 1;
1790 uint32_t perpllrfslip : 1;
1791 uint32_t mainpllfbslip : 1;
1792 uint32_t perpllfbslip : 1;
1797 typedef volatile struct ALT_CLKMGR_CLKMGR_INTRENR_s ALT_CLKMGR_CLKMGR_INTRENR_t;
1801 #define ALT_CLKMGR_CLKMGR_INTRENR_RESET 0x00000000
1803 #define ALT_CLKMGR_CLKMGR_INTRENR_OFST 0x18
1854 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_E_IDLE 0x0
1860 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_E_BUSY 0x1
1863 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_LSB 0
1865 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_MSB 0
1867 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_WIDTH 1
1869 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_SET_MSK 0x00000001
1871 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_CLR_MSK 0xfffffffe
1873 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_RESET 0x0
1875 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_GET(value) (((value) & 0x00000001) >> 0)
1877 #define ALT_CLKMGR_CLKMGR_STAT_BUSY_SET(value) (((value) << 0) & 0x00000001)
1889 #define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_LSB 8
1891 #define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_MSB 8
1893 #define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_WIDTH 1
1895 #define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK 0x00000100
1897 #define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_CLR_MSK 0xfffffeff
1899 #define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_RESET 0x0
1901 #define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_GET(value) (((value) & 0x00000100) >> 8)
1903 #define ALT_CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET(value) (((value) << 8) & 0x00000100)
1915 #define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_LSB 9
1917 #define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_MSB 9
1919 #define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_WIDTH 1
1921 #define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK 0x00000200
1923 #define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_CLR_MSK 0xfffffdff
1925 #define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_RESET 0x0
1927 #define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_GET(value) (((value) & 0x00000200) >> 9)
1929 #define ALT_CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET(value) (((value) << 9) & 0x00000200)
1944 #define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_LSB 16
1946 #define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_MSB 16
1948 #define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_WIDTH 1
1950 #define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_SET_MSK 0x00010000
1952 #define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_CLR_MSK 0xfffeffff
1954 #define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_RESET 0x1
1956 #define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_GET(value) (((value) & 0x00010000) >> 16)
1958 #define ALT_CLKMGR_CLKMGR_STAT_BOOTMOD_SET(value) (((value) << 16) & 0x00010000)
1972 #define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_LSB 17
1974 #define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_MSB 17
1976 #define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_WIDTH 1
1978 #define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_SET_MSK 0x00020000
1980 #define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_CLR_MSK 0xfffdffff
1982 #define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_RESET 0x0
1984 #define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_GET(value) (((value) & 0x00020000) >> 17)
1986 #define ALT_CLKMGR_CLKMGR_STAT_BOOTCLKSRC_SET(value) (((value) << 17) & 0x00020000)
1988 #ifndef __ASSEMBLY__
1999 struct ALT_CLKMGR_CLKMGR_STAT_s
2001 const uint32_t busy : 1;
2003 const uint32_t mainplllocked : 1;
2004 const uint32_t perplllocked : 1;
2006 const uint32_t bootmode : 1;
2007 const uint32_t bootclksrc : 1;
2012 typedef volatile struct ALT_CLKMGR_CLKMGR_STAT_s ALT_CLKMGR_CLKMGR_STAT_t;
2016 #define ALT_CLKMGR_CLKMGR_STAT_RESET 0x00010000
2018 #define ALT_CLKMGR_CLKMGR_STAT_OFST 0x1c
2078 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_MAINCLKSEL_LSB 0
2080 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_MAINCLKSEL_MSB 3
2082 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_MAINCLKSEL_WIDTH 4
2084 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_MAINCLKSEL_SET_MSK 0x0000000f
2086 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_MAINCLKSEL_CLR_MSK 0xfffffff0
2088 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_MAINCLKSEL_RESET 0x8
2090 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_MAINCLKSEL_GET(value) (((value) & 0x0000000f) >> 0)
2092 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_MAINCLKSEL_SET(value) (((value) << 0) & 0x0000000f)
2126 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_PERICLKSEL_LSB 8
2128 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_PERICLKSEL_MSB 11
2130 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_PERICLKSEL_WIDTH 4
2132 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_PERICLKSEL_SET_MSK 0x00000f00
2134 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_PERICLKSEL_CLR_MSK 0xfffff0ff
2136 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_PERICLKSEL_RESET 0x8
2138 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_PERICLKSEL_GET(value) (((value) & 0x00000f00) >> 8)
2140 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_PERICLKSEL_SET(value) (((value) << 8) & 0x00000f00)
2177 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_DBGCLKSEL_LSB 16
2179 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_DBGCLKSEL_MSB 20
2181 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_DBGCLKSEL_WIDTH 5
2183 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_DBGCLKSEL_SET_MSK 0x001f0000
2185 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_DBGCLKSEL_CLR_MSK 0xffe0ffff
2187 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_DBGCLKSEL_RESET 0x10
2189 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_DBGCLKSEL_GET(value) (((value) & 0x001f0000) >> 16)
2191 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_DBGCLKSEL_SET(value) (((value) << 16) & 0x001f0000)
2193 #ifndef __ASSEMBLY__
2204 struct ALT_CLKMGR_CLKMGR_TESTIOCTL_s
2206 uint32_t mainclksel : 4;
2208 uint32_t periclksel : 4;
2210 uint32_t debugclksel : 5;
2215 typedef volatile struct ALT_CLKMGR_CLKMGR_TESTIOCTL_s ALT_CLKMGR_CLKMGR_TESTIOCTL_t;
2219 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_RESET 0x00100808
2221 #define ALT_CLKMGR_CLKMGR_TESTIOCTL_OFST 0x20
2223 #ifndef __ASSEMBLY__
2234 struct ALT_CLKMGR_CLKMGR_s
2236 ALT_CLKMGR_CLKMGR_CTL_t ctrl;
2237 ALT_CLKMGR_CLKMGR_INTR_t intr;
2238 ALT_CLKMGR_CLKMGR_INTRS_t intrs;
2239 ALT_CLKMGR_CLKMGR_INTRR_t intrr;
2240 ALT_CLKMGR_CLKMGR_INTREN_t intren;
2241 ALT_CLKMGR_CLKMGR_INTRENS_t intrens;
2242 ALT_CLKMGR_CLKMGR_INTRENR_t intrenr;
2243 ALT_CLKMGR_CLKMGR_STAT_t stat;
2244 ALT_CLKMGR_CLKMGR_TESTIOCTL_t testioctrl;
2245 volatile uint32_t _pad_0x24_0x40[7];
2249 typedef volatile struct ALT_CLKMGR_CLKMGR_s ALT_CLKMGR_CLKMGR_t;
2251 struct ALT_CLKMGR_CLKMGR_raw_s
2253 volatile uint32_t ctrl;
2254 volatile uint32_t intr;
2255 volatile uint32_t intrs;
2256 volatile uint32_t intrr;
2257 volatile uint32_t intren;
2258 volatile uint32_t intrens;
2259 volatile uint32_t intrenr;
2260 volatile uint32_t stat;
2261 volatile uint32_t testioctrl;
2262 uint32_t _pad_0x24_0x40[7];
2266 typedef volatile struct ALT_CLKMGR_CLKMGR_raw_s ALT_CLKMGR_CLKMGR_raw_t;
2305 #define ALT_CLKMGR_MAINPLL_VCO0_BGPWRDN_LSB 0
2307 #define ALT_CLKMGR_MAINPLL_VCO0_BGPWRDN_MSB 0
2309 #define ALT_CLKMGR_MAINPLL_VCO0_BGPWRDN_WIDTH 1
2311 #define ALT_CLKMGR_MAINPLL_VCO0_BGPWRDN_SET_MSK 0x00000001
2313 #define ALT_CLKMGR_MAINPLL_VCO0_BGPWRDN_CLR_MSK 0xfffffffe
2315 #define ALT_CLKMGR_MAINPLL_VCO0_BGPWRDN_RESET 0x1
2317 #define ALT_CLKMGR_MAINPLL_VCO0_BGPWRDN_GET(value) (((value) & 0x00000001) >> 0)
2319 #define ALT_CLKMGR_MAINPLL_VCO0_BGPWRDN_SET(value) (((value) << 0) & 0x00000001)
2330 #define ALT_CLKMGR_MAINPLL_VCO0_PWRDN_LSB 1
2332 #define ALT_CLKMGR_MAINPLL_VCO0_PWRDN_MSB 1
2334 #define ALT_CLKMGR_MAINPLL_VCO0_PWRDN_WIDTH 1
2336 #define ALT_CLKMGR_MAINPLL_VCO0_PWRDN_SET_MSK 0x00000002
2338 #define ALT_CLKMGR_MAINPLL_VCO0_PWRDN_CLR_MSK 0xfffffffd
2340 #define ALT_CLKMGR_MAINPLL_VCO0_PWRDN_RESET 0x1
2342 #define ALT_CLKMGR_MAINPLL_VCO0_PWRDN_GET(value) (((value) & 0x00000002) >> 1)
2344 #define ALT_CLKMGR_MAINPLL_VCO0_PWRDN_SET(value) (((value) << 1) & 0x00000002)
2355 #define ALT_CLKMGR_MAINPLL_VCO0_EN_LSB 2
2357 #define ALT_CLKMGR_MAINPLL_VCO0_EN_MSB 2
2359 #define ALT_CLKMGR_MAINPLL_VCO0_EN_WIDTH 1
2361 #define ALT_CLKMGR_MAINPLL_VCO0_EN_SET_MSK 0x00000004
2363 #define ALT_CLKMGR_MAINPLL_VCO0_EN_CLR_MSK 0xfffffffb
2365 #define ALT_CLKMGR_MAINPLL_VCO0_EN_RESET 0x0
2367 #define ALT_CLKMGR_MAINPLL_VCO0_EN_GET(value) (((value) & 0x00000004) >> 2)
2369 #define ALT_CLKMGR_MAINPLL_VCO0_EN_SET(value) (((value) << 2) & 0x00000004)
2387 #define ALT_CLKMGR_MAINPLL_VCO0_OUTRSTALL_LSB 3
2389 #define ALT_CLKMGR_MAINPLL_VCO0_OUTRSTALL_MSB 3
2391 #define ALT_CLKMGR_MAINPLL_VCO0_OUTRSTALL_WIDTH 1
2393 #define ALT_CLKMGR_MAINPLL_VCO0_OUTRSTALL_SET_MSK 0x00000008
2395 #define ALT_CLKMGR_MAINPLL_VCO0_OUTRSTALL_CLR_MSK 0xfffffff7
2397 #define ALT_CLKMGR_MAINPLL_VCO0_OUTRSTALL_RESET 0x0
2399 #define ALT_CLKMGR_MAINPLL_VCO0_OUTRSTALL_GET(value) (((value) & 0x00000008) >> 3)
2401 #define ALT_CLKMGR_MAINPLL_VCO0_OUTRSTALL_SET(value) (((value) << 3) & 0x00000008)
2424 #define ALT_CLKMGR_MAINPLL_VCO0_REGEXTSEL_LSB 4
2426 #define ALT_CLKMGR_MAINPLL_VCO0_REGEXTSEL_MSB 4
2428 #define ALT_CLKMGR_MAINPLL_VCO0_REGEXTSEL_WIDTH 1
2430 #define ALT_CLKMGR_MAINPLL_VCO0_REGEXTSEL_SET_MSK 0x00000010
2432 #define ALT_CLKMGR_MAINPLL_VCO0_REGEXTSEL_CLR_MSK 0xffffffef
2434 #define ALT_CLKMGR_MAINPLL_VCO0_REGEXTSEL_RESET 0x0
2436 #define ALT_CLKMGR_MAINPLL_VCO0_REGEXTSEL_GET(value) (((value) & 0x00000010) >> 4)
2438 #define ALT_CLKMGR_MAINPLL_VCO0_REGEXTSEL_SET(value) (((value) << 4) & 0x00000010)
2449 #define ALT_CLKMGR_MAINPLL_VCO0_FASTEN_LSB 5
2451 #define ALT_CLKMGR_MAINPLL_VCO0_FASTEN_MSB 5
2453 #define ALT_CLKMGR_MAINPLL_VCO0_FASTEN_WIDTH 1
2455 #define ALT_CLKMGR_MAINPLL_VCO0_FASTEN_SET_MSK 0x00000020
2457 #define ALT_CLKMGR_MAINPLL_VCO0_FASTEN_CLR_MSK 0xffffffdf
2459 #define ALT_CLKMGR_MAINPLL_VCO0_FASTEN_RESET 0x0
2461 #define ALT_CLKMGR_MAINPLL_VCO0_FASTEN_GET(value) (((value) & 0x00000020) >> 5)
2463 #define ALT_CLKMGR_MAINPLL_VCO0_FASTEN_SET(value) (((value) << 5) & 0x00000020)
2474 #define ALT_CLKMGR_MAINPLL_VCO0_SATEN_LSB 6
2476 #define ALT_CLKMGR_MAINPLL_VCO0_SATEN_MSB 6
2478 #define ALT_CLKMGR_MAINPLL_VCO0_SATEN_WIDTH 1
2480 #define ALT_CLKMGR_MAINPLL_VCO0_SATEN_SET_MSK 0x00000040
2482 #define ALT_CLKMGR_MAINPLL_VCO0_SATEN_CLR_MSK 0xffffffbf
2484 #define ALT_CLKMGR_MAINPLL_VCO0_SATEN_RESET 0x1
2486 #define ALT_CLKMGR_MAINPLL_VCO0_SATEN_GET(value) (((value) & 0x00000040) >> 6)
2488 #define ALT_CLKMGR_MAINPLL_VCO0_SATEN_SET(value) (((value) << 6) & 0x00000040)
2511 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_E_EOSC1 0x0
2517 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_E_INTOSC 0x1
2523 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_E_F2S 0x2
2526 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_LSB 8
2528 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_MSB 9
2530 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_WIDTH 2
2532 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_SET_MSK 0x00000300
2534 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_CLR_MSK 0xfffffcff
2536 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_RESET 0x0
2538 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_GET(value) (((value) & 0x00000300) >> 8)
2540 #define ALT_CLKMGR_MAINPLL_VCO0_PSRC_SET(value) (((value) << 8) & 0x00000300)
2551 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJ_LSB 16
2553 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJ_MSB 27
2555 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJ_WIDTH 12
2557 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJ_SET_MSK 0x0fff0000
2559 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJ_CLR_MSK 0xf000ffff
2561 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJ_RESET 0x1
2563 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJ_GET(value) (((value) & 0x0fff0000) >> 16)
2565 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJ_SET(value) (((value) << 16) & 0x0fff0000)
2581 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJEN_LSB 28
2583 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJEN_MSB 28
2585 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJEN_WIDTH 1
2587 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJEN_SET_MSK 0x10000000
2589 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJEN_CLR_MSK 0xefffffff
2591 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJEN_RESET 0x0
2593 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJEN_GET(value) (((value) & 0x10000000) >> 28)
2595 #define ALT_CLKMGR_MAINPLL_VCO0_BWADJEN_SET(value) (((value) << 28) & 0x10000000)
2597 #ifndef __ASSEMBLY__
2608 struct ALT_CLKMGR_MAINPLL_VCO0_s
2610 uint32_t bgpwrdn : 1;
2613 uint32_t outresetall : 1;
2614 uint32_t regextsel : 1;
2615 uint32_t fasten : 1;
2620 uint32_t bwadj : 12;
2621 uint32_t bwadjen : 1;
2626 typedef volatile struct ALT_CLKMGR_MAINPLL_VCO0_s ALT_CLKMGR_MAINPLL_VCO0_t;
2630 #define ALT_CLKMGR_MAINPLL_VCO0_RESET 0x00010043
2632 #define ALT_CLKMGR_MAINPLL_VCO0_OFST 0x0
2662 #define ALT_CLKMGR_MAINPLL_VCO1_NUMER_LSB 0
2664 #define ALT_CLKMGR_MAINPLL_VCO1_NUMER_MSB 12
2666 #define ALT_CLKMGR_MAINPLL_VCO1_NUMER_WIDTH 13
2668 #define ALT_CLKMGR_MAINPLL_VCO1_NUMER_SET_MSK 0x00001fff
2670 #define ALT_CLKMGR_MAINPLL_VCO1_NUMER_CLR_MSK 0xffffe000
2672 #define ALT_CLKMGR_MAINPLL_VCO1_NUMER_RESET 0x1
2674 #define ALT_CLKMGR_MAINPLL_VCO1_NUMER_GET(value) (((value) & 0x00001fff) >> 0)
2676 #define ALT_CLKMGR_MAINPLL_VCO1_NUMER_SET(value) (((value) << 0) & 0x00001fff)
2690 #define ALT_CLKMGR_MAINPLL_VCO1_DENOM_LSB 16
2692 #define ALT_CLKMGR_MAINPLL_VCO1_DENOM_MSB 21
2694 #define ALT_CLKMGR_MAINPLL_VCO1_DENOM_WIDTH 6
2696 #define ALT_CLKMGR_MAINPLL_VCO1_DENOM_SET_MSK 0x003f0000
2698 #define ALT_CLKMGR_MAINPLL_VCO1_DENOM_CLR_MSK 0xffc0ffff
2700 #define ALT_CLKMGR_MAINPLL_VCO1_DENOM_RESET 0x1
2702 #define ALT_CLKMGR_MAINPLL_VCO1_DENOM_GET(value) (((value) & 0x003f0000) >> 16)
2704 #define ALT_CLKMGR_MAINPLL_VCO1_DENOM_SET(value) (((value) << 16) & 0x003f0000)
2706 #ifndef __ASSEMBLY__
2717 struct ALT_CLKMGR_MAINPLL_VCO1_s
2719 uint32_t numer : 13;
2726 typedef volatile struct ALT_CLKMGR_MAINPLL_VCO1_s ALT_CLKMGR_MAINPLL_VCO1_t;
2730 #define ALT_CLKMGR_MAINPLL_VCO1_RESET 0x00010001
2732 #define ALT_CLKMGR_MAINPLL_VCO1_OFST 0x4
2767 #define ALT_CLKMGR_MAINPLL_EN_MPUCLKEN_LSB 0
2769 #define ALT_CLKMGR_MAINPLL_EN_MPUCLKEN_MSB 0
2771 #define ALT_CLKMGR_MAINPLL_EN_MPUCLKEN_WIDTH 1
2773 #define ALT_CLKMGR_MAINPLL_EN_MPUCLKEN_SET_MSK 0x00000001
2775 #define ALT_CLKMGR_MAINPLL_EN_MPUCLKEN_CLR_MSK 0xfffffffe
2777 #define ALT_CLKMGR_MAINPLL_EN_MPUCLKEN_RESET 0x1
2779 #define ALT_CLKMGR_MAINPLL_EN_MPUCLKEN_GET(value) (((value) & 0x00000001) >> 0)
2781 #define ALT_CLKMGR_MAINPLL_EN_MPUCLKEN_SET(value) (((value) << 0) & 0x00000001)
2792 #define ALT_CLKMGR_MAINPLL_EN_L4MAINCLKEN_LSB 1
2794 #define ALT_CLKMGR_MAINPLL_EN_L4MAINCLKEN_MSB 1
2796 #define ALT_CLKMGR_MAINPLL_EN_L4MAINCLKEN_WIDTH 1
2798 #define ALT_CLKMGR_MAINPLL_EN_L4MAINCLKEN_SET_MSK 0x00000002
2800 #define ALT_CLKMGR_MAINPLL_EN_L4MAINCLKEN_CLR_MSK 0xfffffffd
2802 #define ALT_CLKMGR_MAINPLL_EN_L4MAINCLKEN_RESET 0x1
2804 #define ALT_CLKMGR_MAINPLL_EN_L4MAINCLKEN_GET(value) (((value) & 0x00000002) >> 1)
2806 #define ALT_CLKMGR_MAINPLL_EN_L4MAINCLKEN_SET(value) (((value) << 1) & 0x00000002)
2817 #define ALT_CLKMGR_MAINPLL_EN_L4MPCLKEN_LSB 2
2819 #define ALT_CLKMGR_MAINPLL_EN_L4MPCLKEN_MSB 2
2821 #define ALT_CLKMGR_MAINPLL_EN_L4MPCLKEN_WIDTH 1
2823 #define ALT_CLKMGR_MAINPLL_EN_L4MPCLKEN_SET_MSK 0x00000004
2825 #define ALT_CLKMGR_MAINPLL_EN_L4MPCLKEN_CLR_MSK 0xfffffffb
2827 #define ALT_CLKMGR_MAINPLL_EN_L4MPCLKEN_RESET 0x1
2829 #define ALT_CLKMGR_MAINPLL_EN_L4MPCLKEN_GET(value) (((value) & 0x00000004) >> 2)
2831 #define ALT_CLKMGR_MAINPLL_EN_L4MPCLKEN_SET(value) (((value) << 2) & 0x00000004)
2842 #define ALT_CLKMGR_MAINPLL_EN_L4SPCLKEN_LSB 3
2844 #define ALT_CLKMGR_MAINPLL_EN_L4SPCLKEN_MSB 3
2846 #define ALT_CLKMGR_MAINPLL_EN_L4SPCLKEN_WIDTH 1
2848 #define ALT_CLKMGR_MAINPLL_EN_L4SPCLKEN_SET_MSK 0x00000008
2850 #define ALT_CLKMGR_MAINPLL_EN_L4SPCLKEN_CLR_MSK 0xfffffff7
2852 #define ALT_CLKMGR_MAINPLL_EN_L4SPCLKEN_RESET 0x1
2854 #define ALT_CLKMGR_MAINPLL_EN_L4SPCLKEN_GET(value) (((value) & 0x00000008) >> 3)
2856 #define ALT_CLKMGR_MAINPLL_EN_L4SPCLKEN_SET(value) (((value) << 3) & 0x00000008)
2867 #define ALT_CLKMGR_MAINPLL_EN_CSCLKEN_LSB 4
2869 #define ALT_CLKMGR_MAINPLL_EN_CSCLKEN_MSB 4
2871 #define ALT_CLKMGR_MAINPLL_EN_CSCLKEN_WIDTH 1
2873 #define ALT_CLKMGR_MAINPLL_EN_CSCLKEN_SET_MSK 0x00000010
2875 #define ALT_CLKMGR_MAINPLL_EN_CSCLKEN_CLR_MSK 0xffffffef
2877 #define ALT_CLKMGR_MAINPLL_EN_CSCLKEN_RESET 0x1
2879 #define ALT_CLKMGR_MAINPLL_EN_CSCLKEN_GET(value) (((value) & 0x00000010) >> 4)
2881 #define ALT_CLKMGR_MAINPLL_EN_CSCLKEN_SET(value) (((value) << 4) & 0x00000010)
2892 #define ALT_CLKMGR_MAINPLL_EN_CSTMRCLKEN_LSB 5
2894 #define ALT_CLKMGR_MAINPLL_EN_CSTMRCLKEN_MSB 5
2896 #define ALT_CLKMGR_MAINPLL_EN_CSTMRCLKEN_WIDTH 1
2898 #define ALT_CLKMGR_MAINPLL_EN_CSTMRCLKEN_SET_MSK 0x00000020
2900 #define ALT_CLKMGR_MAINPLL_EN_CSTMRCLKEN_CLR_MSK 0xffffffdf
2902 #define ALT_CLKMGR_MAINPLL_EN_CSTMRCLKEN_RESET 0x1
2904 #define ALT_CLKMGR_MAINPLL_EN_CSTMRCLKEN_GET(value) (((value) & 0x00000020) >> 5)
2906 #define ALT_CLKMGR_MAINPLL_EN_CSTMRCLKEN_SET(value) (((value) << 5) & 0x00000020)
2917 #define ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLKEN_LSB 6
2919 #define ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLKEN_MSB 6
2921 #define ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLKEN_WIDTH 1
2923 #define ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLKEN_SET_MSK 0x00000040
2925 #define ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLKEN_CLR_MSK 0xffffffbf
2927 #define ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLKEN_RESET 0x1
2929 #define ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLKEN_GET(value) (((value) & 0x00000040) >> 6)
2931 #define ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLKEN_SET(value) (((value) << 6) & 0x00000040)
2942 #define ALT_CLKMGR_MAINPLL_EN_HMCPLLREFCLKEN_LSB 7
2944 #define ALT_CLKMGR_MAINPLL_EN_HMCPLLREFCLKEN_MSB 7
2946 #define ALT_CLKMGR_MAINPLL_EN_HMCPLLREFCLKEN_WIDTH 1
2948 #define ALT_CLKMGR_MAINPLL_EN_HMCPLLREFCLKEN_SET_MSK 0x00000080
2950 #define ALT_CLKMGR_MAINPLL_EN_HMCPLLREFCLKEN_CLR_MSK 0xffffff7f
2952 #define ALT_CLKMGR_MAINPLL_EN_HMCPLLREFCLKEN_RESET 0x1
2954 #define ALT_CLKMGR_MAINPLL_EN_HMCPLLREFCLKEN_GET(value) (((value) & 0x00000080) >> 7)
2956 #define ALT_CLKMGR_MAINPLL_EN_HMCPLLREFCLKEN_SET(value) (((value) << 7) & 0x00000080)
2958 #ifndef __ASSEMBLY__
2969 struct ALT_CLKMGR_MAINPLL_EN_s
2971 uint32_t mpuclken : 1;
2972 uint32_t l4mainclken : 1;
2973 uint32_t l4mpclken : 1;
2974 uint32_t l4spclken : 1;
2975 uint32_t csclken : 1;
2976 uint32_t cstimerclken : 1;
2977 uint32_t s2fuser0clken : 1;
2978 uint32_t hmcpllrefclken : 1;
2983 typedef volatile struct ALT_CLKMGR_MAINPLL_EN_s ALT_CLKMGR_MAINPLL_EN_t;
2987 #define ALT_CLKMGR_MAINPLL_EN_RESET 0x000000ff
2989 #define ALT_CLKMGR_MAINPLL_EN_OFST 0x8
3020 #define ALT_CLKMGR_MAINPLL_ENS_MPUCLKEN_LSB 0
3022 #define ALT_CLKMGR_MAINPLL_ENS_MPUCLKEN_MSB 0
3024 #define ALT_CLKMGR_MAINPLL_ENS_MPUCLKEN_WIDTH 1
3026 #define ALT_CLKMGR_MAINPLL_ENS_MPUCLKEN_SET_MSK 0x00000001
3028 #define ALT_CLKMGR_MAINPLL_ENS_MPUCLKEN_CLR_MSK 0xfffffffe
3030 #define ALT_CLKMGR_MAINPLL_ENS_MPUCLKEN_RESET 0x1
3032 #define ALT_CLKMGR_MAINPLL_ENS_MPUCLKEN_GET(value) (((value) & 0x00000001) >> 0)
3034 #define ALT_CLKMGR_MAINPLL_ENS_MPUCLKEN_SET(value) (((value) << 0) & 0x00000001)
3045 #define ALT_CLKMGR_MAINPLL_ENS_L4MAINCLKEN_LSB 1
3047 #define ALT_CLKMGR_MAINPLL_ENS_L4MAINCLKEN_MSB 1
3049 #define ALT_CLKMGR_MAINPLL_ENS_L4MAINCLKEN_WIDTH 1
3051 #define ALT_CLKMGR_MAINPLL_ENS_L4MAINCLKEN_SET_MSK 0x00000002
3053 #define ALT_CLKMGR_MAINPLL_ENS_L4MAINCLKEN_CLR_MSK 0xfffffffd
3055 #define ALT_CLKMGR_MAINPLL_ENS_L4MAINCLKEN_RESET 0x1
3057 #define ALT_CLKMGR_MAINPLL_ENS_L4MAINCLKEN_GET(value) (((value) & 0x00000002) >> 1)
3059 #define ALT_CLKMGR_MAINPLL_ENS_L4MAINCLKEN_SET(value) (((value) << 1) & 0x00000002)
3070 #define ALT_CLKMGR_MAINPLL_ENS_L4MPCLKEN_LSB 2
3072 #define ALT_CLKMGR_MAINPLL_ENS_L4MPCLKEN_MSB 2
3074 #define ALT_CLKMGR_MAINPLL_ENS_L4MPCLKEN_WIDTH 1
3076 #define ALT_CLKMGR_MAINPLL_ENS_L4MPCLKEN_SET_MSK 0x00000004
3078 #define ALT_CLKMGR_MAINPLL_ENS_L4MPCLKEN_CLR_MSK 0xfffffffb
3080 #define ALT_CLKMGR_MAINPLL_ENS_L4MPCLKEN_RESET 0x1
3082 #define ALT_CLKMGR_MAINPLL_ENS_L4MPCLKEN_GET(value) (((value) & 0x00000004) >> 2)
3084 #define ALT_CLKMGR_MAINPLL_ENS_L4MPCLKEN_SET(value) (((value) << 2) & 0x00000004)
3095 #define ALT_CLKMGR_MAINPLL_ENS_L4SPCLKEN_LSB 3
3097 #define ALT_CLKMGR_MAINPLL_ENS_L4SPCLKEN_MSB 3
3099 #define ALT_CLKMGR_MAINPLL_ENS_L4SPCLKEN_WIDTH 1
3101 #define ALT_CLKMGR_MAINPLL_ENS_L4SPCLKEN_SET_MSK 0x00000008
3103 #define ALT_CLKMGR_MAINPLL_ENS_L4SPCLKEN_CLR_MSK 0xfffffff7
3105 #define ALT_CLKMGR_MAINPLL_ENS_L4SPCLKEN_RESET 0x1
3107 #define ALT_CLKMGR_MAINPLL_ENS_L4SPCLKEN_GET(value) (((value) & 0x00000008) >> 3)
3109 #define ALT_CLKMGR_MAINPLL_ENS_L4SPCLKEN_SET(value) (((value) << 3) & 0x00000008)
3120 #define ALT_CLKMGR_MAINPLL_ENS_CSCLKEN_LSB 4
3122 #define ALT_CLKMGR_MAINPLL_ENS_CSCLKEN_MSB 4
3124 #define ALT_CLKMGR_MAINPLL_ENS_CSCLKEN_WIDTH 1
3126 #define ALT_CLKMGR_MAINPLL_ENS_CSCLKEN_SET_MSK 0x00000010
3128 #define ALT_CLKMGR_MAINPLL_ENS_CSCLKEN_CLR_MSK 0xffffffef
3130 #define ALT_CLKMGR_MAINPLL_ENS_CSCLKEN_RESET 0x1
3132 #define ALT_CLKMGR_MAINPLL_ENS_CSCLKEN_GET(value) (((value) & 0x00000010) >> 4)
3134 #define ALT_CLKMGR_MAINPLL_ENS_CSCLKEN_SET(value) (((value) << 4) & 0x00000010)
3145 #define ALT_CLKMGR_MAINPLL_ENS_CSTMRCLKEN_LSB 5
3147 #define ALT_CLKMGR_MAINPLL_ENS_CSTMRCLKEN_MSB 5
3149 #define ALT_CLKMGR_MAINPLL_ENS_CSTMRCLKEN_WIDTH 1
3151 #define ALT_CLKMGR_MAINPLL_ENS_CSTMRCLKEN_SET_MSK 0x00000020
3153 #define ALT_CLKMGR_MAINPLL_ENS_CSTMRCLKEN_CLR_MSK 0xffffffdf
3155 #define ALT_CLKMGR_MAINPLL_ENS_CSTMRCLKEN_RESET 0x1
3157 #define ALT_CLKMGR_MAINPLL_ENS_CSTMRCLKEN_GET(value) (((value) & 0x00000020) >> 5)
3159 #define ALT_CLKMGR_MAINPLL_ENS_CSTMRCLKEN_SET(value) (((value) << 5) & 0x00000020)
3170 #define ALT_CLKMGR_MAINPLL_ENS_S2FUSER0CLKEN_LSB 6
3172 #define ALT_CLKMGR_MAINPLL_ENS_S2FUSER0CLKEN_MSB 6
3174 #define ALT_CLKMGR_MAINPLL_ENS_S2FUSER0CLKEN_WIDTH 1
3176 #define ALT_CLKMGR_MAINPLL_ENS_S2FUSER0CLKEN_SET_MSK 0x00000040
3178 #define ALT_CLKMGR_MAINPLL_ENS_S2FUSER0CLKEN_CLR_MSK 0xffffffbf
3180 #define ALT_CLKMGR_MAINPLL_ENS_S2FUSER0CLKEN_RESET 0x1
3182 #define ALT_CLKMGR_MAINPLL_ENS_S2FUSER0CLKEN_GET(value) (((value) & 0x00000040) >> 6)
3184 #define ALT_CLKMGR_MAINPLL_ENS_S2FUSER0CLKEN_SET(value) (((value) << 6) & 0x00000040)
3195 #define ALT_CLKMGR_MAINPLL_ENS_HMCPLLREFCLKEN_LSB 7
3197 #define ALT_CLKMGR_MAINPLL_ENS_HMCPLLREFCLKEN_MSB 7
3199 #define ALT_CLKMGR_MAINPLL_ENS_HMCPLLREFCLKEN_WIDTH 1
3201 #define ALT_CLKMGR_MAINPLL_ENS_HMCPLLREFCLKEN_SET_MSK 0x00000080
3203 #define ALT_CLKMGR_MAINPLL_ENS_HMCPLLREFCLKEN_CLR_MSK 0xffffff7f
3205 #define ALT_CLKMGR_MAINPLL_ENS_HMCPLLREFCLKEN_RESET 0x1
3207 #define ALT_CLKMGR_MAINPLL_ENS_HMCPLLREFCLKEN_GET(value) (((value) & 0x00000080) >> 7)
3209 #define ALT_CLKMGR_MAINPLL_ENS_HMCPLLREFCLKEN_SET(value) (((value) << 7) & 0x00000080)
3211 #ifndef __ASSEMBLY__
3222 struct ALT_CLKMGR_MAINPLL_ENS_s
3224 uint32_t mpuclken : 1;
3225 uint32_t l4mainclken : 1;
3226 uint32_t l4mpclken : 1;
3227 uint32_t l4spclken : 1;
3228 uint32_t csclken : 1;
3229 uint32_t cstimerclken : 1;
3230 uint32_t s2fuser0clken : 1;
3231 uint32_t hmcpllrefclken : 1;
3236 typedef volatile struct ALT_CLKMGR_MAINPLL_ENS_s ALT_CLKMGR_MAINPLL_ENS_t;
3240 #define ALT_CLKMGR_MAINPLL_ENS_RESET 0x000000ff
3242 #define ALT_CLKMGR_MAINPLL_ENS_OFST 0xc
3273 #define ALT_CLKMGR_MAINPLL_ENR_MPUCLKEN_LSB 0
3275 #define ALT_CLKMGR_MAINPLL_ENR_MPUCLKEN_MSB 0
3277 #define ALT_CLKMGR_MAINPLL_ENR_MPUCLKEN_WIDTH 1
3279 #define ALT_CLKMGR_MAINPLL_ENR_MPUCLKEN_SET_MSK 0x00000001
3281 #define ALT_CLKMGR_MAINPLL_ENR_MPUCLKEN_CLR_MSK 0xfffffffe
3283 #define ALT_CLKMGR_MAINPLL_ENR_MPUCLKEN_RESET 0x1
3285 #define ALT_CLKMGR_MAINPLL_ENR_MPUCLKEN_GET(value) (((value) & 0x00000001) >> 0)
3287 #define ALT_CLKMGR_MAINPLL_ENR_MPUCLKEN_SET(value) (((value) << 0) & 0x00000001)
3298 #define ALT_CLKMGR_MAINPLL_ENR_L4MAINCLKEN_LSB 1
3300 #define ALT_CLKMGR_MAINPLL_ENR_L4MAINCLKEN_MSB 1
3302 #define ALT_CLKMGR_MAINPLL_ENR_L4MAINCLKEN_WIDTH 1
3304 #define ALT_CLKMGR_MAINPLL_ENR_L4MAINCLKEN_SET_MSK 0x00000002
3306 #define ALT_CLKMGR_MAINPLL_ENR_L4MAINCLKEN_CLR_MSK 0xfffffffd
3308 #define ALT_CLKMGR_MAINPLL_ENR_L4MAINCLKEN_RESET 0x1
3310 #define ALT_CLKMGR_MAINPLL_ENR_L4MAINCLKEN_GET(value) (((value) & 0x00000002) >> 1)
3312 #define ALT_CLKMGR_MAINPLL_ENR_L4MAINCLKEN_SET(value) (((value) << 1) & 0x00000002)
3323 #define ALT_CLKMGR_MAINPLL_ENR_L4MPCLKEN_LSB 2
3325 #define ALT_CLKMGR_MAINPLL_ENR_L4MPCLKEN_MSB 2
3327 #define ALT_CLKMGR_MAINPLL_ENR_L4MPCLKEN_WIDTH 1
3329 #define ALT_CLKMGR_MAINPLL_ENR_L4MPCLKEN_SET_MSK 0x00000004
3331 #define ALT_CLKMGR_MAINPLL_ENR_L4MPCLKEN_CLR_MSK 0xfffffffb
3333 #define ALT_CLKMGR_MAINPLL_ENR_L4MPCLKEN_RESET 0x1
3335 #define ALT_CLKMGR_MAINPLL_ENR_L4MPCLKEN_GET(value) (((value) & 0x00000004) >> 2)
3337 #define ALT_CLKMGR_MAINPLL_ENR_L4MPCLKEN_SET(value) (((value) << 2) & 0x00000004)
3348 #define ALT_CLKMGR_MAINPLL_ENR_L4SPCLKEN_LSB 3
3350 #define ALT_CLKMGR_MAINPLL_ENR_L4SPCLKEN_MSB 3
3352 #define ALT_CLKMGR_MAINPLL_ENR_L4SPCLKEN_WIDTH 1
3354 #define ALT_CLKMGR_MAINPLL_ENR_L4SPCLKEN_SET_MSK 0x00000008
3356 #define ALT_CLKMGR_MAINPLL_ENR_L4SPCLKEN_CLR_MSK 0xfffffff7
3358 #define ALT_CLKMGR_MAINPLL_ENR_L4SPCLKEN_RESET 0x1
3360 #define ALT_CLKMGR_MAINPLL_ENR_L4SPCLKEN_GET(value) (((value) & 0x00000008) >> 3)
3362 #define ALT_CLKMGR_MAINPLL_ENR_L4SPCLKEN_SET(value) (((value) << 3) & 0x00000008)
3373 #define ALT_CLKMGR_MAINPLL_ENR_CSCLKEN_LSB 4
3375 #define ALT_CLKMGR_MAINPLL_ENR_CSCLKEN_MSB 4
3377 #define ALT_CLKMGR_MAINPLL_ENR_CSCLKEN_WIDTH 1
3379 #define ALT_CLKMGR_MAINPLL_ENR_CSCLKEN_SET_MSK 0x00000010
3381 #define ALT_CLKMGR_MAINPLL_ENR_CSCLKEN_CLR_MSK 0xffffffef
3383 #define ALT_CLKMGR_MAINPLL_ENR_CSCLKEN_RESET 0x1
3385 #define ALT_CLKMGR_MAINPLL_ENR_CSCLKEN_GET(value) (((value) & 0x00000010) >> 4)
3387 #define ALT_CLKMGR_MAINPLL_ENR_CSCLKEN_SET(value) (((value) << 4) & 0x00000010)
3398 #define ALT_CLKMGR_MAINPLL_ENR_CSTMRCLKEN_LSB 5
3400 #define ALT_CLKMGR_MAINPLL_ENR_CSTMRCLKEN_MSB 5
3402 #define ALT_CLKMGR_MAINPLL_ENR_CSTMRCLKEN_WIDTH 1
3404 #define ALT_CLKMGR_MAINPLL_ENR_CSTMRCLKEN_SET_MSK 0x00000020
3406 #define ALT_CLKMGR_MAINPLL_ENR_CSTMRCLKEN_CLR_MSK 0xffffffdf
3408 #define ALT_CLKMGR_MAINPLL_ENR_CSTMRCLKEN_RESET 0x1
3410 #define ALT_CLKMGR_MAINPLL_ENR_CSTMRCLKEN_GET(value) (((value) & 0x00000020) >> 5)
3412 #define ALT_CLKMGR_MAINPLL_ENR_CSTMRCLKEN_SET(value) (((value) << 5) & 0x00000020)
3423 #define ALT_CLKMGR_MAINPLL_ENR_S2FUSER0CLKEN_LSB 6
3425 #define ALT_CLKMGR_MAINPLL_ENR_S2FUSER0CLKEN_MSB 6
3427 #define ALT_CLKMGR_MAINPLL_ENR_S2FUSER0CLKEN_WIDTH 1
3429 #define ALT_CLKMGR_MAINPLL_ENR_S2FUSER0CLKEN_SET_MSK 0x00000040
3431 #define ALT_CLKMGR_MAINPLL_ENR_S2FUSER0CLKEN_CLR_MSK 0xffffffbf
3433 #define ALT_CLKMGR_MAINPLL_ENR_S2FUSER0CLKEN_RESET 0x1
3435 #define ALT_CLKMGR_MAINPLL_ENR_S2FUSER0CLKEN_GET(value) (((value) & 0x00000040) >> 6)
3437 #define ALT_CLKMGR_MAINPLL_ENR_S2FUSER0CLKEN_SET(value) (((value) << 6) & 0x00000040)
3448 #define ALT_CLKMGR_MAINPLL_ENR_HMCPLLREFCLKEN_LSB 7
3450 #define ALT_CLKMGR_MAINPLL_ENR_HMCPLLREFCLKEN_MSB 7
3452 #define ALT_CLKMGR_MAINPLL_ENR_HMCPLLREFCLKEN_WIDTH 1
3454 #define ALT_CLKMGR_MAINPLL_ENR_HMCPLLREFCLKEN_SET_MSK 0x00000080
3456 #define ALT_CLKMGR_MAINPLL_ENR_HMCPLLREFCLKEN_CLR_MSK 0xffffff7f
3458 #define ALT_CLKMGR_MAINPLL_ENR_HMCPLLREFCLKEN_RESET 0x1
3460 #define ALT_CLKMGR_MAINPLL_ENR_HMCPLLREFCLKEN_GET(value) (((value) & 0x00000080) >> 7)
3462 #define ALT_CLKMGR_MAINPLL_ENR_HMCPLLREFCLKEN_SET(value) (((value) << 7) & 0x00000080)
3464 #ifndef __ASSEMBLY__
3475 struct ALT_CLKMGR_MAINPLL_ENR_s
3477 uint32_t mpuclken : 1;
3478 uint32_t l4mainclken : 1;
3479 uint32_t l4mpclken : 1;
3480 uint32_t l4spclken : 1;
3481 uint32_t csclken : 1;
3482 uint32_t cstimerclken : 1;
3483 uint32_t s2fuser0clken : 1;
3484 uint32_t hmcpllrefclken : 1;
3489 typedef volatile struct ALT_CLKMGR_MAINPLL_ENR_s ALT_CLKMGR_MAINPLL_ENR_t;
3493 #define ALT_CLKMGR_MAINPLL_ENR_RESET 0x000000ff
3495 #define ALT_CLKMGR_MAINPLL_ENR_OFST 0x10
3528 #define ALT_CLKMGR_MAINPLL_BYPASS_MPU_LSB 0
3530 #define ALT_CLKMGR_MAINPLL_BYPASS_MPU_MSB 0
3532 #define ALT_CLKMGR_MAINPLL_BYPASS_MPU_WIDTH 1
3534 #define ALT_CLKMGR_MAINPLL_BYPASS_MPU_SET_MSK 0x00000001
3536 #define ALT_CLKMGR_MAINPLL_BYPASS_MPU_CLR_MSK 0xfffffffe
3538 #define ALT_CLKMGR_MAINPLL_BYPASS_MPU_RESET 0x1
3540 #define ALT_CLKMGR_MAINPLL_BYPASS_MPU_GET(value) (((value) & 0x00000001) >> 0)
3542 #define ALT_CLKMGR_MAINPLL_BYPASS_MPU_SET(value) (((value) << 0) & 0x00000001)
3553 #define ALT_CLKMGR_MAINPLL_BYPASS_NOC_LSB 1
3555 #define ALT_CLKMGR_MAINPLL_BYPASS_NOC_MSB 1
3557 #define ALT_CLKMGR_MAINPLL_BYPASS_NOC_WIDTH 1
3559 #define ALT_CLKMGR_MAINPLL_BYPASS_NOC_SET_MSK 0x00000002
3561 #define ALT_CLKMGR_MAINPLL_BYPASS_NOC_CLR_MSK 0xfffffffd
3563 #define ALT_CLKMGR_MAINPLL_BYPASS_NOC_RESET 0x1
3565 #define ALT_CLKMGR_MAINPLL_BYPASS_NOC_GET(value) (((value) & 0x00000002) >> 1)
3567 #define ALT_CLKMGR_MAINPLL_BYPASS_NOC_SET(value) (((value) << 1) & 0x00000002)
3578 #define ALT_CLKMGR_MAINPLL_BYPASS_S2FUSER0_LSB 2
3580 #define ALT_CLKMGR_MAINPLL_BYPASS_S2FUSER0_MSB 2
3582 #define ALT_CLKMGR_MAINPLL_BYPASS_S2FUSER0_WIDTH 1
3584 #define ALT_CLKMGR_MAINPLL_BYPASS_S2FUSER0_SET_MSK 0x00000004
3586 #define ALT_CLKMGR_MAINPLL_BYPASS_S2FUSER0_CLR_MSK 0xfffffffb
3588 #define ALT_CLKMGR_MAINPLL_BYPASS_S2FUSER0_RESET 0x1
3590 #define ALT_CLKMGR_MAINPLL_BYPASS_S2FUSER0_GET(value) (((value) & 0x00000004) >> 2)
3592 #define ALT_CLKMGR_MAINPLL_BYPASS_S2FUSER0_SET(value) (((value) << 2) & 0x00000004)
3603 #define ALT_CLKMGR_MAINPLL_BYPASS_HMCPLLREF_LSB 3
3605 #define ALT_CLKMGR_MAINPLL_BYPASS_HMCPLLREF_MSB 3
3607 #define ALT_CLKMGR_MAINPLL_BYPASS_HMCPLLREF_WIDTH 1
3609 #define ALT_CLKMGR_MAINPLL_BYPASS_HMCPLLREF_SET_MSK 0x00000008
3611 #define ALT_CLKMGR_MAINPLL_BYPASS_HMCPLLREF_CLR_MSK 0xfffffff7
3613 #define ALT_CLKMGR_MAINPLL_BYPASS_HMCPLLREF_RESET 0x1
3615 #define ALT_CLKMGR_MAINPLL_BYPASS_HMCPLLREF_GET(value) (((value) & 0x00000008) >> 3)
3617 #define ALT_CLKMGR_MAINPLL_BYPASS_HMCPLLREF_SET(value) (((value) << 3) & 0x00000008)
3630 #define ALT_CLKMGR_MAINPLL_BYPASS_RFEN_LSB 4
3632 #define ALT_CLKMGR_MAINPLL_BYPASS_RFEN_MSB 4
3634 #define ALT_CLKMGR_MAINPLL_BYPASS_RFEN_WIDTH 1
3636 #define ALT_CLKMGR_MAINPLL_BYPASS_RFEN_SET_MSK 0x00000010
3638 #define ALT_CLKMGR_MAINPLL_BYPASS_RFEN_CLR_MSK 0xffffffef
3640 #define ALT_CLKMGR_MAINPLL_BYPASS_RFEN_RESET 0x1
3642 #define ALT_CLKMGR_MAINPLL_BYPASS_RFEN_GET(value) (((value) & 0x00000010) >> 4)
3644 #define ALT_CLKMGR_MAINPLL_BYPASS_RFEN_SET(value) (((value) << 4) & 0x00000010)
3656 #define ALT_CLKMGR_MAINPLL_BYPASS_FBEN_LSB 5
3658 #define ALT_CLKMGR_MAINPLL_BYPASS_FBEN_MSB 5
3660 #define ALT_CLKMGR_MAINPLL_BYPASS_FBEN_WIDTH 1
3662 #define ALT_CLKMGR_MAINPLL_BYPASS_FBEN_SET_MSK 0x00000020
3664 #define ALT_CLKMGR_MAINPLL_BYPASS_FBEN_CLR_MSK 0xffffffdf
3666 #define ALT_CLKMGR_MAINPLL_BYPASS_FBEN_RESET 0x1
3668 #define ALT_CLKMGR_MAINPLL_BYPASS_FBEN_GET(value) (((value) & 0x00000020) >> 5)
3670 #define ALT_CLKMGR_MAINPLL_BYPASS_FBEN_SET(value) (((value) << 5) & 0x00000020)
3672 #ifndef __ASSEMBLY__
3683 struct ALT_CLKMGR_MAINPLL_BYPASS_s
3687 uint32_t s2fuser0 : 1;
3688 uint32_t hmcpllref : 1;
3695 typedef volatile struct ALT_CLKMGR_MAINPLL_BYPASS_s ALT_CLKMGR_MAINPLL_BYPASS_t;
3699 #define ALT_CLKMGR_MAINPLL_BYPASS_RESET 0x0000003f
3701 #define ALT_CLKMGR_MAINPLL_BYPASS_OFST 0x14
3731 #define ALT_CLKMGR_MAINPLL_BYPASSS_MPU_LSB 0
3733 #define ALT_CLKMGR_MAINPLL_BYPASSS_MPU_MSB 0
3735 #define ALT_CLKMGR_MAINPLL_BYPASSS_MPU_WIDTH 1
3737 #define ALT_CLKMGR_MAINPLL_BYPASSS_MPU_SET_MSK 0x00000001
3739 #define ALT_CLKMGR_MAINPLL_BYPASSS_MPU_CLR_MSK 0xfffffffe
3741 #define ALT_CLKMGR_MAINPLL_BYPASSS_MPU_RESET 0x1
3743 #define ALT_CLKMGR_MAINPLL_BYPASSS_MPU_GET(value) (((value) & 0x00000001) >> 0)
3745 #define ALT_CLKMGR_MAINPLL_BYPASSS_MPU_SET(value) (((value) << 0) & 0x00000001)
3757 #define ALT_CLKMGR_MAINPLL_BYPASSS_NOC_LSB 1
3759 #define ALT_CLKMGR_MAINPLL_BYPASSS_NOC_MSB 1
3761 #define ALT_CLKMGR_MAINPLL_BYPASSS_NOC_WIDTH 1
3763 #define ALT_CLKMGR_MAINPLL_BYPASSS_NOC_SET_MSK 0x00000002
3765 #define ALT_CLKMGR_MAINPLL_BYPASSS_NOC_CLR_MSK 0xfffffffd
3767 #define ALT_CLKMGR_MAINPLL_BYPASSS_NOC_RESET 0x1
3769 #define ALT_CLKMGR_MAINPLL_BYPASSS_NOC_GET(value) (((value) & 0x00000002) >> 1)
3771 #define ALT_CLKMGR_MAINPLL_BYPASSS_NOC_SET(value) (((value) << 1) & 0x00000002)
3783 #define ALT_CLKMGR_MAINPLL_BYPASSS_S2FUSER0_LSB 2
3785 #define ALT_CLKMGR_MAINPLL_BYPASSS_S2FUSER0_MSB 2
3787 #define ALT_CLKMGR_MAINPLL_BYPASSS_S2FUSER0_WIDTH 1
3789 #define ALT_CLKMGR_MAINPLL_BYPASSS_S2FUSER0_SET_MSK 0x00000004
3791 #define ALT_CLKMGR_MAINPLL_BYPASSS_S2FUSER0_CLR_MSK 0xfffffffb
3793 #define ALT_CLKMGR_MAINPLL_BYPASSS_S2FUSER0_RESET 0x1
3795 #define ALT_CLKMGR_MAINPLL_BYPASSS_S2FUSER0_GET(value) (((value) & 0x00000004) >> 2)
3797 #define ALT_CLKMGR_MAINPLL_BYPASSS_S2FUSER0_SET(value) (((value) << 2) & 0x00000004)
3808 #define ALT_CLKMGR_MAINPLL_BYPASSS_HMCPLLREF_LSB 3
3810 #define ALT_CLKMGR_MAINPLL_BYPASSS_HMCPLLREF_MSB 3
3812 #define ALT_CLKMGR_MAINPLL_BYPASSS_HMCPLLREF_WIDTH 1
3814 #define ALT_CLKMGR_MAINPLL_BYPASSS_HMCPLLREF_SET_MSK 0x00000008
3816 #define ALT_CLKMGR_MAINPLL_BYPASSS_HMCPLLREF_CLR_MSK 0xfffffff7
3818 #define ALT_CLKMGR_MAINPLL_BYPASSS_HMCPLLREF_RESET 0x1
3820 #define ALT_CLKMGR_MAINPLL_BYPASSS_HMCPLLREF_GET(value) (((value) & 0x00000008) >> 3)
3822 #define ALT_CLKMGR_MAINPLL_BYPASSS_HMCPLLREF_SET(value) (((value) << 3) & 0x00000008)
3835 #define ALT_CLKMGR_MAINPLL_BYPASSS_RFEN_LSB 4
3837 #define ALT_CLKMGR_MAINPLL_BYPASSS_RFEN_MSB 4
3839 #define ALT_CLKMGR_MAINPLL_BYPASSS_RFEN_WIDTH 1
3841 #define ALT_CLKMGR_MAINPLL_BYPASSS_RFEN_SET_MSK 0x00000010
3843 #define ALT_CLKMGR_MAINPLL_BYPASSS_RFEN_CLR_MSK 0xffffffef
3845 #define ALT_CLKMGR_MAINPLL_BYPASSS_RFEN_RESET 0x1
3847 #define ALT_CLKMGR_MAINPLL_BYPASSS_RFEN_GET(value) (((value) & 0x00000010) >> 4)
3849 #define ALT_CLKMGR_MAINPLL_BYPASSS_RFEN_SET(value) (((value) << 4) & 0x00000010)
3861 #define ALT_CLKMGR_MAINPLL_BYPASSS_FBEN_LSB 5
3863 #define ALT_CLKMGR_MAINPLL_BYPASSS_FBEN_MSB 5
3865 #define ALT_CLKMGR_MAINPLL_BYPASSS_FBEN_WIDTH 1
3867 #define ALT_CLKMGR_MAINPLL_BYPASSS_FBEN_SET_MSK 0x00000020
3869 #define ALT_CLKMGR_MAINPLL_BYPASSS_FBEN_CLR_MSK 0xffffffdf
3871 #define ALT_CLKMGR_MAINPLL_BYPASSS_FBEN_RESET 0x1
3873 #define ALT_CLKMGR_MAINPLL_BYPASSS_FBEN_GET(value) (((value) & 0x00000020) >> 5)
3875 #define ALT_CLKMGR_MAINPLL_BYPASSS_FBEN_SET(value) (((value) << 5) & 0x00000020)
3877 #ifndef __ASSEMBLY__
3888 struct ALT_CLKMGR_MAINPLL_BYPASSS_s
3892 uint32_t s2fuser0 : 1;
3893 uint32_t hmcpllref : 1;
3900 typedef volatile struct ALT_CLKMGR_MAINPLL_BYPASSS_s ALT_CLKMGR_MAINPLL_BYPASSS_t;
3904 #define ALT_CLKMGR_MAINPLL_BYPASSS_RESET 0x0000003f
3906 #define ALT_CLKMGR_MAINPLL_BYPASSS_OFST 0x18
3936 #define ALT_CLKMGR_MAINPLL_BYPASSR_MPU_LSB 0
3938 #define ALT_CLKMGR_MAINPLL_BYPASSR_MPU_MSB 0
3940 #define ALT_CLKMGR_MAINPLL_BYPASSR_MPU_WIDTH 1
3942 #define ALT_CLKMGR_MAINPLL_BYPASSR_MPU_SET_MSK 0x00000001
3944 #define ALT_CLKMGR_MAINPLL_BYPASSR_MPU_CLR_MSK 0xfffffffe
3946 #define ALT_CLKMGR_MAINPLL_BYPASSR_MPU_RESET 0x1
3948 #define ALT_CLKMGR_MAINPLL_BYPASSR_MPU_GET(value) (((value) & 0x00000001) >> 0)
3950 #define ALT_CLKMGR_MAINPLL_BYPASSR_MPU_SET(value) (((value) << 0) & 0x00000001)
3962 #define ALT_CLKMGR_MAINPLL_BYPASSR_NOC_LSB 1
3964 #define ALT_CLKMGR_MAINPLL_BYPASSR_NOC_MSB 1
3966 #define ALT_CLKMGR_MAINPLL_BYPASSR_NOC_WIDTH 1
3968 #define ALT_CLKMGR_MAINPLL_BYPASSR_NOC_SET_MSK 0x00000002
3970 #define ALT_CLKMGR_MAINPLL_BYPASSR_NOC_CLR_MSK 0xfffffffd
3972 #define ALT_CLKMGR_MAINPLL_BYPASSR_NOC_RESET 0x1
3974 #define ALT_CLKMGR_MAINPLL_BYPASSR_NOC_GET(value) (((value) & 0x00000002) >> 1)
3976 #define ALT_CLKMGR_MAINPLL_BYPASSR_NOC_SET(value) (((value) << 1) & 0x00000002)
3988 #define ALT_CLKMGR_MAINPLL_BYPASSR_S2FUSER0_LSB 2
3990 #define ALT_CLKMGR_MAINPLL_BYPASSR_S2FUSER0_MSB 2
3992 #define ALT_CLKMGR_MAINPLL_BYPASSR_S2FUSER0_WIDTH 1
3994 #define ALT_CLKMGR_MAINPLL_BYPASSR_S2FUSER0_SET_MSK 0x00000004
3996 #define ALT_CLKMGR_MAINPLL_BYPASSR_S2FUSER0_CLR_MSK 0xfffffffb
3998 #define ALT_CLKMGR_MAINPLL_BYPASSR_S2FUSER0_RESET 0x1
4000 #define ALT_CLKMGR_MAINPLL_BYPASSR_S2FUSER0_GET(value) (((value) & 0x00000004) >> 2)
4002 #define ALT_CLKMGR_MAINPLL_BYPASSR_S2FUSER0_SET(value) (((value) << 2) & 0x00000004)
4013 #define ALT_CLKMGR_MAINPLL_BYPASSR_HMCPLLREF_LSB 3
4015 #define ALT_CLKMGR_MAINPLL_BYPASSR_HMCPLLREF_MSB 3
4017 #define ALT_CLKMGR_MAINPLL_BYPASSR_HMCPLLREF_WIDTH 1
4019 #define ALT_CLKMGR_MAINPLL_BYPASSR_HMCPLLREF_SET_MSK 0x00000008
4021 #define ALT_CLKMGR_MAINPLL_BYPASSR_HMCPLLREF_CLR_MSK 0xfffffff7
4023 #define ALT_CLKMGR_MAINPLL_BYPASSR_HMCPLLREF_RESET 0x1
4025 #define ALT_CLKMGR_MAINPLL_BYPASSR_HMCPLLREF_GET(value) (((value) & 0x00000008) >> 3)
4027 #define ALT_CLKMGR_MAINPLL_BYPASSR_HMCPLLREF_SET(value) (((value) << 3) & 0x00000008)
4040 #define ALT_CLKMGR_MAINPLL_BYPASSR_RFEN_LSB 4
4042 #define ALT_CLKMGR_MAINPLL_BYPASSR_RFEN_MSB 4
4044 #define ALT_CLKMGR_MAINPLL_BYPASSR_RFEN_WIDTH 1
4046 #define ALT_CLKMGR_MAINPLL_BYPASSR_RFEN_SET_MSK 0x00000010
4048 #define ALT_CLKMGR_MAINPLL_BYPASSR_RFEN_CLR_MSK 0xffffffef
4050 #define ALT_CLKMGR_MAINPLL_BYPASSR_RFEN_RESET 0x1
4052 #define ALT_CLKMGR_MAINPLL_BYPASSR_RFEN_GET(value) (((value) & 0x00000010) >> 4)
4054 #define ALT_CLKMGR_MAINPLL_BYPASSR_RFEN_SET(value) (((value) << 4) & 0x00000010)
4066 #define ALT_CLKMGR_MAINPLL_BYPASSR_FBEN_LSB 5
4068 #define ALT_CLKMGR_MAINPLL_BYPASSR_FBEN_MSB 5
4070 #define ALT_CLKMGR_MAINPLL_BYPASSR_FBEN_WIDTH 1
4072 #define ALT_CLKMGR_MAINPLL_BYPASSR_FBEN_SET_MSK 0x00000020
4074 #define ALT_CLKMGR_MAINPLL_BYPASSR_FBEN_CLR_MSK 0xffffffdf
4076 #define ALT_CLKMGR_MAINPLL_BYPASSR_FBEN_RESET 0x1
4078 #define ALT_CLKMGR_MAINPLL_BYPASSR_FBEN_GET(value) (((value) & 0x00000020) >> 5)
4080 #define ALT_CLKMGR_MAINPLL_BYPASSR_FBEN_SET(value) (((value) << 5) & 0x00000020)
4082 #ifndef __ASSEMBLY__
4093 struct ALT_CLKMGR_MAINPLL_BYPASSR_s
4097 uint32_t s2fuser0 : 1;
4098 uint32_t hmcpllref : 1;
4105 typedef volatile struct ALT_CLKMGR_MAINPLL_BYPASSR_s ALT_CLKMGR_MAINPLL_BYPASSR_t;
4109 #define ALT_CLKMGR_MAINPLL_BYPASSR_RESET 0x0000003f
4111 #define ALT_CLKMGR_MAINPLL_BYPASSR_OFST 0x1c
4138 #define ALT_CLKMGR_MAINPLL_MPUCLK_CNT_LSB 0
4140 #define ALT_CLKMGR_MAINPLL_MPUCLK_CNT_MSB 10
4142 #define ALT_CLKMGR_MAINPLL_MPUCLK_CNT_WIDTH 11
4144 #define ALT_CLKMGR_MAINPLL_MPUCLK_CNT_SET_MSK 0x000007ff
4146 #define ALT_CLKMGR_MAINPLL_MPUCLK_CNT_CLR_MSK 0xfffff800
4148 #define ALT_CLKMGR_MAINPLL_MPUCLK_CNT_RESET 0x0
4150 #define ALT_CLKMGR_MAINPLL_MPUCLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4152 #define ALT_CLKMGR_MAINPLL_MPUCLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4177 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_E_MAIN 0x0
4182 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_E_PERI 0x1
4187 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_E_OSC1 0x2
4192 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_E_INTOSC 0x3
4197 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_E_FPGA 0x4
4200 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_LSB 16
4202 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_MSB 18
4204 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_WIDTH 3
4206 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_SET_MSK 0x00070000
4208 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_CLR_MSK 0xfff8ffff
4210 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_RESET 0x0
4212 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
4214 #define ALT_CLKMGR_MAINPLL_MPUCLK_SRC_SET(value) (((value) << 16) & 0x00070000)
4216 #ifndef __ASSEMBLY__
4227 struct ALT_CLKMGR_MAINPLL_MPUCLK_s
4236 typedef volatile struct ALT_CLKMGR_MAINPLL_MPUCLK_s ALT_CLKMGR_MAINPLL_MPUCLK_t;
4240 #define ALT_CLKMGR_MAINPLL_MPUCLK_RESET 0x00000000
4242 #define ALT_CLKMGR_MAINPLL_MPUCLK_OFST 0x20
4269 #define ALT_CLKMGR_MAINPLL_NOCCLK_CNT_LSB 0
4271 #define ALT_CLKMGR_MAINPLL_NOCCLK_CNT_MSB 10
4273 #define ALT_CLKMGR_MAINPLL_NOCCLK_CNT_WIDTH 11
4275 #define ALT_CLKMGR_MAINPLL_NOCCLK_CNT_SET_MSK 0x000007ff
4277 #define ALT_CLKMGR_MAINPLL_NOCCLK_CNT_CLR_MSK 0xfffff800
4279 #define ALT_CLKMGR_MAINPLL_NOCCLK_CNT_RESET 0x0
4281 #define ALT_CLKMGR_MAINPLL_NOCCLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4283 #define ALT_CLKMGR_MAINPLL_NOCCLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4308 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_E_MAIN 0x0
4313 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_E_PERI 0x1
4318 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_E_OSC1 0x2
4323 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_E_INTOSC 0x3
4328 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_E_FPGA 0x4
4331 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_LSB 16
4333 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_MSB 18
4335 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_WIDTH 3
4337 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_SET_MSK 0x00070000
4339 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_CLR_MSK 0xfff8ffff
4341 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_RESET 0x0
4343 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
4345 #define ALT_CLKMGR_MAINPLL_NOCCLK_SRC_SET(value) (((value) << 16) & 0x00070000)
4347 #ifndef __ASSEMBLY__
4358 struct ALT_CLKMGR_MAINPLL_NOCCLK_s
4367 typedef volatile struct ALT_CLKMGR_MAINPLL_NOCCLK_s ALT_CLKMGR_MAINPLL_NOCCLK_t;
4371 #define ALT_CLKMGR_MAINPLL_NOCCLK_RESET 0x00000000
4373 #define ALT_CLKMGR_MAINPLL_NOCCLK_OFST 0x24
4398 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_CNT_LSB 0
4400 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_CNT_MSB 10
4402 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_CNT_WIDTH 11
4404 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_CNT_SET_MSK 0x000007ff
4406 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_CNT_CLR_MSK 0xfffff800
4408 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_CNT_RESET 0x0
4410 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4412 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4414 #ifndef __ASSEMBLY__
4425 struct ALT_CLKMGR_MAINPLL_CNTR2CLK_s
4432 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR2CLK_s ALT_CLKMGR_MAINPLL_CNTR2CLK_t;
4436 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_RESET 0x00000000
4438 #define ALT_CLKMGR_MAINPLL_CNTR2CLK_OFST 0x28
4463 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_CNT_LSB 0
4465 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_CNT_MSB 10
4467 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_CNT_WIDTH 11
4469 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_CNT_SET_MSK 0x000007ff
4471 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_CNT_CLR_MSK 0xfffff800
4473 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_CNT_RESET 0x0
4475 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4477 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4479 #ifndef __ASSEMBLY__
4490 struct ALT_CLKMGR_MAINPLL_CNTR3CLK_s
4497 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR3CLK_s ALT_CLKMGR_MAINPLL_CNTR3CLK_t;
4501 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_RESET 0x00000000
4503 #define ALT_CLKMGR_MAINPLL_CNTR3CLK_OFST 0x2c
4528 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_CNT_LSB 0
4530 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_CNT_MSB 10
4532 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_CNT_WIDTH 11
4534 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_CNT_SET_MSK 0x000007ff
4536 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_CNT_CLR_MSK 0xfffff800
4538 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_CNT_RESET 0x0
4540 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4542 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4544 #ifndef __ASSEMBLY__
4555 struct ALT_CLKMGR_MAINPLL_CNTR4CLK_s
4562 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR4CLK_s ALT_CLKMGR_MAINPLL_CNTR4CLK_t;
4566 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_RESET 0x00000000
4568 #define ALT_CLKMGR_MAINPLL_CNTR4CLK_OFST 0x30
4593 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_CNT_LSB 0
4595 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_CNT_MSB 10
4597 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_CNT_WIDTH 11
4599 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_CNT_SET_MSK 0x000007ff
4601 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_CNT_CLR_MSK 0xfffff800
4603 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_CNT_RESET 0x0
4605 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4607 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4609 #ifndef __ASSEMBLY__
4620 struct ALT_CLKMGR_MAINPLL_CNTR5CLK_s
4627 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR5CLK_s ALT_CLKMGR_MAINPLL_CNTR5CLK_t;
4631 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_RESET 0x00000000
4633 #define ALT_CLKMGR_MAINPLL_CNTR5CLK_OFST 0x34
4658 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_CNT_LSB 0
4660 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_CNT_MSB 10
4662 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_CNT_WIDTH 11
4664 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_CNT_SET_MSK 0x000007ff
4666 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_CNT_CLR_MSK 0xfffff800
4668 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_CNT_RESET 0x0
4670 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4672 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4674 #ifndef __ASSEMBLY__
4685 struct ALT_CLKMGR_MAINPLL_CNTR6CLK_s
4692 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR6CLK_s ALT_CLKMGR_MAINPLL_CNTR6CLK_t;
4696 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_RESET 0x00000000
4698 #define ALT_CLKMGR_MAINPLL_CNTR6CLK_OFST 0x38
4725 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_CNT_LSB 0
4727 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_CNT_MSB 10
4729 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_CNT_WIDTH 11
4731 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_CNT_SET_MSK 0x000007ff
4733 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_CNT_CLR_MSK 0xfffff800
4735 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_CNT_RESET 0x0
4737 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4739 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4764 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_E_MAIN 0x0
4769 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_E_PERI 0x1
4774 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_E_OSC1 0x2
4779 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_E_INTOSC 0x3
4784 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_E_FPGA 0x4
4787 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_LSB 16
4789 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_MSB 18
4791 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_WIDTH 3
4793 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_SET_MSK 0x00070000
4795 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_CLR_MSK 0xfff8ffff
4797 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_RESET 0x0
4799 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
4801 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_SRC_SET(value) (((value) << 16) & 0x00070000)
4803 #ifndef __ASSEMBLY__
4814 struct ALT_CLKMGR_MAINPLL_CNTR7CLK_s
4823 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR7CLK_s ALT_CLKMGR_MAINPLL_CNTR7CLK_t;
4827 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_RESET 0x00000000
4829 #define ALT_CLKMGR_MAINPLL_CNTR7CLK_OFST 0x3c
4854 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_CNT_LSB 0
4856 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_CNT_MSB 10
4858 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_CNT_WIDTH 11
4860 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_CNT_SET_MSK 0x000007ff
4862 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_CNT_CLR_MSK 0xfffff800
4864 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_CNT_RESET 0x0
4866 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4868 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4870 #ifndef __ASSEMBLY__
4881 struct ALT_CLKMGR_MAINPLL_CNTR8CLK_s
4888 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR8CLK_s ALT_CLKMGR_MAINPLL_CNTR8CLK_t;
4892 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_RESET 0x00000000
4894 #define ALT_CLKMGR_MAINPLL_CNTR8CLK_OFST 0x40
4921 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_CNT_LSB 0
4923 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_CNT_MSB 10
4925 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_CNT_WIDTH 11
4927 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_CNT_SET_MSK 0x000007ff
4929 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_CNT_CLR_MSK 0xfffff800
4931 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_CNT_RESET 0x0
4933 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
4935 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
4960 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_E_MAIN 0x0
4965 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_E_PERI 0x1
4970 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_E_OSC1 0x2
4975 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_E_INTOSC 0x3
4980 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_E_FPGA 0x4
4983 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_LSB 16
4985 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_MSB 18
4987 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_WIDTH 3
4989 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_SET_MSK 0x00070000
4991 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_CLR_MSK 0xfff8ffff
4993 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_RESET 0x0
4995 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
4997 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_SRC_SET(value) (((value) << 16) & 0x00070000)
4999 #ifndef __ASSEMBLY__
5010 struct ALT_CLKMGR_MAINPLL_CNTR9CLK_s
5019 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR9CLK_s ALT_CLKMGR_MAINPLL_CNTR9CLK_t;
5023 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_RESET 0x00000000
5025 #define ALT_CLKMGR_MAINPLL_CNTR9CLK_OFST 0x44
5050 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_CNT_LSB 0
5052 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_CNT_MSB 10
5054 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_CNT_WIDTH 11
5056 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_CNT_SET_MSK 0x000007ff
5058 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_CNT_CLR_MSK 0xfffff800
5060 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_CNT_RESET 0x0
5062 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
5064 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
5066 #ifndef __ASSEMBLY__
5077 struct ALT_CLKMGR_MAINPLL_CNTR15CLK_s
5084 typedef volatile struct ALT_CLKMGR_MAINPLL_CNTR15CLK_s ALT_CLKMGR_MAINPLL_CNTR15CLK_t;
5088 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_RESET 0x00000000
5090 #define ALT_CLKMGR_MAINPLL_CNTR15CLK_OFST 0x5c
5130 #define ALT_CLKMGR_MAINPLL_OUTRST_OUTRST_LSB 0
5132 #define ALT_CLKMGR_MAINPLL_OUTRST_OUTRST_MSB 15
5134 #define ALT_CLKMGR_MAINPLL_OUTRST_OUTRST_WIDTH 16
5136 #define ALT_CLKMGR_MAINPLL_OUTRST_OUTRST_SET_MSK 0x0000ffff
5138 #define ALT_CLKMGR_MAINPLL_OUTRST_OUTRST_CLR_MSK 0xffff0000
5140 #define ALT_CLKMGR_MAINPLL_OUTRST_OUTRST_RESET 0x0
5142 #define ALT_CLKMGR_MAINPLL_OUTRST_OUTRST_GET(value) (((value) & 0x0000ffff) >> 0)
5144 #define ALT_CLKMGR_MAINPLL_OUTRST_OUTRST_SET(value) (((value) << 0) & 0x0000ffff)
5146 #ifndef __ASSEMBLY__
5157 struct ALT_CLKMGR_MAINPLL_OUTRST_s
5159 uint32_t outreset : 16;
5164 typedef volatile struct ALT_CLKMGR_MAINPLL_OUTRST_s ALT_CLKMGR_MAINPLL_OUTRST_t;
5168 #define ALT_CLKMGR_MAINPLL_OUTRST_RESET 0x00000000
5170 #define ALT_CLKMGR_MAINPLL_OUTRST_OFST 0x60
5217 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_E_IDLE 0x0
5223 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_E_ACK_RXD 0x1
5226 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_LSB 0
5228 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_MSB 15
5230 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_WIDTH 16
5232 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_SET_MSK 0x0000ffff
5234 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_CLR_MSK 0xffff0000
5236 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_RESET 0x0
5238 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_GET(value) (((value) & 0x0000ffff) >> 0)
5240 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OUTRSTACK_SET(value) (((value) << 0) & 0x0000ffff)
5242 #ifndef __ASSEMBLY__
5253 struct ALT_CLKMGR_MAINPLL_OUTRSTSTAT_s
5255 const uint32_t outresetack : 16;
5260 typedef volatile struct ALT_CLKMGR_MAINPLL_OUTRSTSTAT_s ALT_CLKMGR_MAINPLL_OUTRSTSTAT_t;
5264 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_RESET 0x00000000
5266 #define ALT_CLKMGR_MAINPLL_OUTRSTSTAT_OFST 0x64
5311 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_E_DIV1 0x0
5317 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_E_DIV2 0x1
5323 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_E_DIV4 0x2
5329 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_E_DIV8 0x3
5332 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_LSB 0
5334 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_MSB 1
5336 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_WIDTH 2
5338 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_SET_MSK 0x00000003
5340 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_CLR_MSK 0xfffffffc
5342 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_RESET 0x0
5344 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_GET(value) (((value) & 0x00000003) >> 0)
5346 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_SET(value) (((value) << 0) & 0x00000003)
5370 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_E_DIV1 0x0
5376 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_E_DIV2 0x1
5382 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_E_DIV4 0x2
5388 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_E_DIV8 0x3
5391 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_LSB 8
5393 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_MSB 9
5395 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_WIDTH 2
5397 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_SET_MSK 0x00000300
5399 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_CLR_MSK 0xfffffcff
5401 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_RESET 0x1
5403 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_GET(value) (((value) & 0x00000300) >> 8)
5405 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4MPCLK_SET(value) (((value) << 8) & 0x00000300)
5429 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_E_DIV1 0x0
5435 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_E_DIV2 0x1
5441 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_E_DIV4 0x2
5447 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_E_DIV8 0x3
5450 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_LSB 16
5452 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_MSB 17
5454 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_WIDTH 2
5456 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_SET_MSK 0x00030000
5458 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_CLR_MSK 0xfffcffff
5460 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_RESET 0x2
5462 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_GET(value) (((value) & 0x00030000) >> 16)
5464 #define ALT_CLKMGR_MAINPLL_NOCDIV_L4SPCLK_SET(value) (((value) << 16) & 0x00030000)
5488 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_E_DIV1 0x0
5494 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_E_DIV2 0x1
5500 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_E_DIV4 0x2
5506 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_E_DIV8 0x3
5509 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_LSB 24
5511 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_MSB 25
5513 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_WIDTH 2
5515 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_SET_MSK 0x03000000
5517 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_CLR_MSK 0xfcffffff
5519 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_RESET 0x0
5521 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_GET(value) (((value) & 0x03000000) >> 24)
5523 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSATCLK_SET(value) (((value) << 24) & 0x03000000)
5549 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_E_DIV1 0x0
5555 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_E_DIV2 0x1
5561 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_E_DIV4 0x2
5567 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_E_DIV8 0x3
5570 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_LSB 26
5572 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_MSB 27
5574 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_WIDTH 2
5576 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_SET_MSK 0x0c000000
5578 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_CLR_MSK 0xf3ffffff
5580 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_RESET 0x2
5582 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_GET(value) (((value) & 0x0c000000) >> 26)
5584 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSTRACECLK_SET(value) (((value) << 26) & 0x0c000000)
5607 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_E_DIV1 0x0
5613 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_E_DIV4 0x1
5616 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_LSB 28
5618 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_MSB 28
5620 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_WIDTH 1
5622 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_SET_MSK 0x10000000
5624 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_CLR_MSK 0xefffffff
5626 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_RESET 0x1
5628 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_GET(value) (((value) & 0x10000000) >> 28)
5630 #define ALT_CLKMGR_MAINPLL_NOCDIV_CSPDBGCLK_SET(value) (((value) << 28) & 0x10000000)
5632 #ifndef __ASSEMBLY__
5643 struct ALT_CLKMGR_MAINPLL_NOCDIV_s
5645 uint32_t l4mainclk : 2;
5647 uint32_t l4mpclk : 2;
5649 uint32_t l4spclk : 2;
5651 uint32_t csatclk : 2;
5652 uint32_t cstraceclk : 2;
5653 uint32_t cspdbgclk : 1;
5658 typedef volatile struct ALT_CLKMGR_MAINPLL_NOCDIV_s ALT_CLKMGR_MAINPLL_NOCDIV_t;
5662 #define ALT_CLKMGR_MAINPLL_NOCDIV_RESET 0x18020100
5664 #define ALT_CLKMGR_MAINPLL_NOCDIV_OFST 0x68
5666 #ifndef __ASSEMBLY__
5677 struct ALT_CLKMGR_MAINPLL_s
5679 ALT_CLKMGR_MAINPLL_VCO0_t vco0;
5680 ALT_CLKMGR_MAINPLL_VCO1_t vco1;
5681 ALT_CLKMGR_MAINPLL_EN_t en;
5682 ALT_CLKMGR_MAINPLL_ENS_t ens;
5683 ALT_CLKMGR_MAINPLL_ENR_t enr;
5684 ALT_CLKMGR_MAINPLL_BYPASS_t bypass;
5685 ALT_CLKMGR_MAINPLL_BYPASSS_t bypasss;
5686 ALT_CLKMGR_MAINPLL_BYPASSR_t bypassr;
5687 ALT_CLKMGR_MAINPLL_MPUCLK_t mpuclk;
5688 ALT_CLKMGR_MAINPLL_NOCCLK_t nocclk;
5689 ALT_CLKMGR_MAINPLL_CNTR2CLK_t cntr2clk;
5690 ALT_CLKMGR_MAINPLL_CNTR3CLK_t cntr3clk;
5691 ALT_CLKMGR_MAINPLL_CNTR4CLK_t cntr4clk;
5692 ALT_CLKMGR_MAINPLL_CNTR5CLK_t cntr5clk;
5693 ALT_CLKMGR_MAINPLL_CNTR6CLK_t cntr6clk;
5694 ALT_CLKMGR_MAINPLL_CNTR7CLK_t cntr7clk;
5695 ALT_CLKMGR_MAINPLL_CNTR8CLK_t cntr8clk;
5696 ALT_CLKMGR_MAINPLL_CNTR9CLK_t cntr9clk;
5697 volatile uint32_t _pad_0x48_0x5b[5];
5698 ALT_CLKMGR_MAINPLL_CNTR15CLK_t cntr15clk;
5699 ALT_CLKMGR_MAINPLL_OUTRST_t outrst;
5700 ALT_CLKMGR_MAINPLL_OUTRSTSTAT_t outrststat;
5701 ALT_CLKMGR_MAINPLL_NOCDIV_t nocdiv;
5702 volatile uint32_t _pad_0x6c_0x80[5];
5706 typedef volatile struct ALT_CLKMGR_MAINPLL_s ALT_CLKMGR_MAINPLL_t;
5708 struct ALT_CLKMGR_MAINPLL_raw_s
5710 volatile uint32_t vco0;
5711 volatile uint32_t vco1;
5712 volatile uint32_t en;
5713 volatile uint32_t ens;
5714 volatile uint32_t enr;
5715 volatile uint32_t bypass;
5716 volatile uint32_t bypasss;
5717 volatile uint32_t bypassr;
5718 volatile uint32_t mpuclk;
5719 volatile uint32_t nocclk;
5720 volatile uint32_t cntr2clk;
5721 volatile uint32_t cntr3clk;
5722 volatile uint32_t cntr4clk;
5723 volatile uint32_t cntr5clk;
5724 volatile uint32_t cntr6clk;
5725 volatile uint32_t cntr7clk;
5726 volatile uint32_t cntr8clk;
5727 volatile uint32_t cntr9clk;
5728 uint32_t _pad_0x48_0x5b[5];
5729 volatile uint32_t cntr15clk;
5730 volatile uint32_t outrst;
5731 volatile uint32_t outrststat;
5732 volatile uint32_t nocdiv;
5733 uint32_t _pad_0x6c_0x80[5];
5737 typedef volatile struct ALT_CLKMGR_MAINPLL_raw_s ALT_CLKMGR_MAINPLL_raw_t;
5779 #define ALT_CLKMGR_PERPLL_VCO0_BGPWRDN_LSB 0
5781 #define ALT_CLKMGR_PERPLL_VCO0_BGPWRDN_MSB 0
5783 #define ALT_CLKMGR_PERPLL_VCO0_BGPWRDN_WIDTH 1
5785 #define ALT_CLKMGR_PERPLL_VCO0_BGPWRDN_SET_MSK 0x00000001
5787 #define ALT_CLKMGR_PERPLL_VCO0_BGPWRDN_CLR_MSK 0xfffffffe
5789 #define ALT_CLKMGR_PERPLL_VCO0_BGPWRDN_RESET 0x1
5791 #define ALT_CLKMGR_PERPLL_VCO0_BGPWRDN_GET(value) (((value) & 0x00000001) >> 0)
5793 #define ALT_CLKMGR_PERPLL_VCO0_BGPWRDN_SET(value) (((value) << 0) & 0x00000001)
5804 #define ALT_CLKMGR_PERPLL_VCO0_PWRDN_LSB 1
5806 #define ALT_CLKMGR_PERPLL_VCO0_PWRDN_MSB 1
5808 #define ALT_CLKMGR_PERPLL_VCO0_PWRDN_WIDTH 1
5810 #define ALT_CLKMGR_PERPLL_VCO0_PWRDN_SET_MSK 0x00000002
5812 #define ALT_CLKMGR_PERPLL_VCO0_PWRDN_CLR_MSK 0xfffffffd
5814 #define ALT_CLKMGR_PERPLL_VCO0_PWRDN_RESET 0x1
5816 #define ALT_CLKMGR_PERPLL_VCO0_PWRDN_GET(value) (((value) & 0x00000002) >> 1)
5818 #define ALT_CLKMGR_PERPLL_VCO0_PWRDN_SET(value) (((value) << 1) & 0x00000002)
5829 #define ALT_CLKMGR_PERPLL_VCO0_EN_LSB 2
5831 #define ALT_CLKMGR_PERPLL_VCO0_EN_MSB 2
5833 #define ALT_CLKMGR_PERPLL_VCO0_EN_WIDTH 1
5835 #define ALT_CLKMGR_PERPLL_VCO0_EN_SET_MSK 0x00000004
5837 #define ALT_CLKMGR_PERPLL_VCO0_EN_CLR_MSK 0xfffffffb
5839 #define ALT_CLKMGR_PERPLL_VCO0_EN_RESET 0x0
5841 #define ALT_CLKMGR_PERPLL_VCO0_EN_GET(value) (((value) & 0x00000004) >> 2)
5843 #define ALT_CLKMGR_PERPLL_VCO0_EN_SET(value) (((value) << 2) & 0x00000004)
5861 #define ALT_CLKMGR_PERPLL_VCO0_OUTRSTALL_LSB 3
5863 #define ALT_CLKMGR_PERPLL_VCO0_OUTRSTALL_MSB 3
5865 #define ALT_CLKMGR_PERPLL_VCO0_OUTRSTALL_WIDTH 1
5867 #define ALT_CLKMGR_PERPLL_VCO0_OUTRSTALL_SET_MSK 0x00000008
5869 #define ALT_CLKMGR_PERPLL_VCO0_OUTRSTALL_CLR_MSK 0xfffffff7
5871 #define ALT_CLKMGR_PERPLL_VCO0_OUTRSTALL_RESET 0x0
5873 #define ALT_CLKMGR_PERPLL_VCO0_OUTRSTALL_GET(value) (((value) & 0x00000008) >> 3)
5875 #define ALT_CLKMGR_PERPLL_VCO0_OUTRSTALL_SET(value) (((value) << 3) & 0x00000008)
5898 #define ALT_CLKMGR_PERPLL_VCO0_REGEXTSEL_LSB 4
5900 #define ALT_CLKMGR_PERPLL_VCO0_REGEXTSEL_MSB 4
5902 #define ALT_CLKMGR_PERPLL_VCO0_REGEXTSEL_WIDTH 1
5904 #define ALT_CLKMGR_PERPLL_VCO0_REGEXTSEL_SET_MSK 0x00000010
5906 #define ALT_CLKMGR_PERPLL_VCO0_REGEXTSEL_CLR_MSK 0xffffffef
5908 #define ALT_CLKMGR_PERPLL_VCO0_REGEXTSEL_RESET 0x0
5910 #define ALT_CLKMGR_PERPLL_VCO0_REGEXTSEL_GET(value) (((value) & 0x00000010) >> 4)
5912 #define ALT_CLKMGR_PERPLL_VCO0_REGEXTSEL_SET(value) (((value) << 4) & 0x00000010)
5923 #define ALT_CLKMGR_PERPLL_VCO0_FASTEN_LSB 5
5925 #define ALT_CLKMGR_PERPLL_VCO0_FASTEN_MSB 5
5927 #define ALT_CLKMGR_PERPLL_VCO0_FASTEN_WIDTH 1
5929 #define ALT_CLKMGR_PERPLL_VCO0_FASTEN_SET_MSK 0x00000020
5931 #define ALT_CLKMGR_PERPLL_VCO0_FASTEN_CLR_MSK 0xffffffdf
5933 #define ALT_CLKMGR_PERPLL_VCO0_FASTEN_RESET 0x0
5935 #define ALT_CLKMGR_PERPLL_VCO0_FASTEN_GET(value) (((value) & 0x00000020) >> 5)
5937 #define ALT_CLKMGR_PERPLL_VCO0_FASTEN_SET(value) (((value) << 5) & 0x00000020)
5948 #define ALT_CLKMGR_PERPLL_VCO0_SATEN_LSB 6
5950 #define ALT_CLKMGR_PERPLL_VCO0_SATEN_MSB 6
5952 #define ALT_CLKMGR_PERPLL_VCO0_SATEN_WIDTH 1
5954 #define ALT_CLKMGR_PERPLL_VCO0_SATEN_SET_MSK 0x00000040
5956 #define ALT_CLKMGR_PERPLL_VCO0_SATEN_CLR_MSK 0xffffffbf
5958 #define ALT_CLKMGR_PERPLL_VCO0_SATEN_RESET 0x1
5960 #define ALT_CLKMGR_PERPLL_VCO0_SATEN_GET(value) (((value) & 0x00000040) >> 6)
5962 #define ALT_CLKMGR_PERPLL_VCO0_SATEN_SET(value) (((value) << 6) & 0x00000040)
5986 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_E_EOSC1 0x0
5992 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_E_INTOSC 0x1
5998 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_E_F2S 0x2
6004 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_E_MAIN 0x3
6007 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_LSB 8
6009 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_MSB 9
6011 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_WIDTH 2
6013 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_SET_MSK 0x00000300
6015 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_CLR_MSK 0xfffffcff
6017 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_RESET 0x0
6019 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_GET(value) (((value) & 0x00000300) >> 8)
6021 #define ALT_CLKMGR_PERPLL_VCO0_PSRC_SET(value) (((value) << 8) & 0x00000300)
6032 #define ALT_CLKMGR_PERPLL_VCO0_BWADJ_LSB 16
6034 #define ALT_CLKMGR_PERPLL_VCO0_BWADJ_MSB 27
6036 #define ALT_CLKMGR_PERPLL_VCO0_BWADJ_WIDTH 12
6038 #define ALT_CLKMGR_PERPLL_VCO0_BWADJ_SET_MSK 0x0fff0000
6040 #define ALT_CLKMGR_PERPLL_VCO0_BWADJ_CLR_MSK 0xf000ffff
6042 #define ALT_CLKMGR_PERPLL_VCO0_BWADJ_RESET 0x1
6044 #define ALT_CLKMGR_PERPLL_VCO0_BWADJ_GET(value) (((value) & 0x0fff0000) >> 16)
6046 #define ALT_CLKMGR_PERPLL_VCO0_BWADJ_SET(value) (((value) << 16) & 0x0fff0000)
6062 #define ALT_CLKMGR_PERPLL_VCO0_BWADJEN_LSB 28
6064 #define ALT_CLKMGR_PERPLL_VCO0_BWADJEN_MSB 28
6066 #define ALT_CLKMGR_PERPLL_VCO0_BWADJEN_WIDTH 1
6068 #define ALT_CLKMGR_PERPLL_VCO0_BWADJEN_SET_MSK 0x10000000
6070 #define ALT_CLKMGR_PERPLL_VCO0_BWADJEN_CLR_MSK 0xefffffff
6072 #define ALT_CLKMGR_PERPLL_VCO0_BWADJEN_RESET 0x0
6074 #define ALT_CLKMGR_PERPLL_VCO0_BWADJEN_GET(value) (((value) & 0x10000000) >> 28)
6076 #define ALT_CLKMGR_PERPLL_VCO0_BWADJEN_SET(value) (((value) << 28) & 0x10000000)
6078 #ifndef __ASSEMBLY__
6089 struct ALT_CLKMGR_PERPLL_VCO0_s
6091 uint32_t bgpwrdn : 1;
6094 uint32_t outresetall : 1;
6095 uint32_t regextsel : 1;
6096 uint32_t fasten : 1;
6101 uint32_t bwadj : 12;
6102 uint32_t bwadjen : 1;
6107 typedef volatile struct ALT_CLKMGR_PERPLL_VCO0_s ALT_CLKMGR_PERPLL_VCO0_t;
6111 #define ALT_CLKMGR_PERPLL_VCO0_RESET 0x00010043
6113 #define ALT_CLKMGR_PERPLL_VCO0_OFST 0x0
6143 #define ALT_CLKMGR_PERPLL_VCO1_NUMER_LSB 0
6145 #define ALT_CLKMGR_PERPLL_VCO1_NUMER_MSB 12
6147 #define ALT_CLKMGR_PERPLL_VCO1_NUMER_WIDTH 13
6149 #define ALT_CLKMGR_PERPLL_VCO1_NUMER_SET_MSK 0x00001fff
6151 #define ALT_CLKMGR_PERPLL_VCO1_NUMER_CLR_MSK 0xffffe000
6153 #define ALT_CLKMGR_PERPLL_VCO1_NUMER_RESET 0x1
6155 #define ALT_CLKMGR_PERPLL_VCO1_NUMER_GET(value) (((value) & 0x00001fff) >> 0)
6157 #define ALT_CLKMGR_PERPLL_VCO1_NUMER_SET(value) (((value) << 0) & 0x00001fff)
6171 #define ALT_CLKMGR_PERPLL_VCO1_DENOM_LSB 16
6173 #define ALT_CLKMGR_PERPLL_VCO1_DENOM_MSB 21
6175 #define ALT_CLKMGR_PERPLL_VCO1_DENOM_WIDTH 6
6177 #define ALT_CLKMGR_PERPLL_VCO1_DENOM_SET_MSK 0x003f0000
6179 #define ALT_CLKMGR_PERPLL_VCO1_DENOM_CLR_MSK 0xffc0ffff
6181 #define ALT_CLKMGR_PERPLL_VCO1_DENOM_RESET 0x1
6183 #define ALT_CLKMGR_PERPLL_VCO1_DENOM_GET(value) (((value) & 0x003f0000) >> 16)
6185 #define ALT_CLKMGR_PERPLL_VCO1_DENOM_SET(value) (((value) << 16) & 0x003f0000)
6187 #ifndef __ASSEMBLY__
6198 struct ALT_CLKMGR_PERPLL_VCO1_s
6200 uint32_t numer : 13;
6207 typedef volatile struct ALT_CLKMGR_PERPLL_VCO1_s ALT_CLKMGR_PERPLL_VCO1_t;
6211 #define ALT_CLKMGR_PERPLL_VCO1_RESET 0x00010001
6213 #define ALT_CLKMGR_PERPLL_VCO1_OFST 0x4
6253 #define ALT_CLKMGR_PERPLL_EN_EMAC0EN_LSB 0
6255 #define ALT_CLKMGR_PERPLL_EN_EMAC0EN_MSB 0
6257 #define ALT_CLKMGR_PERPLL_EN_EMAC0EN_WIDTH 1
6259 #define ALT_CLKMGR_PERPLL_EN_EMAC0EN_SET_MSK 0x00000001
6261 #define ALT_CLKMGR_PERPLL_EN_EMAC0EN_CLR_MSK 0xfffffffe
6263 #define ALT_CLKMGR_PERPLL_EN_EMAC0EN_RESET 0x1
6265 #define ALT_CLKMGR_PERPLL_EN_EMAC0EN_GET(value) (((value) & 0x00000001) >> 0)
6267 #define ALT_CLKMGR_PERPLL_EN_EMAC0EN_SET(value) (((value) << 0) & 0x00000001)
6278 #define ALT_CLKMGR_PERPLL_EN_EMAC1EN_LSB 1
6280 #define ALT_CLKMGR_PERPLL_EN_EMAC1EN_MSB 1
6282 #define ALT_CLKMGR_PERPLL_EN_EMAC1EN_WIDTH 1
6284 #define ALT_CLKMGR_PERPLL_EN_EMAC1EN_SET_MSK 0x00000002
6286 #define ALT_CLKMGR_PERPLL_EN_EMAC1EN_CLR_MSK 0xfffffffd
6288 #define ALT_CLKMGR_PERPLL_EN_EMAC1EN_RESET 0x1
6290 #define ALT_CLKMGR_PERPLL_EN_EMAC1EN_GET(value) (((value) & 0x00000002) >> 1)
6292 #define ALT_CLKMGR_PERPLL_EN_EMAC1EN_SET(value) (((value) << 1) & 0x00000002)
6303 #define ALT_CLKMGR_PERPLL_EN_EMAC2EN_LSB 2
6305 #define ALT_CLKMGR_PERPLL_EN_EMAC2EN_MSB 2
6307 #define ALT_CLKMGR_PERPLL_EN_EMAC2EN_WIDTH 1
6309 #define ALT_CLKMGR_PERPLL_EN_EMAC2EN_SET_MSK 0x00000004
6311 #define ALT_CLKMGR_PERPLL_EN_EMAC2EN_CLR_MSK 0xfffffffb
6313 #define ALT_CLKMGR_PERPLL_EN_EMAC2EN_RESET 0x1
6315 #define ALT_CLKMGR_PERPLL_EN_EMAC2EN_GET(value) (((value) & 0x00000004) >> 2)
6317 #define ALT_CLKMGR_PERPLL_EN_EMAC2EN_SET(value) (((value) << 2) & 0x00000004)
6328 #define ALT_CLKMGR_PERPLL_EN_EMACPTPEN_LSB 3
6330 #define ALT_CLKMGR_PERPLL_EN_EMACPTPEN_MSB 3
6332 #define ALT_CLKMGR_PERPLL_EN_EMACPTPEN_WIDTH 1
6334 #define ALT_CLKMGR_PERPLL_EN_EMACPTPEN_SET_MSK 0x00000008
6336 #define ALT_CLKMGR_PERPLL_EN_EMACPTPEN_CLR_MSK 0xfffffff7
6338 #define ALT_CLKMGR_PERPLL_EN_EMACPTPEN_RESET 0x1
6340 #define ALT_CLKMGR_PERPLL_EN_EMACPTPEN_GET(value) (((value) & 0x00000008) >> 3)
6342 #define ALT_CLKMGR_PERPLL_EN_EMACPTPEN_SET(value) (((value) << 3) & 0x00000008)
6353 #define ALT_CLKMGR_PERPLL_EN_GPIODBEN_LSB 4
6355 #define ALT_CLKMGR_PERPLL_EN_GPIODBEN_MSB 4
6357 #define ALT_CLKMGR_PERPLL_EN_GPIODBEN_WIDTH 1
6359 #define ALT_CLKMGR_PERPLL_EN_GPIODBEN_SET_MSK 0x00000010
6361 #define ALT_CLKMGR_PERPLL_EN_GPIODBEN_CLR_MSK 0xffffffef
6363 #define ALT_CLKMGR_PERPLL_EN_GPIODBEN_RESET 0x1
6365 #define ALT_CLKMGR_PERPLL_EN_GPIODBEN_GET(value) (((value) & 0x00000010) >> 4)
6367 #define ALT_CLKMGR_PERPLL_EN_GPIODBEN_SET(value) (((value) << 4) & 0x00000010)
6379 #define ALT_CLKMGR_PERPLL_EN_SDMMCCLKEN_LSB 5
6381 #define ALT_CLKMGR_PERPLL_EN_SDMMCCLKEN_MSB 5
6383 #define ALT_CLKMGR_PERPLL_EN_SDMMCCLKEN_WIDTH 1
6385 #define ALT_CLKMGR_PERPLL_EN_SDMMCCLKEN_SET_MSK 0x00000020
6387 #define ALT_CLKMGR_PERPLL_EN_SDMMCCLKEN_CLR_MSK 0xffffffdf
6389 #define ALT_CLKMGR_PERPLL_EN_SDMMCCLKEN_RESET 0x1
6391 #define ALT_CLKMGR_PERPLL_EN_SDMMCCLKEN_GET(value) (((value) & 0x00000020) >> 5)
6393 #define ALT_CLKMGR_PERPLL_EN_SDMMCCLKEN_SET(value) (((value) << 5) & 0x00000020)
6404 #define ALT_CLKMGR_PERPLL_EN_S2FUSER1CLKEN_LSB 6
6406 #define ALT_CLKMGR_PERPLL_EN_S2FUSER1CLKEN_MSB 6
6408 #define ALT_CLKMGR_PERPLL_EN_S2FUSER1CLKEN_WIDTH 1
6410 #define ALT_CLKMGR_PERPLL_EN_S2FUSER1CLKEN_SET_MSK 0x00000040
6412 #define ALT_CLKMGR_PERPLL_EN_S2FUSER1CLKEN_CLR_MSK 0xffffffbf
6414 #define ALT_CLKMGR_PERPLL_EN_S2FUSER1CLKEN_RESET 0x1
6416 #define ALT_CLKMGR_PERPLL_EN_S2FUSER1CLKEN_GET(value) (((value) & 0x00000040) >> 6)
6418 #define ALT_CLKMGR_PERPLL_EN_S2FUSER1CLKEN_SET(value) (((value) << 6) & 0x00000040)
6430 #define ALT_CLKMGR_PERPLL_EN_USBCLKEN_LSB 8
6432 #define ALT_CLKMGR_PERPLL_EN_USBCLKEN_MSB 8
6434 #define ALT_CLKMGR_PERPLL_EN_USBCLKEN_WIDTH 1
6436 #define ALT_CLKMGR_PERPLL_EN_USBCLKEN_SET_MSK 0x00000100
6438 #define ALT_CLKMGR_PERPLL_EN_USBCLKEN_CLR_MSK 0xfffffeff
6440 #define ALT_CLKMGR_PERPLL_EN_USBCLKEN_RESET 0x1
6442 #define ALT_CLKMGR_PERPLL_EN_USBCLKEN_GET(value) (((value) & 0x00000100) >> 8)
6444 #define ALT_CLKMGR_PERPLL_EN_USBCLKEN_SET(value) (((value) << 8) & 0x00000100)
6456 #define ALT_CLKMGR_PERPLL_EN_SPIMCLKEN_LSB 9
6458 #define ALT_CLKMGR_PERPLL_EN_SPIMCLKEN_MSB 9
6460 #define ALT_CLKMGR_PERPLL_EN_SPIMCLKEN_WIDTH 1
6462 #define ALT_CLKMGR_PERPLL_EN_SPIMCLKEN_SET_MSK 0x00000200
6464 #define ALT_CLKMGR_PERPLL_EN_SPIMCLKEN_CLR_MSK 0xfffffdff
6466 #define ALT_CLKMGR_PERPLL_EN_SPIMCLKEN_RESET 0x1
6468 #define ALT_CLKMGR_PERPLL_EN_SPIMCLKEN_GET(value) (((value) & 0x00000200) >> 9)
6470 #define ALT_CLKMGR_PERPLL_EN_SPIMCLKEN_SET(value) (((value) << 9) & 0x00000200)
6482 #define ALT_CLKMGR_PERPLL_EN_NANDCLKEN_LSB 10
6484 #define ALT_CLKMGR_PERPLL_EN_NANDCLKEN_MSB 10
6486 #define ALT_CLKMGR_PERPLL_EN_NANDCLKEN_WIDTH 1
6488 #define ALT_CLKMGR_PERPLL_EN_NANDCLKEN_SET_MSK 0x00000400
6490 #define ALT_CLKMGR_PERPLL_EN_NANDCLKEN_CLR_MSK 0xfffffbff
6492 #define ALT_CLKMGR_PERPLL_EN_NANDCLKEN_RESET 0x1
6494 #define ALT_CLKMGR_PERPLL_EN_NANDCLKEN_GET(value) (((value) & 0x00000400) >> 10)
6496 #define ALT_CLKMGR_PERPLL_EN_NANDCLKEN_SET(value) (((value) << 10) & 0x00000400)
6508 #define ALT_CLKMGR_PERPLL_EN_QSPICLKEN_LSB 11
6510 #define ALT_CLKMGR_PERPLL_EN_QSPICLKEN_MSB 11
6512 #define ALT_CLKMGR_PERPLL_EN_QSPICLKEN_WIDTH 1
6514 #define ALT_CLKMGR_PERPLL_EN_QSPICLKEN_SET_MSK 0x00000800
6516 #define ALT_CLKMGR_PERPLL_EN_QSPICLKEN_CLR_MSK 0xfffff7ff
6518 #define ALT_CLKMGR_PERPLL_EN_QSPICLKEN_RESET 0x1
6520 #define ALT_CLKMGR_PERPLL_EN_QSPICLKEN_GET(value) (((value) & 0x00000800) >> 11)
6522 #define ALT_CLKMGR_PERPLL_EN_QSPICLKEN_SET(value) (((value) << 11) & 0x00000800)
6524 #ifndef __ASSEMBLY__
6535 struct ALT_CLKMGR_PERPLL_EN_s
6537 uint32_t emac0en : 1;
6538 uint32_t emac1en : 1;
6539 uint32_t emac2en : 1;
6540 uint32_t emacptpen : 1;
6541 uint32_t gpiodben : 1;
6542 uint32_t sdmmcclken : 1;
6543 uint32_t s2fuser1clken : 1;
6545 uint32_t usbclken : 1;
6546 uint32_t spimclken : 1;
6547 uint32_t nandclken : 1;
6548 uint32_t qspiclken : 1;
6553 typedef volatile struct ALT_CLKMGR_PERPLL_EN_s ALT_CLKMGR_PERPLL_EN_t;
6557 #define ALT_CLKMGR_PERPLL_EN_RESET 0x00000f7f
6559 #define ALT_CLKMGR_PERPLL_EN_OFST 0x8
6594 #define ALT_CLKMGR_PERPLL_ENS_EMAC0EN_LSB 0
6596 #define ALT_CLKMGR_PERPLL_ENS_EMAC0EN_MSB 0
6598 #define ALT_CLKMGR_PERPLL_ENS_EMAC0EN_WIDTH 1
6600 #define ALT_CLKMGR_PERPLL_ENS_EMAC0EN_SET_MSK 0x00000001
6602 #define ALT_CLKMGR_PERPLL_ENS_EMAC0EN_CLR_MSK 0xfffffffe
6604 #define ALT_CLKMGR_PERPLL_ENS_EMAC0EN_RESET 0x1
6606 #define ALT_CLKMGR_PERPLL_ENS_EMAC0EN_GET(value) (((value) & 0x00000001) >> 0)
6608 #define ALT_CLKMGR_PERPLL_ENS_EMAC0EN_SET(value) (((value) << 0) & 0x00000001)
6619 #define ALT_CLKMGR_PERPLL_ENS_EMAC1EN_LSB 1
6621 #define ALT_CLKMGR_PERPLL_ENS_EMAC1EN_MSB 1
6623 #define ALT_CLKMGR_PERPLL_ENS_EMAC1EN_WIDTH 1
6625 #define ALT_CLKMGR_PERPLL_ENS_EMAC1EN_SET_MSK 0x00000002
6627 #define ALT_CLKMGR_PERPLL_ENS_EMAC1EN_CLR_MSK 0xfffffffd
6629 #define ALT_CLKMGR_PERPLL_ENS_EMAC1EN_RESET 0x1
6631 #define ALT_CLKMGR_PERPLL_ENS_EMAC1EN_GET(value) (((value) & 0x00000002) >> 1)
6633 #define ALT_CLKMGR_PERPLL_ENS_EMAC1EN_SET(value) (((value) << 1) & 0x00000002)
6644 #define ALT_CLKMGR_PERPLL_ENS_EMAC2EN_LSB 2
6646 #define ALT_CLKMGR_PERPLL_ENS_EMAC2EN_MSB 2
6648 #define ALT_CLKMGR_PERPLL_ENS_EMAC2EN_WIDTH 1
6650 #define ALT_CLKMGR_PERPLL_ENS_EMAC2EN_SET_MSK 0x00000004
6652 #define ALT_CLKMGR_PERPLL_ENS_EMAC2EN_CLR_MSK 0xfffffffb
6654 #define ALT_CLKMGR_PERPLL_ENS_EMAC2EN_RESET 0x1
6656 #define ALT_CLKMGR_PERPLL_ENS_EMAC2EN_GET(value) (((value) & 0x00000004) >> 2)
6658 #define ALT_CLKMGR_PERPLL_ENS_EMAC2EN_SET(value) (((value) << 2) & 0x00000004)
6669 #define ALT_CLKMGR_PERPLL_ENS_EMACPTPEN_LSB 3
6671 #define ALT_CLKMGR_PERPLL_ENS_EMACPTPEN_MSB 3
6673 #define ALT_CLKMGR_PERPLL_ENS_EMACPTPEN_WIDTH 1
6675 #define ALT_CLKMGR_PERPLL_ENS_EMACPTPEN_SET_MSK 0x00000008
6677 #define ALT_CLKMGR_PERPLL_ENS_EMACPTPEN_CLR_MSK 0xfffffff7
6679 #define ALT_CLKMGR_PERPLL_ENS_EMACPTPEN_RESET 0x1
6681 #define ALT_CLKMGR_PERPLL_ENS_EMACPTPEN_GET(value) (((value) & 0x00000008) >> 3)
6683 #define ALT_CLKMGR_PERPLL_ENS_EMACPTPEN_SET(value) (((value) << 3) & 0x00000008)
6694 #define ALT_CLKMGR_PERPLL_ENS_GPIODBEN_LSB 4
6696 #define ALT_CLKMGR_PERPLL_ENS_GPIODBEN_MSB 4
6698 #define ALT_CLKMGR_PERPLL_ENS_GPIODBEN_WIDTH 1
6700 #define ALT_CLKMGR_PERPLL_ENS_GPIODBEN_SET_MSK 0x00000010
6702 #define ALT_CLKMGR_PERPLL_ENS_GPIODBEN_CLR_MSK 0xffffffef
6704 #define ALT_CLKMGR_PERPLL_ENS_GPIODBEN_RESET 0x1
6706 #define ALT_CLKMGR_PERPLL_ENS_GPIODBEN_GET(value) (((value) & 0x00000010) >> 4)
6708 #define ALT_CLKMGR_PERPLL_ENS_GPIODBEN_SET(value) (((value) << 4) & 0x00000010)
6720 #define ALT_CLKMGR_PERPLL_ENS_SDMMCCLKEN_LSB 5
6722 #define ALT_CLKMGR_PERPLL_ENS_SDMMCCLKEN_MSB 5
6724 #define ALT_CLKMGR_PERPLL_ENS_SDMMCCLKEN_WIDTH 1
6726 #define ALT_CLKMGR_PERPLL_ENS_SDMMCCLKEN_SET_MSK 0x00000020
6728 #define ALT_CLKMGR_PERPLL_ENS_SDMMCCLKEN_CLR_MSK 0xffffffdf
6730 #define ALT_CLKMGR_PERPLL_ENS_SDMMCCLKEN_RESET 0x1
6732 #define ALT_CLKMGR_PERPLL_ENS_SDMMCCLKEN_GET(value) (((value) & 0x00000020) >> 5)
6734 #define ALT_CLKMGR_PERPLL_ENS_SDMMCCLKEN_SET(value) (((value) << 5) & 0x00000020)
6745 #define ALT_CLKMGR_PERPLL_ENS_S2FUSER1CLKEN_LSB 6
6747 #define ALT_CLKMGR_PERPLL_ENS_S2FUSER1CLKEN_MSB 6
6749 #define ALT_CLKMGR_PERPLL_ENS_S2FUSER1CLKEN_WIDTH 1
6751 #define ALT_CLKMGR_PERPLL_ENS_S2FUSER1CLKEN_SET_MSK 0x00000040
6753 #define ALT_CLKMGR_PERPLL_ENS_S2FUSER1CLKEN_CLR_MSK 0xffffffbf
6755 #define ALT_CLKMGR_PERPLL_ENS_S2FUSER1CLKEN_RESET 0x1
6757 #define ALT_CLKMGR_PERPLL_ENS_S2FUSER1CLKEN_GET(value) (((value) & 0x00000040) >> 6)
6759 #define ALT_CLKMGR_PERPLL_ENS_S2FUSER1CLKEN_SET(value) (((value) << 6) & 0x00000040)
6771 #define ALT_CLKMGR_PERPLL_ENS_USBCLKEN_LSB 8
6773 #define ALT_CLKMGR_PERPLL_ENS_USBCLKEN_MSB 8
6775 #define ALT_CLKMGR_PERPLL_ENS_USBCLKEN_WIDTH 1
6777 #define ALT_CLKMGR_PERPLL_ENS_USBCLKEN_SET_MSK 0x00000100
6779 #define ALT_CLKMGR_PERPLL_ENS_USBCLKEN_CLR_MSK 0xfffffeff
6781 #define ALT_CLKMGR_PERPLL_ENS_USBCLKEN_RESET 0x1
6783 #define ALT_CLKMGR_PERPLL_ENS_USBCLKEN_GET(value) (((value) & 0x00000100) >> 8)
6785 #define ALT_CLKMGR_PERPLL_ENS_USBCLKEN_SET(value) (((value) << 8) & 0x00000100)
6797 #define ALT_CLKMGR_PERPLL_ENS_SPIMCLKEN_LSB 9
6799 #define ALT_CLKMGR_PERPLL_ENS_SPIMCLKEN_MSB 9
6801 #define ALT_CLKMGR_PERPLL_ENS_SPIMCLKEN_WIDTH 1
6803 #define ALT_CLKMGR_PERPLL_ENS_SPIMCLKEN_SET_MSK 0x00000200
6805 #define ALT_CLKMGR_PERPLL_ENS_SPIMCLKEN_CLR_MSK 0xfffffdff
6807 #define ALT_CLKMGR_PERPLL_ENS_SPIMCLKEN_RESET 0x1
6809 #define ALT_CLKMGR_PERPLL_ENS_SPIMCLKEN_GET(value) (((value) & 0x00000200) >> 9)
6811 #define ALT_CLKMGR_PERPLL_ENS_SPIMCLKEN_SET(value) (((value) << 9) & 0x00000200)
6823 #define ALT_CLKMGR_PERPLL_ENS_NANDCLKEN_LSB 10
6825 #define ALT_CLKMGR_PERPLL_ENS_NANDCLKEN_MSB 10
6827 #define ALT_CLKMGR_PERPLL_ENS_NANDCLKEN_WIDTH 1
6829 #define ALT_CLKMGR_PERPLL_ENS_NANDCLKEN_SET_MSK 0x00000400
6831 #define ALT_CLKMGR_PERPLL_ENS_NANDCLKEN_CLR_MSK 0xfffffbff
6833 #define ALT_CLKMGR_PERPLL_ENS_NANDCLKEN_RESET 0x1
6835 #define ALT_CLKMGR_PERPLL_ENS_NANDCLKEN_GET(value) (((value) & 0x00000400) >> 10)
6837 #define ALT_CLKMGR_PERPLL_ENS_NANDCLKEN_SET(value) (((value) << 10) & 0x00000400)
6849 #define ALT_CLKMGR_PERPLL_ENS_QSPICLKEN_LSB 11
6851 #define ALT_CLKMGR_PERPLL_ENS_QSPICLKEN_MSB 11
6853 #define ALT_CLKMGR_PERPLL_ENS_QSPICLKEN_WIDTH 1
6855 #define ALT_CLKMGR_PERPLL_ENS_QSPICLKEN_SET_MSK 0x00000800
6857 #define ALT_CLKMGR_PERPLL_ENS_QSPICLKEN_CLR_MSK 0xfffff7ff
6859 #define ALT_CLKMGR_PERPLL_ENS_QSPICLKEN_RESET 0x1
6861 #define ALT_CLKMGR_PERPLL_ENS_QSPICLKEN_GET(value) (((value) & 0x00000800) >> 11)
6863 #define ALT_CLKMGR_PERPLL_ENS_QSPICLKEN_SET(value) (((value) << 11) & 0x00000800)
6865 #ifndef __ASSEMBLY__
6876 struct ALT_CLKMGR_PERPLL_ENS_s
6878 uint32_t emac0en : 1;
6879 uint32_t emac1en : 1;
6880 uint32_t emac2en : 1;
6881 uint32_t emacptpen : 1;
6882 uint32_t gpiodben : 1;
6883 uint32_t sdmmcclken : 1;
6884 uint32_t s2fuser1clken : 1;
6886 uint32_t usbclken : 1;
6887 uint32_t spimclken : 1;
6888 uint32_t nandclken : 1;
6889 uint32_t qspiclken : 1;
6894 typedef volatile struct ALT_CLKMGR_PERPLL_ENS_s ALT_CLKMGR_PERPLL_ENS_t;
6898 #define ALT_CLKMGR_PERPLL_ENS_RESET 0x00000f7f
6900 #define ALT_CLKMGR_PERPLL_ENS_OFST 0xc
6935 #define ALT_CLKMGR_PERPLL_ENR_EMAC0EN_LSB 0
6937 #define ALT_CLKMGR_PERPLL_ENR_EMAC0EN_MSB 0
6939 #define ALT_CLKMGR_PERPLL_ENR_EMAC0EN_WIDTH 1
6941 #define ALT_CLKMGR_PERPLL_ENR_EMAC0EN_SET_MSK 0x00000001
6943 #define ALT_CLKMGR_PERPLL_ENR_EMAC0EN_CLR_MSK 0xfffffffe
6945 #define ALT_CLKMGR_PERPLL_ENR_EMAC0EN_RESET 0x1
6947 #define ALT_CLKMGR_PERPLL_ENR_EMAC0EN_GET(value) (((value) & 0x00000001) >> 0)
6949 #define ALT_CLKMGR_PERPLL_ENR_EMAC0EN_SET(value) (((value) << 0) & 0x00000001)
6960 #define ALT_CLKMGR_PERPLL_ENR_EMAC1EN_LSB 1
6962 #define ALT_CLKMGR_PERPLL_ENR_EMAC1EN_MSB 1
6964 #define ALT_CLKMGR_PERPLL_ENR_EMAC1EN_WIDTH 1
6966 #define ALT_CLKMGR_PERPLL_ENR_EMAC1EN_SET_MSK 0x00000002
6968 #define ALT_CLKMGR_PERPLL_ENR_EMAC1EN_CLR_MSK 0xfffffffd
6970 #define ALT_CLKMGR_PERPLL_ENR_EMAC1EN_RESET 0x1
6972 #define ALT_CLKMGR_PERPLL_ENR_EMAC1EN_GET(value) (((value) & 0x00000002) >> 1)
6974 #define ALT_CLKMGR_PERPLL_ENR_EMAC1EN_SET(value) (((value) << 1) & 0x00000002)
6985 #define ALT_CLKMGR_PERPLL_ENR_EMAC2EN_LSB 2
6987 #define ALT_CLKMGR_PERPLL_ENR_EMAC2EN_MSB 2
6989 #define ALT_CLKMGR_PERPLL_ENR_EMAC2EN_WIDTH 1
6991 #define ALT_CLKMGR_PERPLL_ENR_EMAC2EN_SET_MSK 0x00000004
6993 #define ALT_CLKMGR_PERPLL_ENR_EMAC2EN_CLR_MSK 0xfffffffb
6995 #define ALT_CLKMGR_PERPLL_ENR_EMAC2EN_RESET 0x1
6997 #define ALT_CLKMGR_PERPLL_ENR_EMAC2EN_GET(value) (((value) & 0x00000004) >> 2)
6999 #define ALT_CLKMGR_PERPLL_ENR_EMAC2EN_SET(value) (((value) << 2) & 0x00000004)
7010 #define ALT_CLKMGR_PERPLL_ENR_EMACPTPEN_LSB 3
7012 #define ALT_CLKMGR_PERPLL_ENR_EMACPTPEN_MSB 3
7014 #define ALT_CLKMGR_PERPLL_ENR_EMACPTPEN_WIDTH 1
7016 #define ALT_CLKMGR_PERPLL_ENR_EMACPTPEN_SET_MSK 0x00000008
7018 #define ALT_CLKMGR_PERPLL_ENR_EMACPTPEN_CLR_MSK 0xfffffff7
7020 #define ALT_CLKMGR_PERPLL_ENR_EMACPTPEN_RESET 0x1
7022 #define ALT_CLKMGR_PERPLL_ENR_EMACPTPEN_GET(value) (((value) & 0x00000008) >> 3)
7024 #define ALT_CLKMGR_PERPLL_ENR_EMACPTPEN_SET(value) (((value) << 3) & 0x00000008)
7035 #define ALT_CLKMGR_PERPLL_ENR_GPIODBEN_LSB 4
7037 #define ALT_CLKMGR_PERPLL_ENR_GPIODBEN_MSB 4
7039 #define ALT_CLKMGR_PERPLL_ENR_GPIODBEN_WIDTH 1
7041 #define ALT_CLKMGR_PERPLL_ENR_GPIODBEN_SET_MSK 0x00000010
7043 #define ALT_CLKMGR_PERPLL_ENR_GPIODBEN_CLR_MSK 0xffffffef
7045 #define ALT_CLKMGR_PERPLL_ENR_GPIODBEN_RESET 0x1
7047 #define ALT_CLKMGR_PERPLL_ENR_GPIODBEN_GET(value) (((value) & 0x00000010) >> 4)
7049 #define ALT_CLKMGR_PERPLL_ENR_GPIODBEN_SET(value) (((value) << 4) & 0x00000010)
7061 #define ALT_CLKMGR_PERPLL_ENR_SDMMCCLKEN_LSB 5
7063 #define ALT_CLKMGR_PERPLL_ENR_SDMMCCLKEN_MSB 5
7065 #define ALT_CLKMGR_PERPLL_ENR_SDMMCCLKEN_WIDTH 1
7067 #define ALT_CLKMGR_PERPLL_ENR_SDMMCCLKEN_SET_MSK 0x00000020
7069 #define ALT_CLKMGR_PERPLL_ENR_SDMMCCLKEN_CLR_MSK 0xffffffdf
7071 #define ALT_CLKMGR_PERPLL_ENR_SDMMCCLKEN_RESET 0x1
7073 #define ALT_CLKMGR_PERPLL_ENR_SDMMCCLKEN_GET(value) (((value) & 0x00000020) >> 5)
7075 #define ALT_CLKMGR_PERPLL_ENR_SDMMCCLKEN_SET(value) (((value) << 5) & 0x00000020)
7086 #define ALT_CLKMGR_PERPLL_ENR_S2FUSER1CLKEN_LSB 6
7088 #define ALT_CLKMGR_PERPLL_ENR_S2FUSER1CLKEN_MSB 6
7090 #define ALT_CLKMGR_PERPLL_ENR_S2FUSER1CLKEN_WIDTH 1
7092 #define ALT_CLKMGR_PERPLL_ENR_S2FUSER1CLKEN_SET_MSK 0x00000040
7094 #define ALT_CLKMGR_PERPLL_ENR_S2FUSER1CLKEN_CLR_MSK 0xffffffbf
7096 #define ALT_CLKMGR_PERPLL_ENR_S2FUSER1CLKEN_RESET 0x1
7098 #define ALT_CLKMGR_PERPLL_ENR_S2FUSER1CLKEN_GET(value) (((value) & 0x00000040) >> 6)
7100 #define ALT_CLKMGR_PERPLL_ENR_S2FUSER1CLKEN_SET(value) (((value) << 6) & 0x00000040)
7112 #define ALT_CLKMGR_PERPLL_ENR_USBCLKEN_LSB 8
7114 #define ALT_CLKMGR_PERPLL_ENR_USBCLKEN_MSB 8
7116 #define ALT_CLKMGR_PERPLL_ENR_USBCLKEN_WIDTH 1
7118 #define ALT_CLKMGR_PERPLL_ENR_USBCLKEN_SET_MSK 0x00000100
7120 #define ALT_CLKMGR_PERPLL_ENR_USBCLKEN_CLR_MSK 0xfffffeff
7122 #define ALT_CLKMGR_PERPLL_ENR_USBCLKEN_RESET 0x1
7124 #define ALT_CLKMGR_PERPLL_ENR_USBCLKEN_GET(value) (((value) & 0x00000100) >> 8)
7126 #define ALT_CLKMGR_PERPLL_ENR_USBCLKEN_SET(value) (((value) << 8) & 0x00000100)
7138 #define ALT_CLKMGR_PERPLL_ENR_SPIMCLKEN_LSB 9
7140 #define ALT_CLKMGR_PERPLL_ENR_SPIMCLKEN_MSB 9
7142 #define ALT_CLKMGR_PERPLL_ENR_SPIMCLKEN_WIDTH 1
7144 #define ALT_CLKMGR_PERPLL_ENR_SPIMCLKEN_SET_MSK 0x00000200
7146 #define ALT_CLKMGR_PERPLL_ENR_SPIMCLKEN_CLR_MSK 0xfffffdff
7148 #define ALT_CLKMGR_PERPLL_ENR_SPIMCLKEN_RESET 0x1
7150 #define ALT_CLKMGR_PERPLL_ENR_SPIMCLKEN_GET(value) (((value) & 0x00000200) >> 9)
7152 #define ALT_CLKMGR_PERPLL_ENR_SPIMCLKEN_SET(value) (((value) << 9) & 0x00000200)
7164 #define ALT_CLKMGR_PERPLL_ENR_NANDCLKEN_LSB 10
7166 #define ALT_CLKMGR_PERPLL_ENR_NANDCLKEN_MSB 10
7168 #define ALT_CLKMGR_PERPLL_ENR_NANDCLKEN_WIDTH 1
7170 #define ALT_CLKMGR_PERPLL_ENR_NANDCLKEN_SET_MSK 0x00000400
7172 #define ALT_CLKMGR_PERPLL_ENR_NANDCLKEN_CLR_MSK 0xfffffbff
7174 #define ALT_CLKMGR_PERPLL_ENR_NANDCLKEN_RESET 0x1
7176 #define ALT_CLKMGR_PERPLL_ENR_NANDCLKEN_GET(value) (((value) & 0x00000400) >> 10)
7178 #define ALT_CLKMGR_PERPLL_ENR_NANDCLKEN_SET(value) (((value) << 10) & 0x00000400)
7190 #define ALT_CLKMGR_PERPLL_ENR_QSPICLKEN_LSB 11
7192 #define ALT_CLKMGR_PERPLL_ENR_QSPICLKEN_MSB 11
7194 #define ALT_CLKMGR_PERPLL_ENR_QSPICLKEN_WIDTH 1
7196 #define ALT_CLKMGR_PERPLL_ENR_QSPICLKEN_SET_MSK 0x00000800
7198 #define ALT_CLKMGR_PERPLL_ENR_QSPICLKEN_CLR_MSK 0xfffff7ff
7200 #define ALT_CLKMGR_PERPLL_ENR_QSPICLKEN_RESET 0x1
7202 #define ALT_CLKMGR_PERPLL_ENR_QSPICLKEN_GET(value) (((value) & 0x00000800) >> 11)
7204 #define ALT_CLKMGR_PERPLL_ENR_QSPICLKEN_SET(value) (((value) << 11) & 0x00000800)
7206 #ifndef __ASSEMBLY__
7217 struct ALT_CLKMGR_PERPLL_ENR_s
7219 uint32_t emac0en : 1;
7220 uint32_t emac1en : 1;
7221 uint32_t emac2en : 1;
7222 uint32_t emacptpen : 1;
7223 uint32_t gpiodben : 1;
7224 uint32_t sdmmcclken : 1;
7225 uint32_t s2fuser1clken : 1;
7227 uint32_t usbclken : 1;
7228 uint32_t spimclken : 1;
7229 uint32_t nandclken : 1;
7230 uint32_t qspiclken : 1;
7235 typedef volatile struct ALT_CLKMGR_PERPLL_ENR_s ALT_CLKMGR_PERPLL_ENR_t;
7239 #define ALT_CLKMGR_PERPLL_ENR_RESET 0x00000f7f
7241 #define ALT_CLKMGR_PERPLL_ENR_OFST 0x10
7277 #define ALT_CLKMGR_PERPLL_BYPASS_EMACA_LSB 0
7279 #define ALT_CLKMGR_PERPLL_BYPASS_EMACA_MSB 0
7281 #define ALT_CLKMGR_PERPLL_BYPASS_EMACA_WIDTH 1
7283 #define ALT_CLKMGR_PERPLL_BYPASS_EMACA_SET_MSK 0x00000001
7285 #define ALT_CLKMGR_PERPLL_BYPASS_EMACA_CLR_MSK 0xfffffffe
7287 #define ALT_CLKMGR_PERPLL_BYPASS_EMACA_RESET 0x1
7289 #define ALT_CLKMGR_PERPLL_BYPASS_EMACA_GET(value) (((value) & 0x00000001) >> 0)
7291 #define ALT_CLKMGR_PERPLL_BYPASS_EMACA_SET(value) (((value) << 0) & 0x00000001)
7303 #define ALT_CLKMGR_PERPLL_BYPASS_EMACB_LSB 1
7305 #define ALT_CLKMGR_PERPLL_BYPASS_EMACB_MSB 1
7307 #define ALT_CLKMGR_PERPLL_BYPASS_EMACB_WIDTH 1
7309 #define ALT_CLKMGR_PERPLL_BYPASS_EMACB_SET_MSK 0x00000002
7311 #define ALT_CLKMGR_PERPLL_BYPASS_EMACB_CLR_MSK 0xfffffffd
7313 #define ALT_CLKMGR_PERPLL_BYPASS_EMACB_RESET 0x1
7315 #define ALT_CLKMGR_PERPLL_BYPASS_EMACB_GET(value) (((value) & 0x00000002) >> 1)
7317 #define ALT_CLKMGR_PERPLL_BYPASS_EMACB_SET(value) (((value) << 1) & 0x00000002)
7329 #define ALT_CLKMGR_PERPLL_BYPASS_EMACPTP_LSB 2
7331 #define ALT_CLKMGR_PERPLL_BYPASS_EMACPTP_MSB 2
7333 #define ALT_CLKMGR_PERPLL_BYPASS_EMACPTP_WIDTH 1
7335 #define ALT_CLKMGR_PERPLL_BYPASS_EMACPTP_SET_MSK 0x00000004
7337 #define ALT_CLKMGR_PERPLL_BYPASS_EMACPTP_CLR_MSK 0xfffffffb
7339 #define ALT_CLKMGR_PERPLL_BYPASS_EMACPTP_RESET 0x1
7341 #define ALT_CLKMGR_PERPLL_BYPASS_EMACPTP_GET(value) (((value) & 0x00000004) >> 2)
7343 #define ALT_CLKMGR_PERPLL_BYPASS_EMACPTP_SET(value) (((value) << 2) & 0x00000004)
7355 #define ALT_CLKMGR_PERPLL_BYPASS_GPIODB_LSB 3
7357 #define ALT_CLKMGR_PERPLL_BYPASS_GPIODB_MSB 3
7359 #define ALT_CLKMGR_PERPLL_BYPASS_GPIODB_WIDTH 1
7361 #define ALT_CLKMGR_PERPLL_BYPASS_GPIODB_SET_MSK 0x00000008
7363 #define ALT_CLKMGR_PERPLL_BYPASS_GPIODB_CLR_MSK 0xfffffff7
7365 #define ALT_CLKMGR_PERPLL_BYPASS_GPIODB_RESET 0x1
7367 #define ALT_CLKMGR_PERPLL_BYPASS_GPIODB_GET(value) (((value) & 0x00000008) >> 3)
7369 #define ALT_CLKMGR_PERPLL_BYPASS_GPIODB_SET(value) (((value) << 3) & 0x00000008)
7381 #define ALT_CLKMGR_PERPLL_BYPASS_SDMMC_LSB 4
7383 #define ALT_CLKMGR_PERPLL_BYPASS_SDMMC_MSB 4
7385 #define ALT_CLKMGR_PERPLL_BYPASS_SDMMC_WIDTH 1
7387 #define ALT_CLKMGR_PERPLL_BYPASS_SDMMC_SET_MSK 0x00000010
7389 #define ALT_CLKMGR_PERPLL_BYPASS_SDMMC_CLR_MSK 0xffffffef
7391 #define ALT_CLKMGR_PERPLL_BYPASS_SDMMC_RESET 0x1
7393 #define ALT_CLKMGR_PERPLL_BYPASS_SDMMC_GET(value) (((value) & 0x00000010) >> 4)
7395 #define ALT_CLKMGR_PERPLL_BYPASS_SDMMC_SET(value) (((value) << 4) & 0x00000010)
7407 #define ALT_CLKMGR_PERPLL_BYPASS_S2FUSER1_LSB 5
7409 #define ALT_CLKMGR_PERPLL_BYPASS_S2FUSER1_MSB 5
7411 #define ALT_CLKMGR_PERPLL_BYPASS_S2FUSER1_WIDTH 1
7413 #define ALT_CLKMGR_PERPLL_BYPASS_S2FUSER1_SET_MSK 0x00000020
7415 #define ALT_CLKMGR_PERPLL_BYPASS_S2FUSER1_CLR_MSK 0xffffffdf
7417 #define ALT_CLKMGR_PERPLL_BYPASS_S2FUSER1_RESET 0x1
7419 #define ALT_CLKMGR_PERPLL_BYPASS_S2FUSER1_GET(value) (((value) & 0x00000020) >> 5)
7421 #define ALT_CLKMGR_PERPLL_BYPASS_S2FUSER1_SET(value) (((value) << 5) & 0x00000020)
7434 #define ALT_CLKMGR_PERPLL_BYPASS_RFEN_LSB 6
7436 #define ALT_CLKMGR_PERPLL_BYPASS_RFEN_MSB 6
7438 #define ALT_CLKMGR_PERPLL_BYPASS_RFEN_WIDTH 1
7440 #define ALT_CLKMGR_PERPLL_BYPASS_RFEN_SET_MSK 0x00000040
7442 #define ALT_CLKMGR_PERPLL_BYPASS_RFEN_CLR_MSK 0xffffffbf
7444 #define ALT_CLKMGR_PERPLL_BYPASS_RFEN_RESET 0x1
7446 #define ALT_CLKMGR_PERPLL_BYPASS_RFEN_GET(value) (((value) & 0x00000040) >> 6)
7448 #define ALT_CLKMGR_PERPLL_BYPASS_RFEN_SET(value) (((value) << 6) & 0x00000040)
7460 #define ALT_CLKMGR_PERPLL_BYPASS_FBEN_LSB 7
7462 #define ALT_CLKMGR_PERPLL_BYPASS_FBEN_MSB 7
7464 #define ALT_CLKMGR_PERPLL_BYPASS_FBEN_WIDTH 1
7466 #define ALT_CLKMGR_PERPLL_BYPASS_FBEN_SET_MSK 0x00000080
7468 #define ALT_CLKMGR_PERPLL_BYPASS_FBEN_CLR_MSK 0xffffff7f
7470 #define ALT_CLKMGR_PERPLL_BYPASS_FBEN_RESET 0x1
7472 #define ALT_CLKMGR_PERPLL_BYPASS_FBEN_GET(value) (((value) & 0x00000080) >> 7)
7474 #define ALT_CLKMGR_PERPLL_BYPASS_FBEN_SET(value) (((value) << 7) & 0x00000080)
7476 #ifndef __ASSEMBLY__
7487 struct ALT_CLKMGR_PERPLL_BYPASS_s
7491 uint32_t emacptp : 1;
7492 uint32_t gpiodb : 1;
7494 uint32_t s2fuser1 : 1;
7501 typedef volatile struct ALT_CLKMGR_PERPLL_BYPASS_s ALT_CLKMGR_PERPLL_BYPASS_t;
7505 #define ALT_CLKMGR_PERPLL_BYPASS_RESET 0x000000ff
7507 #define ALT_CLKMGR_PERPLL_BYPASS_OFST 0x14
7539 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_LSB 0
7541 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_MSB 0
7543 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_WIDTH 1
7545 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_SET_MSK 0x00000001
7547 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_CLR_MSK 0xfffffffe
7549 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_RESET 0x1
7551 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_GET(value) (((value) & 0x00000001) >> 0)
7553 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACA_SET(value) (((value) << 0) & 0x00000001)
7565 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_LSB 1
7567 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_MSB 1
7569 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_WIDTH 1
7571 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_SET_MSK 0x00000002
7573 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_CLR_MSK 0xfffffffd
7575 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_RESET 0x1
7577 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_GET(value) (((value) & 0x00000002) >> 1)
7579 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACB_SET(value) (((value) << 1) & 0x00000002)
7591 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_LSB 2
7593 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_MSB 2
7595 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_WIDTH 1
7597 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_SET_MSK 0x00000004
7599 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_CLR_MSK 0xfffffffb
7601 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_RESET 0x1
7603 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_GET(value) (((value) & 0x00000004) >> 2)
7605 #define ALT_CLKMGR_PERPLL_BYPASSS_EMACPTP_SET(value) (((value) << 2) & 0x00000004)
7617 #define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_LSB 3
7619 #define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_MSB 3
7621 #define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_WIDTH 1
7623 #define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_SET_MSK 0x00000008
7625 #define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_CLR_MSK 0xfffffff7
7627 #define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_RESET 0x1
7629 #define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_GET(value) (((value) & 0x00000008) >> 3)
7631 #define ALT_CLKMGR_PERPLL_BYPASSS_GPIODB_SET(value) (((value) << 3) & 0x00000008)
7643 #define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_LSB 4
7645 #define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_MSB 4
7647 #define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_WIDTH 1
7649 #define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_SET_MSK 0x00000010
7651 #define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_CLR_MSK 0xffffffef
7653 #define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_RESET 0x1
7655 #define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_GET(value) (((value) & 0x00000010) >> 4)
7657 #define ALT_CLKMGR_PERPLL_BYPASSS_SDMMC_SET(value) (((value) << 4) & 0x00000010)
7669 #define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_LSB 5
7671 #define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_MSB 5
7673 #define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_WIDTH 1
7675 #define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_SET_MSK 0x00000020
7677 #define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_CLR_MSK 0xffffffdf
7679 #define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_RESET 0x1
7681 #define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_GET(value) (((value) & 0x00000020) >> 5)
7683 #define ALT_CLKMGR_PERPLL_BYPASSS_S2FUSER1_SET(value) (((value) << 5) & 0x00000020)
7696 #define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_LSB 6
7698 #define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_MSB 6
7700 #define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_WIDTH 1
7702 #define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_SET_MSK 0x00000040
7704 #define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_CLR_MSK 0xffffffbf
7706 #define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_RESET 0x1
7708 #define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_GET(value) (((value) & 0x00000040) >> 6)
7710 #define ALT_CLKMGR_PERPLL_BYPASSS_RFEN_SET(value) (((value) << 6) & 0x00000040)
7722 #define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_LSB 7
7724 #define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_MSB 7
7726 #define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_WIDTH 1
7728 #define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_SET_MSK 0x00000080
7730 #define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_CLR_MSK 0xffffff7f
7732 #define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_RESET 0x1
7734 #define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_GET(value) (((value) & 0x00000080) >> 7)
7736 #define ALT_CLKMGR_PERPLL_BYPASSS_FBEN_SET(value) (((value) << 7) & 0x00000080)
7738 #ifndef __ASSEMBLY__
7749 struct ALT_CLKMGR_PERPLL_BYPASSS_s
7753 uint32_t emacptp : 1;
7754 uint32_t gpiodb : 1;
7756 uint32_t s2fuser1 : 1;
7763 typedef volatile struct ALT_CLKMGR_PERPLL_BYPASSS_s ALT_CLKMGR_PERPLL_BYPASSS_t;
7767 #define ALT_CLKMGR_PERPLL_BYPASSS_RESET 0x000000ff
7769 #define ALT_CLKMGR_PERPLL_BYPASSS_OFST 0x18
7801 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACA_LSB 0
7803 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACA_MSB 0
7805 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACA_WIDTH 1
7807 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACA_SET_MSK 0x00000001
7809 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACA_CLR_MSK 0xfffffffe
7811 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACA_RESET 0x1
7813 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACA_GET(value) (((value) & 0x00000001) >> 0)
7815 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACA_SET(value) (((value) << 0) & 0x00000001)
7827 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACB_LSB 1
7829 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACB_MSB 1
7831 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACB_WIDTH 1
7833 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACB_SET_MSK 0x00000002
7835 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACB_CLR_MSK 0xfffffffd
7837 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACB_RESET 0x1
7839 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACB_GET(value) (((value) & 0x00000002) >> 1)
7841 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACB_SET(value) (((value) << 1) & 0x00000002)
7853 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACPTP_LSB 2
7855 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACPTP_MSB 2
7857 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACPTP_WIDTH 1
7859 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACPTP_SET_MSK 0x00000004
7861 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACPTP_CLR_MSK 0xfffffffb
7863 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACPTP_RESET 0x1
7865 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACPTP_GET(value) (((value) & 0x00000004) >> 2)
7867 #define ALT_CLKMGR_PERPLL_BYPASSR_EMACPTP_SET(value) (((value) << 2) & 0x00000004)
7879 #define ALT_CLKMGR_PERPLL_BYPASSR_GPIODB_LSB 3
7881 #define ALT_CLKMGR_PERPLL_BYPASSR_GPIODB_MSB 3
7883 #define ALT_CLKMGR_PERPLL_BYPASSR_GPIODB_WIDTH 1
7885 #define ALT_CLKMGR_PERPLL_BYPASSR_GPIODB_SET_MSK 0x00000008
7887 #define ALT_CLKMGR_PERPLL_BYPASSR_GPIODB_CLR_MSK 0xfffffff7
7889 #define ALT_CLKMGR_PERPLL_BYPASSR_GPIODB_RESET 0x1
7891 #define ALT_CLKMGR_PERPLL_BYPASSR_GPIODB_GET(value) (((value) & 0x00000008) >> 3)
7893 #define ALT_CLKMGR_PERPLL_BYPASSR_GPIODB_SET(value) (((value) << 3) & 0x00000008)
7905 #define ALT_CLKMGR_PERPLL_BYPASSR_SDMMC_LSB 4
7907 #define ALT_CLKMGR_PERPLL_BYPASSR_SDMMC_MSB 4
7909 #define ALT_CLKMGR_PERPLL_BYPASSR_SDMMC_WIDTH 1
7911 #define ALT_CLKMGR_PERPLL_BYPASSR_SDMMC_SET_MSK 0x00000010
7913 #define ALT_CLKMGR_PERPLL_BYPASSR_SDMMC_CLR_MSK 0xffffffef
7915 #define ALT_CLKMGR_PERPLL_BYPASSR_SDMMC_RESET 0x1
7917 #define ALT_CLKMGR_PERPLL_BYPASSR_SDMMC_GET(value) (((value) & 0x00000010) >> 4)
7919 #define ALT_CLKMGR_PERPLL_BYPASSR_SDMMC_SET(value) (((value) << 4) & 0x00000010)
7931 #define ALT_CLKMGR_PERPLL_BYPASSR_S2FUSER1_LSB 5
7933 #define ALT_CLKMGR_PERPLL_BYPASSR_S2FUSER1_MSB 5
7935 #define ALT_CLKMGR_PERPLL_BYPASSR_S2FUSER1_WIDTH 1
7937 #define ALT_CLKMGR_PERPLL_BYPASSR_S2FUSER1_SET_MSK 0x00000020
7939 #define ALT_CLKMGR_PERPLL_BYPASSR_S2FUSER1_CLR_MSK 0xffffffdf
7941 #define ALT_CLKMGR_PERPLL_BYPASSR_S2FUSER1_RESET 0x1
7943 #define ALT_CLKMGR_PERPLL_BYPASSR_S2FUSER1_GET(value) (((value) & 0x00000020) >> 5)
7945 #define ALT_CLKMGR_PERPLL_BYPASSR_S2FUSER1_SET(value) (((value) << 5) & 0x00000020)
7958 #define ALT_CLKMGR_PERPLL_BYPASSR_RFEN_LSB 6
7960 #define ALT_CLKMGR_PERPLL_BYPASSR_RFEN_MSB 6
7962 #define ALT_CLKMGR_PERPLL_BYPASSR_RFEN_WIDTH 1
7964 #define ALT_CLKMGR_PERPLL_BYPASSR_RFEN_SET_MSK 0x00000040
7966 #define ALT_CLKMGR_PERPLL_BYPASSR_RFEN_CLR_MSK 0xffffffbf
7968 #define ALT_CLKMGR_PERPLL_BYPASSR_RFEN_RESET 0x1
7970 #define ALT_CLKMGR_PERPLL_BYPASSR_RFEN_GET(value) (((value) & 0x00000040) >> 6)
7972 #define ALT_CLKMGR_PERPLL_BYPASSR_RFEN_SET(value) (((value) << 6) & 0x00000040)
7984 #define ALT_CLKMGR_PERPLL_BYPASSR_FBEN_LSB 7
7986 #define ALT_CLKMGR_PERPLL_BYPASSR_FBEN_MSB 7
7988 #define ALT_CLKMGR_PERPLL_BYPASSR_FBEN_WIDTH 1
7990 #define ALT_CLKMGR_PERPLL_BYPASSR_FBEN_SET_MSK 0x00000080
7992 #define ALT_CLKMGR_PERPLL_BYPASSR_FBEN_CLR_MSK 0xffffff7f
7994 #define ALT_CLKMGR_PERPLL_BYPASSR_FBEN_RESET 0x1
7996 #define ALT_CLKMGR_PERPLL_BYPASSR_FBEN_GET(value) (((value) & 0x00000080) >> 7)
7998 #define ALT_CLKMGR_PERPLL_BYPASSR_FBEN_SET(value) (((value) << 7) & 0x00000080)
8000 #ifndef __ASSEMBLY__
8011 struct ALT_CLKMGR_PERPLL_BYPASSR_s
8015 uint32_t emacptp : 1;
8016 uint32_t gpiodb : 1;
8018 uint32_t s2fuser1 : 1;
8025 typedef volatile struct ALT_CLKMGR_PERPLL_BYPASSR_s ALT_CLKMGR_PERPLL_BYPASSR_t;
8029 #define ALT_CLKMGR_PERPLL_BYPASSR_RESET 0x000000ff
8031 #define ALT_CLKMGR_PERPLL_BYPASSR_OFST 0x1c
8058 #define ALT_CLKMGR_PERPLL_CNTR2CLK_CNT_LSB 0
8060 #define ALT_CLKMGR_PERPLL_CNTR2CLK_CNT_MSB 10
8062 #define ALT_CLKMGR_PERPLL_CNTR2CLK_CNT_WIDTH 11
8064 #define ALT_CLKMGR_PERPLL_CNTR2CLK_CNT_SET_MSK 0x000007ff
8066 #define ALT_CLKMGR_PERPLL_CNTR2CLK_CNT_CLR_MSK 0xfffff800
8068 #define ALT_CLKMGR_PERPLL_CNTR2CLK_CNT_RESET 0x0
8070 #define ALT_CLKMGR_PERPLL_CNTR2CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
8072 #define ALT_CLKMGR_PERPLL_CNTR2CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
8097 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_E_MAIN 0x0
8102 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_E_PERI 0x1
8107 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_E_OSC1 0x2
8112 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_E_INTOSC 0x3
8117 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_E_FPGA 0x4
8120 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_LSB 16
8122 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_MSB 18
8124 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_WIDTH 3
8126 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_SET_MSK 0x00070000
8128 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_CLR_MSK 0xfff8ffff
8130 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_RESET 0x0
8132 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
8134 #define ALT_CLKMGR_PERPLL_CNTR2CLK_SRC_SET(value) (((value) << 16) & 0x00070000)
8136 #ifndef __ASSEMBLY__
8147 struct ALT_CLKMGR_PERPLL_CNTR2CLK_s
8156 typedef volatile struct ALT_CLKMGR_PERPLL_CNTR2CLK_s ALT_CLKMGR_PERPLL_CNTR2CLK_t;
8160 #define ALT_CLKMGR_PERPLL_CNTR2CLK_RESET 0x00000000
8162 #define ALT_CLKMGR_PERPLL_CNTR2CLK_OFST 0x28
8189 #define ALT_CLKMGR_PERPLL_CNTR3CLK_CNT_LSB 0
8191 #define ALT_CLKMGR_PERPLL_CNTR3CLK_CNT_MSB 10
8193 #define ALT_CLKMGR_PERPLL_CNTR3CLK_CNT_WIDTH 11
8195 #define ALT_CLKMGR_PERPLL_CNTR3CLK_CNT_SET_MSK 0x000007ff
8197 #define ALT_CLKMGR_PERPLL_CNTR3CLK_CNT_CLR_MSK 0xfffff800
8199 #define ALT_CLKMGR_PERPLL_CNTR3CLK_CNT_RESET 0x0
8201 #define ALT_CLKMGR_PERPLL_CNTR3CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
8203 #define ALT_CLKMGR_PERPLL_CNTR3CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
8228 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_E_MAIN 0x0
8233 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_E_PERI 0x1
8238 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_E_OSC1 0x2
8243 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_E_INTOSC 0x3
8248 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_E_FPGA 0x4
8251 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_LSB 16
8253 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_MSB 18
8255 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_WIDTH 3
8257 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_SET_MSK 0x00070000
8259 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_CLR_MSK 0xfff8ffff
8261 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_RESET 0x0
8263 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
8265 #define ALT_CLKMGR_PERPLL_CNTR3CLK_SRC_SET(value) (((value) << 16) & 0x00070000)
8267 #ifndef __ASSEMBLY__
8278 struct ALT_CLKMGR_PERPLL_CNTR3CLK_s
8287 typedef volatile struct ALT_CLKMGR_PERPLL_CNTR3CLK_s ALT_CLKMGR_PERPLL_CNTR3CLK_t;
8291 #define ALT_CLKMGR_PERPLL_CNTR3CLK_RESET 0x00000000
8293 #define ALT_CLKMGR_PERPLL_CNTR3CLK_OFST 0x2c
8320 #define ALT_CLKMGR_PERPLL_CNTR4CLK_CNT_LSB 0
8322 #define ALT_CLKMGR_PERPLL_CNTR4CLK_CNT_MSB 10
8324 #define ALT_CLKMGR_PERPLL_CNTR4CLK_CNT_WIDTH 11
8326 #define ALT_CLKMGR_PERPLL_CNTR4CLK_CNT_SET_MSK 0x000007ff
8328 #define ALT_CLKMGR_PERPLL_CNTR4CLK_CNT_CLR_MSK 0xfffff800
8330 #define ALT_CLKMGR_PERPLL_CNTR4CLK_CNT_RESET 0x0
8332 #define ALT_CLKMGR_PERPLL_CNTR4CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
8334 #define ALT_CLKMGR_PERPLL_CNTR4CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
8359 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_E_MAIN 0x0
8364 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_E_PERI 0x1
8369 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_E_OSC1 0x2
8374 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_E_INTOSC 0x3
8379 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_E_FPGA 0x4
8382 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_LSB 16
8384 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_MSB 18
8386 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_WIDTH 3
8388 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_SET_MSK 0x00070000
8390 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_CLR_MSK 0xfff8ffff
8392 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_RESET 0x0
8394 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
8396 #define ALT_CLKMGR_PERPLL_CNTR4CLK_SRC_SET(value) (((value) << 16) & 0x00070000)
8398 #ifndef __ASSEMBLY__
8409 struct ALT_CLKMGR_PERPLL_CNTR4CLK_s
8418 typedef volatile struct ALT_CLKMGR_PERPLL_CNTR4CLK_s ALT_CLKMGR_PERPLL_CNTR4CLK_t;
8422 #define ALT_CLKMGR_PERPLL_CNTR4CLK_RESET 0x00000000
8424 #define ALT_CLKMGR_PERPLL_CNTR4CLK_OFST 0x30
8451 #define ALT_CLKMGR_PERPLL_CNTR5CLK_CNT_LSB 0
8453 #define ALT_CLKMGR_PERPLL_CNTR5CLK_CNT_MSB 10
8455 #define ALT_CLKMGR_PERPLL_CNTR5CLK_CNT_WIDTH 11
8457 #define ALT_CLKMGR_PERPLL_CNTR5CLK_CNT_SET_MSK 0x000007ff
8459 #define ALT_CLKMGR_PERPLL_CNTR5CLK_CNT_CLR_MSK 0xfffff800
8461 #define ALT_CLKMGR_PERPLL_CNTR5CLK_CNT_RESET 0x0
8463 #define ALT_CLKMGR_PERPLL_CNTR5CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
8465 #define ALT_CLKMGR_PERPLL_CNTR5CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
8490 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_E_MAIN 0x0
8495 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_E_PERI 0x1
8500 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_E_OSC1 0x2
8505 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_E_INTOSC 0x3
8510 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_E_FPGA 0x4
8513 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_LSB 16
8515 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_MSB 18
8517 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_WIDTH 3
8519 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_SET_MSK 0x00070000
8521 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_CLR_MSK 0xfff8ffff
8523 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_RESET 0x0
8525 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
8527 #define ALT_CLKMGR_PERPLL_CNTR5CLK_SRC_SET(value) (((value) << 16) & 0x00070000)
8529 #ifndef __ASSEMBLY__
8540 struct ALT_CLKMGR_PERPLL_CNTR5CLK_s
8549 typedef volatile struct ALT_CLKMGR_PERPLL_CNTR5CLK_s ALT_CLKMGR_PERPLL_CNTR5CLK_t;
8553 #define ALT_CLKMGR_PERPLL_CNTR5CLK_RESET 0x00000000
8555 #define ALT_CLKMGR_PERPLL_CNTR5CLK_OFST 0x34
8582 #define ALT_CLKMGR_PERPLL_CNTR6CLK_CNT_LSB 0
8584 #define ALT_CLKMGR_PERPLL_CNTR6CLK_CNT_MSB 10
8586 #define ALT_CLKMGR_PERPLL_CNTR6CLK_CNT_WIDTH 11
8588 #define ALT_CLKMGR_PERPLL_CNTR6CLK_CNT_SET_MSK 0x000007ff
8590 #define ALT_CLKMGR_PERPLL_CNTR6CLK_CNT_CLR_MSK 0xfffff800
8592 #define ALT_CLKMGR_PERPLL_CNTR6CLK_CNT_RESET 0x0
8594 #define ALT_CLKMGR_PERPLL_CNTR6CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
8596 #define ALT_CLKMGR_PERPLL_CNTR6CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
8621 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_E_MAIN 0x0
8626 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_E_PERI 0x1
8631 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_E_OSC1 0x2
8636 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_E_INTOSC 0x3
8641 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_E_FPGA 0x4
8644 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_LSB 16
8646 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_MSB 18
8648 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_WIDTH 3
8650 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_SET_MSK 0x00070000
8652 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_CLR_MSK 0xfff8ffff
8654 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_RESET 0x0
8656 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
8658 #define ALT_CLKMGR_PERPLL_CNTR6CLK_SRC_SET(value) (((value) << 16) & 0x00070000)
8660 #ifndef __ASSEMBLY__
8671 struct ALT_CLKMGR_PERPLL_CNTR6CLK_s
8680 typedef volatile struct ALT_CLKMGR_PERPLL_CNTR6CLK_s ALT_CLKMGR_PERPLL_CNTR6CLK_t;
8684 #define ALT_CLKMGR_PERPLL_CNTR6CLK_RESET 0x00000000
8686 #define ALT_CLKMGR_PERPLL_CNTR6CLK_OFST 0x38
8711 #define ALT_CLKMGR_PERPLL_CNTR7CLK_CNT_LSB 0
8713 #define ALT_CLKMGR_PERPLL_CNTR7CLK_CNT_MSB 10
8715 #define ALT_CLKMGR_PERPLL_CNTR7CLK_CNT_WIDTH 11
8717 #define ALT_CLKMGR_PERPLL_CNTR7CLK_CNT_SET_MSK 0x000007ff
8719 #define ALT_CLKMGR_PERPLL_CNTR7CLK_CNT_CLR_MSK 0xfffff800
8721 #define ALT_CLKMGR_PERPLL_CNTR7CLK_CNT_RESET 0x0
8723 #define ALT_CLKMGR_PERPLL_CNTR7CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
8725 #define ALT_CLKMGR_PERPLL_CNTR7CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
8727 #ifndef __ASSEMBLY__
8738 struct ALT_CLKMGR_PERPLL_CNTR7CLK_s
8745 typedef volatile struct ALT_CLKMGR_PERPLL_CNTR7CLK_s ALT_CLKMGR_PERPLL_CNTR7CLK_t;
8749 #define ALT_CLKMGR_PERPLL_CNTR7CLK_RESET 0x00000000
8751 #define ALT_CLKMGR_PERPLL_CNTR7CLK_OFST 0x3c
8778 #define ALT_CLKMGR_PERPLL_CNTR8CLK_CNT_LSB 0
8780 #define ALT_CLKMGR_PERPLL_CNTR8CLK_CNT_MSB 10
8782 #define ALT_CLKMGR_PERPLL_CNTR8CLK_CNT_WIDTH 11
8784 #define ALT_CLKMGR_PERPLL_CNTR8CLK_CNT_SET_MSK 0x000007ff
8786 #define ALT_CLKMGR_PERPLL_CNTR8CLK_CNT_CLR_MSK 0xfffff800
8788 #define ALT_CLKMGR_PERPLL_CNTR8CLK_CNT_RESET 0x0
8790 #define ALT_CLKMGR_PERPLL_CNTR8CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
8792 #define ALT_CLKMGR_PERPLL_CNTR8CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
8817 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_E_MAIN 0x0
8822 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_E_PERI 0x1
8827 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_E_OSC1 0x2
8832 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_E_INTOSC 0x3
8837 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_E_FPGA 0x4
8840 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_LSB 16
8842 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_MSB 18
8844 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_WIDTH 3
8846 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_SET_MSK 0x00070000
8848 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_CLR_MSK 0xfff8ffff
8850 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_RESET 0x0
8852 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_GET(value) (((value) & 0x00070000) >> 16)
8854 #define ALT_CLKMGR_PERPLL_CNTR8CLK_SRC_SET(value) (((value) << 16) & 0x00070000)
8856 #ifndef __ASSEMBLY__
8867 struct ALT_CLKMGR_PERPLL_CNTR8CLK_s
8876 typedef volatile struct ALT_CLKMGR_PERPLL_CNTR8CLK_s ALT_CLKMGR_PERPLL_CNTR8CLK_t;
8880 #define ALT_CLKMGR_PERPLL_CNTR8CLK_RESET 0x00000000
8882 #define ALT_CLKMGR_PERPLL_CNTR8CLK_OFST 0x40
8907 #define ALT_CLKMGR_PERPLL_CNTR9CLK_CNT_LSB 0
8909 #define ALT_CLKMGR_PERPLL_CNTR9CLK_CNT_MSB 10
8911 #define ALT_CLKMGR_PERPLL_CNTR9CLK_CNT_WIDTH 11
8913 #define ALT_CLKMGR_PERPLL_CNTR9CLK_CNT_SET_MSK 0x000007ff
8915 #define ALT_CLKMGR_PERPLL_CNTR9CLK_CNT_CLR_MSK 0xfffff800
8917 #define ALT_CLKMGR_PERPLL_CNTR9CLK_CNT_RESET 0x0
8919 #define ALT_CLKMGR_PERPLL_CNTR9CLK_CNT_GET(value) (((value) & 0x000007ff) >> 0)
8921 #define ALT_CLKMGR_PERPLL_CNTR9CLK_CNT_SET(value) (((value) << 0) & 0x000007ff)
8923 #ifndef __ASSEMBLY__
8934 struct ALT_CLKMGR_PERPLL_CNTR9CLK_s
8941 typedef volatile struct ALT_CLKMGR_PERPLL_CNTR9CLK_s ALT_CLKMGR_PERPLL_CNTR9CLK_t;
8945 #define ALT_CLKMGR_PERPLL_CNTR9CLK_RESET 0x00000000
8947 #define ALT_CLKMGR_PERPLL_CNTR9CLK_OFST 0x44
8987 #define ALT_CLKMGR_PERPLL_OUTRST_OUTRST_LSB 0
8989 #define ALT_CLKMGR_PERPLL_OUTRST_OUTRST_MSB 15
8991 #define ALT_CLKMGR_PERPLL_OUTRST_OUTRST_WIDTH 16
8993 #define ALT_CLKMGR_PERPLL_OUTRST_OUTRST_SET_MSK 0x0000ffff
8995 #define ALT_CLKMGR_PERPLL_OUTRST_OUTRST_CLR_MSK 0xffff0000
8997 #define ALT_CLKMGR_PERPLL_OUTRST_OUTRST_RESET 0x0
8999 #define ALT_CLKMGR_PERPLL_OUTRST_OUTRST_GET(value) (((value) & 0x0000ffff) >> 0)
9001 #define ALT_CLKMGR_PERPLL_OUTRST_OUTRST_SET(value) (((value) << 0) & 0x0000ffff)
9003 #ifndef __ASSEMBLY__
9014 struct ALT_CLKMGR_PERPLL_OUTRST_s
9016 uint32_t outreset : 16;
9021 typedef volatile struct ALT_CLKMGR_PERPLL_OUTRST_s ALT_CLKMGR_PERPLL_OUTRST_t;
9025 #define ALT_CLKMGR_PERPLL_OUTRST_RESET 0x00000000
9027 #define ALT_CLKMGR_PERPLL_OUTRST_OFST 0x60
9074 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_E_IDLE 0x0
9080 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_E_ACK_RXD 0x1
9083 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_LSB 0
9085 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_MSB 15
9087 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_WIDTH 16
9089 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_SET_MSK 0x0000ffff
9091 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_CLR_MSK 0xffff0000
9093 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_RESET 0x0
9095 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_GET(value) (((value) & 0x0000ffff) >> 0)
9097 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OUTRSTACK_SET(value) (((value) << 0) & 0x0000ffff)
9099 #ifndef __ASSEMBLY__
9110 struct ALT_CLKMGR_PERPLL_OUTRSTSTAT_s
9112 const uint32_t outresetack : 16;
9117 typedef volatile struct ALT_CLKMGR_PERPLL_OUTRSTSTAT_s ALT_CLKMGR_PERPLL_OUTRSTSTAT_t;
9121 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_RESET 0x00000000
9123 #define ALT_CLKMGR_PERPLL_OUTRSTSTAT_OFST 0x64
9162 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_E_EMACA 0x0
9168 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_E_EMACB 0x1
9171 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_LSB 26
9173 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_MSB 26
9175 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_WIDTH 1
9177 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_SET_MSK 0x04000000
9179 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_CLR_MSK 0xfbffffff
9181 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_RESET 0x0
9183 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_GET(value) (((value) & 0x04000000) >> 26)
9185 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC0SEL_SET(value) (((value) << 26) & 0x04000000)
9207 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_E_EMACA 0x0
9213 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_E_EMACB 0x1
9216 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_LSB 27
9218 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_MSB 27
9220 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_WIDTH 1
9222 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_SET_MSK 0x08000000
9224 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_CLR_MSK 0xf7ffffff
9226 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_RESET 0x0
9228 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_GET(value) (((value) & 0x08000000) >> 27)
9230 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC1SEL_SET(value) (((value) << 27) & 0x08000000)
9252 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_E_EMACA 0x0
9258 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_E_EMACB 0x1
9261 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_LSB 28
9263 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_MSB 28
9265 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_WIDTH 1
9267 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_SET_MSK 0x10000000
9269 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_CLR_MSK 0xefffffff
9271 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_RESET 0x0
9273 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_GET(value) (((value) & 0x10000000) >> 28)
9275 #define ALT_CLKMGR_PERPLL_EMACCTL_EMAC2SEL_SET(value) (((value) << 28) & 0x10000000)
9277 #ifndef __ASSEMBLY__
9288 struct ALT_CLKMGR_PERPLL_EMACCTL_s
9291 uint32_t emac0sel : 1;
9292 uint32_t emac1sel : 1;
9293 uint32_t emac2sel : 1;
9298 typedef volatile struct ALT_CLKMGR_PERPLL_EMACCTL_s ALT_CLKMGR_PERPLL_EMACCTL_t;
9302 #define ALT_CLKMGR_PERPLL_EMACCTL_RESET 0x00000000
9304 #define ALT_CLKMGR_PERPLL_EMACCTL_OFST 0x68
9330 #define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_LSB 0
9332 #define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_MSB 15
9334 #define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_WIDTH 16
9336 #define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET_MSK 0x0000ffff
9338 #define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_CLR_MSK 0xffff0000
9340 #define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_RESET 0x1
9342 #define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_GET(value) (((value) & 0x0000ffff) >> 0)
9344 #define ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET(value) (((value) << 0) & 0x0000ffff)
9346 #ifndef __ASSEMBLY__
9357 struct ALT_CLKMGR_PERPLL_GPIODIV_s
9359 uint32_t gpiodbclk : 16;
9364 typedef volatile struct ALT_CLKMGR_PERPLL_GPIODIV_s ALT_CLKMGR_PERPLL_GPIODIV_t;
9368 #define ALT_CLKMGR_PERPLL_GPIODIV_RESET 0x00000001
9370 #define ALT_CLKMGR_PERPLL_GPIODIV_OFST 0x6c
9372 #ifndef __ASSEMBLY__
9383 struct ALT_CLKMGR_PERPLL_s
9385 ALT_CLKMGR_PERPLL_VCO0_t vco0;
9386 ALT_CLKMGR_PERPLL_VCO1_t vco1;
9387 ALT_CLKMGR_PERPLL_EN_t en;
9388 ALT_CLKMGR_PERPLL_ENS_t ens;
9389 ALT_CLKMGR_PERPLL_ENR_t enr;
9390 ALT_CLKMGR_PERPLL_BYPASS_t bypass;
9391 ALT_CLKMGR_PERPLL_BYPASSS_t bypasss;
9392 ALT_CLKMGR_PERPLL_BYPASSR_t bypassr;
9393 volatile uint32_t _pad_0x20_0x27[2];
9394 ALT_CLKMGR_PERPLL_CNTR2CLK_t cntr2clk;
9395 ALT_CLKMGR_PERPLL_CNTR3CLK_t cntr3clk;
9396 ALT_CLKMGR_PERPLL_CNTR4CLK_t cntr4clk;
9397 ALT_CLKMGR_PERPLL_CNTR5CLK_t cntr5clk;
9398 ALT_CLKMGR_PERPLL_CNTR6CLK_t cntr6clk;
9399 ALT_CLKMGR_PERPLL_CNTR7CLK_t cntr7clk;
9400 ALT_CLKMGR_PERPLL_CNTR8CLK_t cntr8clk;
9401 ALT_CLKMGR_PERPLL_CNTR9CLK_t cntr9clk;
9402 volatile uint32_t _pad_0x48_0x5f[6];
9403 ALT_CLKMGR_PERPLL_OUTRST_t outrst;
9404 ALT_CLKMGR_PERPLL_OUTRSTSTAT_t outrststat;
9405 ALT_CLKMGR_PERPLL_EMACCTL_t emacctl;
9406 ALT_CLKMGR_PERPLL_GPIODIV_t gpiodiv;
9407 volatile uint32_t _pad_0x70_0x80[4];
9411 typedef volatile struct ALT_CLKMGR_PERPLL_s ALT_CLKMGR_PERPLL_t;
9413 struct ALT_CLKMGR_PERPLL_raw_s
9415 volatile uint32_t vco0;
9416 volatile uint32_t vco1;
9417 volatile uint32_t en;
9418 volatile uint32_t ens;
9419 volatile uint32_t enr;
9420 volatile uint32_t bypass;
9421 volatile uint32_t bypasss;
9422 volatile uint32_t bypassr;
9423 uint32_t _pad_0x20_0x27[2];
9424 volatile uint32_t cntr2clk;
9425 volatile uint32_t cntr3clk;
9426 volatile uint32_t cntr4clk;
9427 volatile uint32_t cntr5clk;
9428 volatile uint32_t cntr6clk;
9429 volatile uint32_t cntr7clk;
9430 volatile uint32_t cntr8clk;
9431 volatile uint32_t cntr9clk;
9432 uint32_t _pad_0x48_0x5f[6];
9433 volatile uint32_t outrst;
9434 volatile uint32_t outrststat;
9435 volatile uint32_t emacctl;
9436 volatile uint32_t gpiodiv;
9437 uint32_t _pad_0x70_0x80[4];
9441 typedef volatile struct ALT_CLKMGR_PERPLL_raw_s ALT_CLKMGR_PERPLL_raw_t;
9476 #define ALT_CLKMGR_NOCCLK_MAINCNT_LSB 0
9478 #define ALT_CLKMGR_NOCCLK_MAINCNT_MSB 10
9480 #define ALT_CLKMGR_NOCCLK_MAINCNT_WIDTH 11
9482 #define ALT_CLKMGR_NOCCLK_MAINCNT_SET_MSK 0x000007ff
9484 #define ALT_CLKMGR_NOCCLK_MAINCNT_CLR_MSK 0xfffff800
9486 #define ALT_CLKMGR_NOCCLK_MAINCNT_RESET 0x3
9488 #define ALT_CLKMGR_NOCCLK_MAINCNT_GET(value) (((value) & 0x000007ff) >> 0)
9490 #define ALT_CLKMGR_NOCCLK_MAINCNT_SET(value) (((value) << 0) & 0x000007ff)
9503 #define ALT_CLKMGR_NOCCLK_PERICNT_LSB 16
9505 #define ALT_CLKMGR_NOCCLK_PERICNT_MSB 26
9507 #define ALT_CLKMGR_NOCCLK_PERICNT_WIDTH 11
9509 #define ALT_CLKMGR_NOCCLK_PERICNT_SET_MSK 0x07ff0000
9511 #define ALT_CLKMGR_NOCCLK_PERICNT_CLR_MSK 0xf800ffff
9513 #define ALT_CLKMGR_NOCCLK_PERICNT_RESET 0x3
9515 #define ALT_CLKMGR_NOCCLK_PERICNT_GET(value) (((value) & 0x07ff0000) >> 16)
9517 #define ALT_CLKMGR_NOCCLK_PERICNT_SET(value) (((value) << 16) & 0x07ff0000)
9519 #ifndef __ASSEMBLY__
9530 struct ALT_CLKMGR_NOCCLK_s
9532 uint32_t maincnt : 11;
9534 uint32_t pericnt : 11;
9539 typedef volatile struct ALT_CLKMGR_NOCCLK_s ALT_CLKMGR_NOCCLK_t;
9543 #define ALT_CLKMGR_NOCCLK_RESET 0x00030003
9545 #define ALT_CLKMGR_NOCCLK_OFST 0x4
9547 #ifndef __ASSEMBLY__
9558 struct ALT_CLKMGR_ALTERA_s
9560 volatile uint32_t _pad_0x0_0x3;
9561 ALT_CLKMGR_NOCCLK_t nocclk;
9562 volatile uint32_t _pad_0x8_0x40[14];
9566 typedef volatile struct ALT_CLKMGR_ALTERA_s ALT_CLKMGR_ALTERA_t;
9568 struct ALT_CLKMGR_ALTERA_raw_s
9570 uint32_t _pad_0x0_0x3;
9571 volatile uint32_t nocclk;
9572 uint32_t _pad_0x8_0x40[14];
9576 typedef volatile struct ALT_CLKMGR_ALTERA_raw_s ALT_CLKMGR_ALTERA_raw_t;