35 #ifndef __ALT_SOCAL_NOC_MPU_PRB_H__
36 #define __ALT_SOCAL_NOC_MPU_PRB_H__
72 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_TYPEID_LSB 0
74 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_TYPEID_MSB 7
76 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_TYPEID_WIDTH 8
78 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_TYPEID_SET_MSK 0x000000ff
80 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_TYPEID_CLR_MSK 0xffffff00
82 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_TYPEID_RESET 0x6
84 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0)
86 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff)
97 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_CHECKSUM_LSB 8
99 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_CHECKSUM_MSB 31
101 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_CHECKSUM_WIDTH 24
103 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_CHECKSUM_SET_MSK 0xffffff00
105 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_CHECKSUM_CLR_MSK 0x000000ff
107 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_CHECKSUM_RESET 0x567d6
109 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
111 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
124 struct ALT_NOC_MPU_PRB_H2F_MAIN_COREID_s
126 const uint32_t CORETYPEID : 8;
127 const uint32_t CORECHECKSUM : 24;
131 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_COREID_s ALT_NOC_MPU_PRB_H2F_MAIN_COREID_t;
135 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_RESET 0x0567d606
137 #define ALT_NOC_MPU_PRB_H2F_MAIN_COREID_OFST 0x0
159 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_UID_LSB 0
161 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_UID_MSB 7
163 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_UID_WIDTH 8
165 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_UID_SET_MSK 0x000000ff
167 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_UID_CLR_MSK 0xffffff00
169 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_UID_RESET 0x0
171 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_UID_GET(value) (((value) & 0x000000ff) >> 0)
173 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_UID_SET(value) (((value) << 0) & 0x000000ff)
185 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_FLEXNOCID_LSB 8
187 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_FLEXNOCID_MSB 31
189 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_FLEXNOCID_WIDTH 24
191 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_FLEXNOCID_SET_MSK 0xffffff00
193 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_FLEXNOCID_CLR_MSK 0x000000ff
195 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_FLEXNOCID_RESET 0x129ff
197 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
199 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
212 struct ALT_NOC_MPU_PRB_H2F_MAIN_REVID_s
214 const uint32_t USERID : 8;
215 const uint32_t FLEXNOCID : 24;
219 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_REVID_s ALT_NOC_MPU_PRB_H2F_MAIN_REVID_t;
223 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_RESET 0x0129ff00
225 #define ALT_NOC_MPU_PRB_H2F_MAIN_REVID_OFST 0x4
259 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ERREN_LSB 0
261 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ERREN_MSB 0
263 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ERREN_WIDTH 1
265 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ERREN_SET_MSK 0x00000001
267 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ERREN_CLR_MSK 0xfffffffe
269 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ERREN_RESET 0x0
271 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ERREN_GET(value) (((value) & 0x00000001) >> 0)
273 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ERREN_SET(value) (((value) << 0) & 0x00000001)
285 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_TRACEEN_LSB 1
287 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_TRACEEN_MSB 1
289 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_TRACEEN_WIDTH 1
291 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_TRACEEN_SET_MSK 0x00000002
293 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_TRACEEN_CLR_MSK 0xfffffffd
295 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_TRACEEN_RESET 0x0
297 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_TRACEEN_GET(value) (((value) & 0x00000002) >> 1)
299 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_TRACEEN_SET(value) (((value) << 1) & 0x00000002)
311 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_PAYLDEN_LSB 2
313 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_PAYLDEN_MSB 2
315 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_PAYLDEN_WIDTH 1
317 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_PAYLDEN_SET_MSK 0x00000004
319 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_PAYLDEN_CLR_MSK 0xfffffffb
321 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_PAYLDEN_RESET 0x0
323 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_PAYLDEN_GET(value) (((value) & 0x00000004) >> 2)
325 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_PAYLDEN_SET(value) (((value) << 2) & 0x00000004)
339 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATEN_LSB 3
341 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATEN_MSB 3
343 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATEN_WIDTH 1
345 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATEN_SET_MSK 0x00000008
347 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATEN_CLR_MSK 0xfffffff7
349 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATEN_RESET 0x0
351 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATEN_GET(value) (((value) & 0x00000008) >> 3)
353 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATEN_SET(value) (((value) << 3) & 0x00000008)
366 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ALARMEN_LSB 4
368 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ALARMEN_MSB 4
370 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ALARMEN_WIDTH 1
372 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ALARMEN_SET_MSK 0x00000010
374 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ALARMEN_CLR_MSK 0xffffffef
376 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ALARMEN_RESET 0x0
378 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ALARMEN_GET(value) (((value) & 0x00000010) >> 4)
380 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_ALARMEN_SET(value) (((value) << 4) & 0x00000010)
395 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATCONDDUMP_LSB 5
397 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATCONDDUMP_MSB 5
399 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATCONDDUMP_WIDTH 1
401 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATCONDDUMP_SET_MSK 0x00000020
403 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATCONDDUMP_CLR_MSK 0xffffffdf
405 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATCONDDUMP_RESET 0x0
407 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATCONDDUMP_GET(value) (((value) & 0x00000020) >> 5)
409 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_STATCONDDUMP_SET(value) (((value) << 5) & 0x00000020)
422 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_INTRUSIVEMOD_LSB 6
424 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_INTRUSIVEMOD_MSB 6
426 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_INTRUSIVEMOD_WIDTH 1
428 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_INTRUSIVEMOD_SET_MSK 0x00000040
430 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_INTRUSIVEMOD_CLR_MSK 0xffffffbf
432 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_INTRUSIVEMOD_RESET 0x0
434 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_INTRUSIVEMOD_GET(value) (((value) & 0x00000040) >> 6)
436 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_INTRUSIVEMOD_SET(value) (((value) << 6) & 0x00000040)
451 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_LSB 7
453 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_MSB 7
455 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_WIDTH 1
457 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET_MSK 0x00000080
459 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_CLR_MSK 0xffffff7f
461 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_RESET 0x0
463 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_GET(value) (((value) & 0x00000080) >> 7)
465 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET(value) (((value) << 7) & 0x00000080)
478 struct ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_s
481 uint32_t TRACEEN : 1;
482 uint32_t PAYLOADEN : 1;
484 uint32_t ALARMEN : 1;
485 uint32_t STATCONDDUMP : 1;
486 const uint32_t INTRUSIVEMODE : 1;
487 uint32_t FILTBYTEALWAYSCHAINABLEEN : 1;
492 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_s ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_t;
496 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_RESET 0x00000000
498 #define ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_OFST 0x8
520 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_GLOBEN_LSB 0
522 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_GLOBEN_MSB 0
524 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_GLOBEN_WIDTH 1
526 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_GLOBEN_SET_MSK 0x00000001
528 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_GLOBEN_CLR_MSK 0xfffffffe
530 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_GLOBEN_RESET 0x0
532 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_GLOBEN_GET(value) (((value) & 0x00000001) >> 0)
534 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_GLOBEN_SET(value) (((value) << 0) & 0x00000001)
544 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ACT_LSB 1
546 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ACT_MSB 1
548 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ACT_WIDTH 1
550 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ACT_SET_MSK 0x00000002
552 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ACT_CLR_MSK 0xfffffffd
554 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ACT_RESET 0x0
556 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ACT_GET(value) (((value) & 0x00000002) >> 1)
558 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_ACT_SET(value) (((value) << 1) & 0x00000002)
571 struct ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_s
573 uint32_t GLOBALEN : 1;
574 const uint32_t ACTIVE : 1;
579 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_s ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_t;
583 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_RESET 0x00000000
585 #define ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_OFST 0xc
611 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_TRACEPORTSEL_LSB 0
613 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_TRACEPORTSEL_MSB 0
615 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_TRACEPORTSEL_WIDTH 1
617 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_TRACEPORTSEL_SET_MSK 0x00000001
619 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_TRACEPORTSEL_CLR_MSK 0xfffffffe
621 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_TRACEPORTSEL_RESET 0x0
623 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_TRACEPORTSEL_GET(value) (((value) & 0x00000001) >> 0)
625 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_TRACEPORTSEL_SET(value) (((value) << 0) & 0x00000001)
638 struct ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_s
640 uint32_t TRACEPORTSEL : 1;
645 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_s ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_t;
649 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_RESET 0x00000000
651 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_OFST 0x10
678 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_FLTLUT_LSB 0
680 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_FLTLUT_MSB 3
682 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_FLTLUT_WIDTH 4
684 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_FLTLUT_SET_MSK 0x0000000f
686 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_FLTLUT_CLR_MSK 0xfffffff0
688 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_FLTLUT_RESET 0x0
690 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_FLTLUT_GET(value) (((value) & 0x0000000f) >> 0)
692 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_FLTLUT_SET(value) (((value) << 0) & 0x0000000f)
705 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_s
707 uint32_t FILTERLUT : 4;
712 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_t;
716 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_RESET 0x00000000
718 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_OFST 0x14
746 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_TRACEALARMEN_LSB 0
748 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_TRACEALARMEN_MSB 2
750 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_TRACEALARMEN_WIDTH 3
752 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_TRACEALARMEN_SET_MSK 0x00000007
754 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_TRACEALARMEN_CLR_MSK 0xfffffff8
756 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_TRACEALARMEN_RESET 0x0
758 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_TRACEALARMEN_GET(value) (((value) & 0x00000007) >> 0)
760 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_TRACEALARMEN_SET(value) (((value) << 0) & 0x00000007)
773 struct ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_s
775 uint32_t TRACEALARMEN : 3;
780 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_s ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_t;
784 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_RESET 0x00000000
786 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_OFST 0x18
813 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_LSB 0
815 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_MSB 2
817 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_WIDTH 3
819 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_SET_MSK 0x00000007
821 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_CLR_MSK 0xfffffff8
823 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_RESET 0x0
825 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_GET(value) (((value) & 0x00000007) >> 0)
827 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_SET(value) (((value) << 0) & 0x00000007)
840 struct ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_s
842 const uint32_t TRACEALARMSTATUS : 3;
847 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_s ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_t;
851 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_RESET 0x00000000
853 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_OFST 0x1c
879 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_TRACEALARMCLR_LSB 0
881 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_TRACEALARMCLR_MSB 2
883 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_TRACEALARMCLR_WIDTH 3
885 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_TRACEALARMCLR_SET_MSK 0x00000007
887 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_TRACEALARMCLR_CLR_MSK 0xfffffff8
889 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_TRACEALARMCLR_RESET 0x0
891 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_TRACEALARMCLR_GET(value) (((value) & 0x00000007) >> 0)
893 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_TRACEALARMCLR_SET(value) (((value) << 0) & 0x00000007)
906 struct ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_s
908 uint32_t TRACEALARMCLR : 3;
913 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_s ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_t;
917 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_RESET 0x00000000
919 #define ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_OFST 0x20
949 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_STATPERIOD_LSB 0
951 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_STATPERIOD_MSB 4
953 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_STATPERIOD_WIDTH 5
955 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_STATPERIOD_SET_MSK 0x0000001f
957 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_STATPERIOD_CLR_MSK 0xffffffe0
959 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_STATPERIOD_RESET 0x0
961 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_STATPERIOD_GET(value) (((value) & 0x0000001f) >> 0)
963 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_STATPERIOD_SET(value) (((value) << 0) & 0x0000001f)
976 struct ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_s
978 uint32_t STATPERIOD : 5;
983 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_s ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_t;
987 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_RESET 0x00000000
989 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_OFST 0x24
1015 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_STATGO_LSB 0
1017 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_STATGO_MSB 0
1019 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_STATGO_WIDTH 1
1021 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_STATGO_SET_MSK 0x00000001
1023 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_STATGO_CLR_MSK 0xfffffffe
1025 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_STATGO_RESET 0x0
1027 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_STATGO_GET(value) (((value) & 0x00000001) >> 0)
1029 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_STATGO_SET(value) (((value) << 0) & 0x00000001)
1031 #ifndef __ASSEMBLY__
1042 struct ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_s
1044 uint32_t STATGO : 1;
1049 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_s ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_t;
1053 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_RESET 0x00000000
1055 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_OFST 0x28
1080 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_STATALARMMIN_LSB 0
1082 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_STATALARMMIN_MSB 31
1084 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_STATALARMMIN_WIDTH 32
1086 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_STATALARMMIN_SET_MSK 0xffffffff
1088 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_STATALARMMIN_CLR_MSK 0x00000000
1090 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_STATALARMMIN_RESET 0x0
1092 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_STATALARMMIN_GET(value) (((value) & 0xffffffff) >> 0)
1094 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_STATALARMMIN_SET(value) (((value) << 0) & 0xffffffff)
1096 #ifndef __ASSEMBLY__
1107 struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_s
1109 uint32_t STATALARMMIN : 32;
1113 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_s ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_t;
1117 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_RESET 0x00000000
1119 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_OFST 0x2c
1144 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_STATALARMMAX_LSB 0
1146 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_STATALARMMAX_MSB 31
1148 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_STATALARMMAX_WIDTH 32
1150 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_STATALARMMAX_SET_MSK 0xffffffff
1152 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_STATALARMMAX_CLR_MSK 0x00000000
1154 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_STATALARMMAX_RESET 0x0
1156 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_STATALARMMAX_GET(value) (((value) & 0xffffffff) >> 0)
1158 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_STATALARMMAX_SET(value) (((value) << 0) & 0xffffffff)
1160 #ifndef __ASSEMBLY__
1171 struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_s
1173 uint32_t STATALARMMAX : 32;
1177 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_s ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_t;
1181 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_RESET 0x00000000
1183 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_OFST 0x30
1210 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_STATALARMSTAT_LSB 0
1212 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_STATALARMSTAT_MSB 0
1214 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_STATALARMSTAT_WIDTH 1
1216 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_STATALARMSTAT_SET_MSK 0x00000001
1218 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_STATALARMSTAT_CLR_MSK 0xfffffffe
1220 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_STATALARMSTAT_RESET 0x0
1222 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_STATALARMSTAT_GET(value) (((value) & 0x00000001) >> 0)
1224 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_STATALARMSTAT_SET(value) (((value) << 0) & 0x00000001)
1226 #ifndef __ASSEMBLY__
1237 struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_s
1239 const uint32_t STATALARMSTATUS : 1;
1244 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_s ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_t;
1248 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_RESET 0x00000000
1250 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_OFST 0x34
1276 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_STATALARMCLR_LSB 0
1278 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_STATALARMCLR_MSB 0
1280 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_STATALARMCLR_WIDTH 1
1282 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_STATALARMCLR_SET_MSK 0x00000001
1284 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_STATALARMCLR_CLR_MSK 0xfffffffe
1286 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_STATALARMCLR_RESET 0x0
1288 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_STATALARMCLR_GET(value) (((value) & 0x00000001) >> 0)
1290 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_STATALARMCLR_SET(value) (((value) << 0) & 0x00000001)
1292 #ifndef __ASSEMBLY__
1303 struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_s
1305 uint32_t STATALARMCLR : 1;
1310 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_s ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_t;
1314 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_RESET 0x00000000
1316 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_OFST 0x38
1340 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_STATALARMEN_LSB 0
1342 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_STATALARMEN_MSB 0
1344 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_STATALARMEN_WIDTH 1
1346 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_STATALARMEN_SET_MSK 0x00000001
1348 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_STATALARMEN_CLR_MSK 0xfffffffe
1350 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_STATALARMEN_RESET 0x1
1352 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_STATALARMEN_GET(value) (((value) & 0x00000001) >> 0)
1354 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_STATALARMEN_SET(value) (((value) << 0) & 0x00000001)
1356 #ifndef __ASSEMBLY__
1367 struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_s
1369 uint32_t STATALARMEN : 1;
1374 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_s ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_t;
1378 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_RESET 0x00000001
1380 #define ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_OFST 0x3c
1404 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_LSB 0
1406 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_MSB 18
1408 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_WIDTH 19
1410 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_SET_MSK 0x0007ffff
1412 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_CLR_MSK 0xfff80000
1414 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_RESET 0x0
1416 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_GET(value) (((value) & 0x0007ffff) >> 0)
1418 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_SET(value) (((value) << 0) & 0x0007ffff)
1420 #ifndef __ASSEMBLY__
1431 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_s
1433 uint32_t FILTERS_0_ROUTEIDBASE : 19;
1438 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_t;
1442 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_RESET 0x00000000
1444 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_OFST 0x44
1469 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_LSB 0
1471 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_MSB 18
1473 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_WIDTH 19
1475 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_SET_MSK 0x0007ffff
1477 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_CLR_MSK 0xfff80000
1479 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_RESET 0x0
1481 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_GET(value) (((value) & 0x0007ffff) >> 0)
1483 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_SET(value) (((value) << 0) & 0x0007ffff)
1485 #ifndef __ASSEMBLY__
1496 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_s
1498 uint32_t FILTERS_0_ROUTEIDMASK : 19;
1503 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_t;
1507 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_RESET 0x00000000
1509 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_OFST 0x48
1531 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_LSB 0
1533 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_MSB 31
1535 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_WIDTH 32
1537 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_SET_MSK 0xffffffff
1539 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_CLR_MSK 0x00000000
1541 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_RESET 0x0
1543 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_GET(value) (((value) & 0xffffffff) >> 0)
1545 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_SET(value) (((value) << 0) & 0xffffffff)
1547 #ifndef __ASSEMBLY__
1558 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_s
1560 uint32_t FILTERS_0_ADDRBASE_LOW : 32;
1564 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_t;
1568 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_RESET 0x00000000
1570 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_OFST 0x4c
1597 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_LSB 0
1599 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_MSB 5
1601 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_WIDTH 6
1603 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_SET_MSK 0x0000003f
1605 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_CLR_MSK 0xffffffc0
1607 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_RESET 0x0
1609 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0)
1611 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f)
1613 #ifndef __ASSEMBLY__
1624 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_s
1626 uint32_t FILTERS_0_WINDOWSIZE : 6;
1631 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_t;
1635 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_RESET 0x00000000
1637 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_OFST 0x54
1660 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_LSB 0
1662 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_MSB 2
1664 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_WIDTH 3
1666 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET_MSK 0x00000007
1668 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_CLR_MSK 0xfffffff8
1670 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_RESET 0x0
1672 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_GET(value) (((value) & 0x00000007) >> 0)
1674 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET(value) (((value) << 0) & 0x00000007)
1676 #ifndef __ASSEMBLY__
1687 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_s
1689 uint32_t FILTERS_0_SECURITYBASE : 3;
1694 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_t;
1698 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_RESET 0x00000000
1700 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_OFST 0x58
1725 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_LSB 0
1727 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_MSB 2
1729 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_WIDTH 3
1731 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_SET_MSK 0x00000007
1733 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_CLR_MSK 0xfffffff8
1735 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_RESET 0x0
1737 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_GET(value) (((value) & 0x00000007) >> 0)
1739 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_SET(value) (((value) << 0) & 0x00000007)
1741 #ifndef __ASSEMBLY__
1752 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_s
1754 uint32_t FILTERS_0_SECURITYMASK : 3;
1759 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_t;
1763 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_RESET 0x00000000
1765 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_OFST 0x5c
1793 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RDEN_LSB 0
1795 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RDEN_MSB 0
1797 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RDEN_WIDTH 1
1799 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RDEN_SET_MSK 0x00000001
1801 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RDEN_CLR_MSK 0xfffffffe
1803 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RDEN_RESET 0x0
1805 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RDEN_GET(value) (((value) & 0x00000001) >> 0)
1807 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RDEN_SET(value) (((value) << 0) & 0x00000001)
1818 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_WREN_LSB 1
1820 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_WREN_MSB 1
1822 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_WREN_WIDTH 1
1824 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_WREN_SET_MSK 0x00000002
1826 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_WREN_CLR_MSK 0xfffffffd
1828 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_WREN_RESET 0x0
1830 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_WREN_GET(value) (((value) & 0x00000002) >> 1)
1832 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_WREN_SET(value) (((value) << 1) & 0x00000002)
1843 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_LOCKEN_LSB 2
1845 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_LOCKEN_MSB 2
1847 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_LOCKEN_WIDTH 1
1849 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_LOCKEN_SET_MSK 0x00000004
1851 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_LOCKEN_CLR_MSK 0xfffffffb
1853 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_LOCKEN_RESET 0x0
1855 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_LOCKEN_GET(value) (((value) & 0x00000004) >> 2)
1857 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_LOCKEN_SET(value) (((value) << 2) & 0x00000004)
1868 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_URGEN_LSB 3
1870 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_URGEN_MSB 3
1872 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_URGEN_WIDTH 1
1874 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_URGEN_SET_MSK 0x00000008
1876 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_URGEN_CLR_MSK 0xfffffff7
1878 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_URGEN_RESET 0x0
1880 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_URGEN_GET(value) (((value) & 0x00000008) >> 3)
1882 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_URGEN_SET(value) (((value) << 3) & 0x00000008)
1884 #ifndef __ASSEMBLY__
1895 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_s
1899 uint32_t LOCKEN : 1;
1905 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_t;
1909 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_RESET 0x00000000
1911 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_OFST 0x60
1937 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_REQEN_LSB 0
1939 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_REQEN_MSB 0
1941 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_REQEN_WIDTH 1
1943 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_REQEN_SET_MSK 0x00000001
1945 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_REQEN_CLR_MSK 0xfffffffe
1947 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_REQEN_RESET 0x0
1949 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_REQEN_GET(value) (((value) & 0x00000001) >> 0)
1951 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_REQEN_SET(value) (((value) << 0) & 0x00000001)
1962 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RSPEN_LSB 1
1964 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RSPEN_MSB 1
1966 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RSPEN_WIDTH 1
1968 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RSPEN_SET_MSK 0x00000002
1970 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RSPEN_CLR_MSK 0xfffffffd
1972 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RSPEN_RESET 0x0
1974 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RSPEN_GET(value) (((value) & 0x00000002) >> 1)
1976 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RSPEN_SET(value) (((value) << 1) & 0x00000002)
1978 #ifndef __ASSEMBLY__
1989 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_s
1997 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_t;
2001 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_RESET 0x00000000
2003 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_OFST 0x64
2027 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_FLTS_0_LEN_LSB 0
2029 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_FLTS_0_LEN_MSB 3
2031 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_FLTS_0_LEN_WIDTH 4
2033 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_FLTS_0_LEN_SET_MSK 0x0000000f
2035 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_FLTS_0_LEN_CLR_MSK 0xfffffff0
2037 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_FLTS_0_LEN_RESET 0x0
2039 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_FLTS_0_LEN_GET(value) (((value) & 0x0000000f) >> 0)
2041 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_FLTS_0_LEN_SET(value) (((value) << 0) & 0x0000000f)
2043 #ifndef __ASSEMBLY__
2054 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_s
2056 uint32_t FILTERS_0_LENGTH : 4;
2061 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_t;
2065 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_RESET 0x00000000
2067 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_OFST 0x68
2092 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_LSB 0
2094 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_MSB 1
2096 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_WIDTH 2
2098 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_SET_MSK 0x00000003
2100 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_CLR_MSK 0xfffffffc
2102 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_RESET 0x0
2104 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_GET(value) (((value) & 0x00000003) >> 0)
2106 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_SET(value) (((value) << 0) & 0x00000003)
2108 #ifndef __ASSEMBLY__
2119 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_s
2121 uint32_t FILTERS_0_URGENCY : 2;
2126 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_t;
2130 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_RESET 0x00000000
2132 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_OFST 0x6c
2156 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_LSB 0
2158 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_MSB 18
2160 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_WIDTH 19
2162 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_SET_MSK 0x0007ffff
2164 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_CLR_MSK 0xfff80000
2166 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_RESET 0x0
2168 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_GET(value) (((value) & 0x0007ffff) >> 0)
2170 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_SET(value) (((value) << 0) & 0x0007ffff)
2172 #ifndef __ASSEMBLY__
2183 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_s
2185 uint32_t FILTERS_1_ROUTEIDBASE : 19;
2190 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_t;
2194 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_RESET 0x00000000
2196 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_OFST 0x80
2221 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_LSB 0
2223 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_MSB 18
2225 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_WIDTH 19
2227 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_SET_MSK 0x0007ffff
2229 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_CLR_MSK 0xfff80000
2231 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_RESET 0x0
2233 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_GET(value) (((value) & 0x0007ffff) >> 0)
2235 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_SET(value) (((value) << 0) & 0x0007ffff)
2237 #ifndef __ASSEMBLY__
2248 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_s
2250 uint32_t FILTERS_1_ROUTEIDMASK : 19;
2255 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_t;
2259 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_RESET 0x00000000
2261 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_OFST 0x84
2283 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_LSB 0
2285 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_MSB 31
2287 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_WIDTH 32
2289 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_SET_MSK 0xffffffff
2291 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_CLR_MSK 0x00000000
2293 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_RESET 0x0
2295 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_GET(value) (((value) & 0xffffffff) >> 0)
2297 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_SET(value) (((value) << 0) & 0xffffffff)
2299 #ifndef __ASSEMBLY__
2310 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_s
2312 uint32_t FILTERS_1_ADDRBASE_LOW : 32;
2316 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_t;
2320 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_RESET 0x00000000
2322 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_OFST 0x88
2349 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_LSB 0
2351 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_MSB 5
2353 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_WIDTH 6
2355 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_SET_MSK 0x0000003f
2357 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_CLR_MSK 0xffffffc0
2359 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_RESET 0x0
2361 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0)
2363 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f)
2365 #ifndef __ASSEMBLY__
2376 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_s
2378 uint32_t FILTERS_1_WINDOWSIZE : 6;
2383 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_t;
2387 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_RESET 0x00000000
2389 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_OFST 0x90
2412 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_LSB 0
2414 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_MSB 2
2416 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_WIDTH 3
2418 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_SET_MSK 0x00000007
2420 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_CLR_MSK 0xfffffff8
2422 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_RESET 0x0
2424 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_GET(value) (((value) & 0x00000007) >> 0)
2426 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_SET(value) (((value) << 0) & 0x00000007)
2428 #ifndef __ASSEMBLY__
2439 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_s
2441 uint32_t FILTERS_1_SECURITYBASE : 3;
2446 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_t;
2450 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_RESET 0x00000000
2452 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_OFST 0x94
2477 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_LSB 0
2479 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_MSB 2
2481 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_WIDTH 3
2483 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_SET_MSK 0x00000007
2485 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_CLR_MSK 0xfffffff8
2487 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_RESET 0x0
2489 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_GET(value) (((value) & 0x00000007) >> 0)
2491 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_SET(value) (((value) << 0) & 0x00000007)
2493 #ifndef __ASSEMBLY__
2504 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_s
2506 uint32_t FILTERS_1_SECURITYMASK : 3;
2511 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_t;
2515 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_RESET 0x00000000
2517 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_OFST 0x98
2545 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RDEN_LSB 0
2547 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RDEN_MSB 0
2549 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RDEN_WIDTH 1
2551 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RDEN_SET_MSK 0x00000001
2553 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RDEN_CLR_MSK 0xfffffffe
2555 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RDEN_RESET 0x0
2557 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RDEN_GET(value) (((value) & 0x00000001) >> 0)
2559 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RDEN_SET(value) (((value) << 0) & 0x00000001)
2570 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_WREN_LSB 1
2572 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_WREN_MSB 1
2574 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_WREN_WIDTH 1
2576 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_WREN_SET_MSK 0x00000002
2578 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_WREN_CLR_MSK 0xfffffffd
2580 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_WREN_RESET 0x0
2582 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_WREN_GET(value) (((value) & 0x00000002) >> 1)
2584 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_WREN_SET(value) (((value) << 1) & 0x00000002)
2595 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_LOCKEN_LSB 2
2597 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_LOCKEN_MSB 2
2599 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_LOCKEN_WIDTH 1
2601 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_LOCKEN_SET_MSK 0x00000004
2603 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_LOCKEN_CLR_MSK 0xfffffffb
2605 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_LOCKEN_RESET 0x0
2607 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_LOCKEN_GET(value) (((value) & 0x00000004) >> 2)
2609 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_LOCKEN_SET(value) (((value) << 2) & 0x00000004)
2620 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_URGEN_LSB 3
2622 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_URGEN_MSB 3
2624 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_URGEN_WIDTH 1
2626 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_URGEN_SET_MSK 0x00000008
2628 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_URGEN_CLR_MSK 0xfffffff7
2630 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_URGEN_RESET 0x0
2632 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_URGEN_GET(value) (((value) & 0x00000008) >> 3)
2634 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_URGEN_SET(value) (((value) << 3) & 0x00000008)
2636 #ifndef __ASSEMBLY__
2647 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_s
2651 uint32_t LOCKEN : 1;
2657 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_t;
2661 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_RESET 0x00000000
2663 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_OFST 0x9c
2689 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_REQEN_LSB 0
2691 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_REQEN_MSB 0
2693 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_REQEN_WIDTH 1
2695 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_REQEN_SET_MSK 0x00000001
2697 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_REQEN_CLR_MSK 0xfffffffe
2699 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_REQEN_RESET 0x0
2701 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_REQEN_GET(value) (((value) & 0x00000001) >> 0)
2703 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_REQEN_SET(value) (((value) << 0) & 0x00000001)
2714 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RSPEN_LSB 1
2716 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RSPEN_MSB 1
2718 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RSPEN_WIDTH 1
2720 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RSPEN_SET_MSK 0x00000002
2722 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RSPEN_CLR_MSK 0xfffffffd
2724 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RSPEN_RESET 0x0
2726 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RSPEN_GET(value) (((value) & 0x00000002) >> 1)
2728 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RSPEN_SET(value) (((value) << 1) & 0x00000002)
2730 #ifndef __ASSEMBLY__
2741 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_s
2749 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_t;
2753 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_RESET 0x00000000
2755 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_OFST 0xa0
2779 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_FLTS_1_LEN_LSB 0
2781 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_FLTS_1_LEN_MSB 3
2783 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_FLTS_1_LEN_WIDTH 4
2785 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_FLTS_1_LEN_SET_MSK 0x0000000f
2787 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_FLTS_1_LEN_CLR_MSK 0xfffffff0
2789 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_FLTS_1_LEN_RESET 0x0
2791 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_FLTS_1_LEN_GET(value) (((value) & 0x0000000f) >> 0)
2793 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_FLTS_1_LEN_SET(value) (((value) << 0) & 0x0000000f)
2795 #ifndef __ASSEMBLY__
2806 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_s
2808 uint32_t FILTERS_1_LENGTH : 4;
2813 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_t;
2817 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_RESET 0x00000000
2819 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_OFST 0xa4
2844 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_LSB 0
2846 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_MSB 1
2848 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_WIDTH 2
2850 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_SET_MSK 0x00000003
2852 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_CLR_MSK 0xfffffffc
2854 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_RESET 0x0
2856 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_GET(value) (((value) & 0x00000003) >> 0)
2858 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_SET(value) (((value) << 0) & 0x00000003)
2860 #ifndef __ASSEMBLY__
2871 struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_s
2873 uint32_t FILTERS_1_URGENCY : 2;
2878 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_s ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_t;
2882 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_RESET 0x00000000
2884 #define ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_OFST 0xa8
2909 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_LSB 0
2911 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_MSB 0
2913 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_WIDTH 1
2915 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_SET_MSK 0x00000001
2917 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_CLR_MSK 0xfffffffe
2919 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_RESET 0x0
2921 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_GET(value) (((value) & 0x00000001) >> 0)
2923 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_SET(value) (((value) << 0) & 0x00000001)
2925 #ifndef __ASSEMBLY__
2936 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_s
2938 uint32_t COUNTERS_0_PORTSEL : 1;
2943 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_t;
2947 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_RESET 0x00000000
2949 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_OFST 0x134
2975 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_INTEVENT_LSB 0
2977 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_INTEVENT_MSB 4
2979 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_INTEVENT_WIDTH 5
2981 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_INTEVENT_SET_MSK 0x0000001f
2983 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_INTEVENT_CLR_MSK 0xffffffe0
2985 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_INTEVENT_RESET 0x0
2987 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
2989 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
2991 #ifndef __ASSEMBLY__
3002 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_s
3004 uint32_t INTEVENT : 5;
3009 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_t;
3013 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_RESET 0x00000000
3015 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_OFST 0x138
3040 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_LSB 0
3042 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_MSB 1
3044 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_WIDTH 2
3046 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_SET_MSK 0x00000003
3048 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_CLR_MSK 0xfffffffc
3050 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_RESET 0x0
3052 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
3054 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
3056 #ifndef __ASSEMBLY__
3067 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_s
3069 uint32_t COUNTERS_0_ALARMMODE : 2;
3074 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_t;
3078 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_RESET 0x00000000
3080 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_OFST 0x13c
3105 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_LSB 0
3107 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_MSB 15
3109 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_WIDTH 16
3111 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_SET_MSK 0x0000ffff
3113 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_CLR_MSK 0xffff0000
3115 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_RESET 0x0
3117 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
3119 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_SET(value) (((value) << 0) & 0x0000ffff)
3121 #ifndef __ASSEMBLY__
3132 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_s
3134 const uint32_t COUNTERS_0_VAL : 16;
3139 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_t;
3143 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_RESET 0x00000000
3145 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_OFST 0x140
3170 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_LSB 0
3172 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_MSB 0
3174 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_WIDTH 1
3176 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_SET_MSK 0x00000001
3178 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_CLR_MSK 0xfffffffe
3180 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_RESET 0x0
3182 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_GET(value) (((value) & 0x00000001) >> 0)
3184 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_SET(value) (((value) << 0) & 0x00000001)
3186 #ifndef __ASSEMBLY__
3197 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_s
3199 uint32_t COUNTERS_1_PORTSEL : 1;
3204 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_t;
3208 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_RESET 0x00000000
3210 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_OFST 0x148
3236 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_INTEVENT_LSB 0
3238 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_INTEVENT_MSB 4
3240 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_INTEVENT_WIDTH 5
3242 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_INTEVENT_SET_MSK 0x0000001f
3244 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_INTEVENT_CLR_MSK 0xffffffe0
3246 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_INTEVENT_RESET 0x0
3248 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
3250 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
3252 #ifndef __ASSEMBLY__
3263 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_s
3265 uint32_t INTEVENT : 5;
3270 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_t;
3274 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_RESET 0x00000000
3276 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_OFST 0x14c
3301 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_LSB 0
3303 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_MSB 1
3305 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_WIDTH 2
3307 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_SET_MSK 0x00000003
3309 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_CLR_MSK 0xfffffffc
3311 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_RESET 0x0
3313 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
3315 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
3317 #ifndef __ASSEMBLY__
3328 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_s
3330 uint32_t COUNTERS_1_ALARMMODE : 2;
3335 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_t;
3339 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_RESET 0x00000000
3341 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_OFST 0x150
3366 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_LSB 0
3368 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_MSB 15
3370 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_WIDTH 16
3372 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_SET_MSK 0x0000ffff
3374 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_CLR_MSK 0xffff0000
3376 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_RESET 0x0
3378 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
3380 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_SET(value) (((value) << 0) & 0x0000ffff)
3382 #ifndef __ASSEMBLY__
3393 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_s
3395 const uint32_t COUNTERS_1_VAL : 16;
3400 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_t;
3404 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_RESET 0x00000000
3406 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_OFST 0x154
3431 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_LSB 0
3433 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_MSB 0
3435 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_WIDTH 1
3437 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_SET_MSK 0x00000001
3439 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_CLR_MSK 0xfffffffe
3441 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_RESET 0x0
3443 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_GET(value) (((value) & 0x00000001) >> 0)
3445 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_SET(value) (((value) << 0) & 0x00000001)
3447 #ifndef __ASSEMBLY__
3458 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_s
3460 uint32_t COUNTERS_2_PORTSEL : 1;
3465 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_t;
3469 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_RESET 0x00000000
3471 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_OFST 0x15c
3497 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_INTEVENT_LSB 0
3499 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_INTEVENT_MSB 4
3501 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_INTEVENT_WIDTH 5
3503 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_INTEVENT_SET_MSK 0x0000001f
3505 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_INTEVENT_CLR_MSK 0xffffffe0
3507 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_INTEVENT_RESET 0x0
3509 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
3511 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
3513 #ifndef __ASSEMBLY__
3524 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_s
3526 uint32_t INTEVENT : 5;
3531 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_t;
3535 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_RESET 0x00000000
3537 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_OFST 0x160
3562 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_LSB 0
3564 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_MSB 1
3566 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_WIDTH 2
3568 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_SET_MSK 0x00000003
3570 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_CLR_MSK 0xfffffffc
3572 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_RESET 0x0
3574 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
3576 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
3578 #ifndef __ASSEMBLY__
3589 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_s
3591 uint32_t COUNTERS_2_ALARMMODE : 2;
3596 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_t;
3600 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_RESET 0x00000000
3602 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_OFST 0x164
3627 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_LSB 0
3629 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_MSB 15
3631 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_WIDTH 16
3633 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_SET_MSK 0x0000ffff
3635 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_CLR_MSK 0xffff0000
3637 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_RESET 0x0
3639 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
3641 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_SET(value) (((value) << 0) & 0x0000ffff)
3643 #ifndef __ASSEMBLY__
3654 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_s
3656 const uint32_t COUNTERS_2_VAL : 16;
3661 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_t;
3665 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_RESET 0x00000000
3667 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_OFST 0x168
3692 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_LSB 0
3694 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_MSB 0
3696 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_WIDTH 1
3698 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_SET_MSK 0x00000001
3700 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_CLR_MSK 0xfffffffe
3702 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_RESET 0x0
3704 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_GET(value) (((value) & 0x00000001) >> 0)
3706 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_SET(value) (((value) << 0) & 0x00000001)
3708 #ifndef __ASSEMBLY__
3719 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_s
3721 uint32_t COUNTERS_3_PORTSEL : 1;
3726 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_t;
3730 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_RESET 0x00000000
3732 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_OFST 0x170
3758 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_INTEVENT_LSB 0
3760 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_INTEVENT_MSB 4
3762 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_INTEVENT_WIDTH 5
3764 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_INTEVENT_SET_MSK 0x0000001f
3766 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_INTEVENT_CLR_MSK 0xffffffe0
3768 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_INTEVENT_RESET 0x0
3770 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
3772 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
3774 #ifndef __ASSEMBLY__
3785 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_s
3787 uint32_t INTEVENT : 5;
3792 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_t;
3796 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_RESET 0x00000000
3798 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_OFST 0x174
3823 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_LSB 0
3825 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_MSB 1
3827 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_WIDTH 2
3829 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_SET_MSK 0x00000003
3831 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_CLR_MSK 0xfffffffc
3833 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_RESET 0x0
3835 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
3837 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
3839 #ifndef __ASSEMBLY__
3850 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_s
3852 uint32_t COUNTERS_3_ALARMMODE : 2;
3857 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_t;
3861 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_RESET 0x00000000
3863 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_OFST 0x178
3888 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_LSB 0
3890 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_MSB 15
3892 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_WIDTH 16
3894 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_SET_MSK 0x0000ffff
3896 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_CLR_MSK 0xffff0000
3898 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_RESET 0x0
3900 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
3902 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_SET(value) (((value) << 0) & 0x0000ffff)
3904 #ifndef __ASSEMBLY__
3915 struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_s
3917 const uint32_t COUNTERS_3_VAL : 16;
3922 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_s ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_t;
3926 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_RESET 0x00000000
3928 #define ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_OFST 0x17c
3930 #ifndef __ASSEMBLY__
3941 struct ALT_NOC_MPU_PRB_H2F_MAIN_PRB_s
3943 ALT_NOC_MPU_PRB_H2F_MAIN_COREID_t Probe_SoC2FPGA_main_Probe_Id_CoreId;
3944 ALT_NOC_MPU_PRB_H2F_MAIN_REVID_t Probe_SoC2FPGA_main_Probe_Id_RevisionId;
3945 ALT_NOC_MPU_PRB_H2F_MAIN_MAINCTL_t Probe_SoC2FPGA_main_Probe_MainCtl;
3946 ALT_NOC_MPU_PRB_H2F_MAIN_CFGCTL_t Probe_SoC2FPGA_main_Probe_CfgCtl;
3947 ALT_NOC_MPU_PRB_H2F_MAIN_TRACEPORTSEL_t Probe_SoC2FPGA_main_Probe_TracePortSel;
3948 ALT_NOC_MPU_PRB_H2F_MAIN_FLTLUT_t Probe_SoC2FPGA_main_Probe_FilterLut;
3949 ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMEN_t Probe_SoC2FPGA_main_Probe_TraceAlarmEn;
3950 ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMSTAT_t Probe_SoC2FPGA_main_Probe_TraceAlarmStatus;
3951 ALT_NOC_MPU_PRB_H2F_MAIN_TRACEALARMCLR_t Probe_SoC2FPGA_main_Probe_TraceAlarmClr;
3952 ALT_NOC_MPU_PRB_H2F_MAIN_STATPERIOD_t Probe_SoC2FPGA_main_Probe_StatPeriod;
3953 ALT_NOC_MPU_PRB_H2F_MAIN_STATGO_t Probe_SoC2FPGA_main_Probe_StatGo;
3954 ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMIN_t Probe_SoC2FPGA_main_Probe_StatAlarmMin;
3955 ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMMAX_t Probe_SoC2FPGA_main_Probe_StatAlarmMax;
3956 ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMSTAT_t Probe_SoC2FPGA_main_Probe_StatAlarmStatus;
3957 ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMCLR_t Probe_SoC2FPGA_main_Probe_StatAlarmClr;
3958 ALT_NOC_MPU_PRB_H2F_MAIN_STATALARMEN_t Probe_SoC2FPGA_main_Probe_StatAlarmEn;
3959 volatile uint32_t _pad_0x40_0x43;
3960 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDBASE_t Probe_SoC2FPGA_main_Probe_Filters_0_RouteIdBase;
3961 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ROUTEIDMSK_t Probe_SoC2FPGA_main_Probe_Filters_0_RouteIdMask;
3962 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_ADDRBASE_LOW_t Probe_SoC2FPGA_main_Probe_Filters_0_AddrBase_Low;
3963 volatile uint32_t _pad_0x50_0x53;
3964 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_WINDOWSIZE_t Probe_SoC2FPGA_main_Probe_Filters_0_WindowSize;
3965 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYBASE_t Probe_SoC2FPGA_main_Probe_Filters_0_SecurityBase;
3966 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_SECURITYMSK_t Probe_SoC2FPGA_main_Probe_Filters_0_SecurityMask;
3967 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_OPCODE_t Probe_SoC2FPGA_main_Probe_Filters_0_Opcode;
3968 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_STAT_t Probe_SoC2FPGA_main_Probe_Filters_0_Status;
3969 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_LEN_t Probe_SoC2FPGA_main_Probe_Filters_0_Length;
3970 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_0_URGENCY_t Probe_SoC2FPGA_main_Probe_Filters_0_Urgency;
3971 volatile uint32_t _pad_0x70_0x7f[4];
3972 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDBASE_t Probe_SoC2FPGA_main_Probe_Filters_1_RouteIdBase;
3973 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ROUTEIDMSK_t Probe_SoC2FPGA_main_Probe_Filters_1_RouteIdMask;
3974 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_ADDRBASE_LOW_t Probe_SoC2FPGA_main_Probe_Filters_1_AddrBase_Low;
3975 volatile uint32_t _pad_0x8c_0x8f;
3976 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_WINDOWSIZE_t Probe_SoC2FPGA_main_Probe_Filters_1_WindowSize;
3977 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYBASE_t Probe_SoC2FPGA_main_Probe_Filters_1_SecurityBase;
3978 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_SECURITYMSK_t Probe_SoC2FPGA_main_Probe_Filters_1_SecurityMask;
3979 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_OPCODE_t Probe_SoC2FPGA_main_Probe_Filters_1_Opcode;
3980 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_STAT_t Probe_SoC2FPGA_main_Probe_Filters_1_Status;
3981 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_LEN_t Probe_SoC2FPGA_main_Probe_Filters_1_Length;
3982 ALT_NOC_MPU_PRB_H2F_MAIN_FLTS_1_URGENCY_t Probe_SoC2FPGA_main_Probe_Filters_1_Urgency;
3983 volatile uint32_t _pad_0xac_0x133[34];
3984 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_PORTSEL_t Probe_SoC2FPGA_main_Probe_Counters_0_PortSel;
3985 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_SRC_t Probe_SoC2FPGA_main_Probe_Counters_0_Src;
3986 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_ALARMMOD_t Probe_SoC2FPGA_main_Probe_Counters_0_AlarmMode;
3987 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_0_VAL_t Probe_SoC2FPGA_main_Probe_Counters_0_Val;
3988 volatile uint32_t _pad_0x144_0x147;
3989 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_PORTSEL_t Probe_SoC2FPGA_main_Probe_Counters_1_PortSel;
3990 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_SRC_t Probe_SoC2FPGA_main_Probe_Counters_1_Src;
3991 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_ALARMMOD_t Probe_SoC2FPGA_main_Probe_Counters_1_AlarmMode;
3992 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_1_VAL_t Probe_SoC2FPGA_main_Probe_Counters_1_Val;
3993 volatile uint32_t _pad_0x158_0x15b;
3994 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_PORTSEL_t Probe_SoC2FPGA_main_Probe_Counters_2_PortSel;
3995 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_SRC_t Probe_SoC2FPGA_main_Probe_Counters_2_Src;
3996 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_ALARMMOD_t Probe_SoC2FPGA_main_Probe_Counters_2_AlarmMode;
3997 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_2_VAL_t Probe_SoC2FPGA_main_Probe_Counters_2_Val;
3998 volatile uint32_t _pad_0x16c_0x16f;
3999 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_PORTSEL_t Probe_SoC2FPGA_main_Probe_Counters_3_PortSel;
4000 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_SRC_t Probe_SoC2FPGA_main_Probe_Counters_3_Src;
4001 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_ALARMMOD_t Probe_SoC2FPGA_main_Probe_Counters_3_AlarmMode;
4002 ALT_NOC_MPU_PRB_H2F_MAIN_CNTRS_3_VAL_t Probe_SoC2FPGA_main_Probe_Counters_3_Val;
4003 volatile uint32_t _pad_0x180_0x400[160];
4007 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_PRB_s ALT_NOC_MPU_PRB_H2F_MAIN_PRB_t;
4009 struct ALT_NOC_MPU_PRB_H2F_MAIN_PRB_raw_s
4011 volatile uint32_t Probe_SoC2FPGA_main_Probe_Id_CoreId;
4012 volatile uint32_t Probe_SoC2FPGA_main_Probe_Id_RevisionId;
4013 volatile uint32_t Probe_SoC2FPGA_main_Probe_MainCtl;
4014 volatile uint32_t Probe_SoC2FPGA_main_Probe_CfgCtl;
4015 volatile uint32_t Probe_SoC2FPGA_main_Probe_TracePortSel;
4016 volatile uint32_t Probe_SoC2FPGA_main_Probe_FilterLut;
4017 volatile uint32_t Probe_SoC2FPGA_main_Probe_TraceAlarmEn;
4018 volatile uint32_t Probe_SoC2FPGA_main_Probe_TraceAlarmStatus;
4019 volatile uint32_t Probe_SoC2FPGA_main_Probe_TraceAlarmClr;
4020 volatile uint32_t Probe_SoC2FPGA_main_Probe_StatPeriod;
4021 volatile uint32_t Probe_SoC2FPGA_main_Probe_StatGo;
4022 volatile uint32_t Probe_SoC2FPGA_main_Probe_StatAlarmMin;
4023 volatile uint32_t Probe_SoC2FPGA_main_Probe_StatAlarmMax;
4024 volatile uint32_t Probe_SoC2FPGA_main_Probe_StatAlarmStatus;
4025 volatile uint32_t Probe_SoC2FPGA_main_Probe_StatAlarmClr;
4026 volatile uint32_t Probe_SoC2FPGA_main_Probe_StatAlarmEn;
4027 uint32_t _pad_0x40_0x43;
4028 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_RouteIdBase;
4029 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_RouteIdMask;
4030 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_AddrBase_Low;
4031 uint32_t _pad_0x50_0x53;
4032 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_WindowSize;
4033 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_SecurityBase;
4034 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_SecurityMask;
4035 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_Opcode;
4036 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_Status;
4037 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_Length;
4038 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_0_Urgency;
4039 uint32_t _pad_0x70_0x7f[4];
4040 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_RouteIdBase;
4041 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_RouteIdMask;
4042 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_AddrBase_Low;
4043 uint32_t _pad_0x8c_0x8f;
4044 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_WindowSize;
4045 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_SecurityBase;
4046 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_SecurityMask;
4047 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_Opcode;
4048 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_Status;
4049 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_Length;
4050 volatile uint32_t Probe_SoC2FPGA_main_Probe_Filters_1_Urgency;
4051 uint32_t _pad_0xac_0x133[34];
4052 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_0_PortSel;
4053 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_0_Src;
4054 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_0_AlarmMode;
4055 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_0_Val;
4056 uint32_t _pad_0x144_0x147;
4057 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_1_PortSel;
4058 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_1_Src;
4059 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_1_AlarmMode;
4060 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_1_Val;
4061 uint32_t _pad_0x158_0x15b;
4062 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_2_PortSel;
4063 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_2_Src;
4064 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_2_AlarmMode;
4065 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_2_Val;
4066 uint32_t _pad_0x16c_0x16f;
4067 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_3_PortSel;
4068 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_3_Src;
4069 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_3_AlarmMode;
4070 volatile uint32_t Probe_SoC2FPGA_main_Probe_Counters_3_Val;
4071 uint32_t _pad_0x180_0x400[160];
4075 typedef volatile struct ALT_NOC_MPU_PRB_H2F_MAIN_PRB_raw_s ALT_NOC_MPU_PRB_H2F_MAIN_PRB_raw_t;
4103 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_TYPEID_LSB 0
4105 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_TYPEID_MSB 7
4107 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_TYPEID_WIDTH 8
4109 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_TYPEID_SET_MSK 0x000000ff
4111 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_TYPEID_CLR_MSK 0xffffff00
4113 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_TYPEID_RESET 0x6
4115 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0)
4117 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff)
4128 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_CHECKSUM_LSB 8
4130 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_CHECKSUM_MSB 31
4132 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_CHECKSUM_WIDTH 24
4134 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_CHECKSUM_SET_MSK 0xffffff00
4136 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_CHECKSUM_CLR_MSK 0x000000ff
4138 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_CHECKSUM_RESET 0xf46f63
4140 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
4142 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
4144 #ifndef __ASSEMBLY__
4155 struct ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_s
4157 const uint32_t CORETYPEID : 8;
4158 const uint32_t CORECHECKSUM : 24;
4162 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_s ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_t;
4166 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_RESET 0xf46f6306
4168 #define ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_OFST 0x0
4190 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_UID_LSB 0
4192 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_UID_MSB 7
4194 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_UID_WIDTH 8
4196 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_UID_SET_MSK 0x000000ff
4198 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_UID_CLR_MSK 0xffffff00
4200 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_UID_RESET 0x0
4202 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_UID_GET(value) (((value) & 0x000000ff) >> 0)
4204 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_UID_SET(value) (((value) << 0) & 0x000000ff)
4216 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_FLEXNOCID_LSB 8
4218 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_FLEXNOCID_MSB 31
4220 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_FLEXNOCID_WIDTH 24
4222 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_FLEXNOCID_SET_MSK 0xffffff00
4224 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_FLEXNOCID_CLR_MSK 0x000000ff
4226 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_FLEXNOCID_RESET 0x129ff
4228 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
4230 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
4232 #ifndef __ASSEMBLY__
4243 struct ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_s
4245 const uint32_t USERID : 8;
4246 const uint32_t FLEXNOCID : 24;
4250 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_s ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_t;
4254 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_RESET 0x0129ff00
4256 #define ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_OFST 0x4
4290 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ERREN_LSB 0
4292 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ERREN_MSB 0
4294 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ERREN_WIDTH 1
4296 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ERREN_SET_MSK 0x00000001
4298 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ERREN_CLR_MSK 0xfffffffe
4300 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ERREN_RESET 0x0
4302 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ERREN_GET(value) (((value) & 0x00000001) >> 0)
4304 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ERREN_SET(value) (((value) << 0) & 0x00000001)
4316 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_TRACEEN_LSB 1
4318 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_TRACEEN_MSB 1
4320 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_TRACEEN_WIDTH 1
4322 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_TRACEEN_SET_MSK 0x00000002
4324 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_TRACEEN_CLR_MSK 0xfffffffd
4326 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_TRACEEN_RESET 0x0
4328 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_TRACEEN_GET(value) (((value) & 0x00000002) >> 1)
4330 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_TRACEEN_SET(value) (((value) << 1) & 0x00000002)
4342 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_PAYLDEN_LSB 2
4344 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_PAYLDEN_MSB 2
4346 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_PAYLDEN_WIDTH 1
4348 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_PAYLDEN_SET_MSK 0x00000004
4350 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_PAYLDEN_CLR_MSK 0xfffffffb
4352 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_PAYLDEN_RESET 0x0
4354 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_PAYLDEN_GET(value) (((value) & 0x00000004) >> 2)
4356 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_PAYLDEN_SET(value) (((value) << 2) & 0x00000004)
4370 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATEN_LSB 3
4372 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATEN_MSB 3
4374 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATEN_WIDTH 1
4376 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATEN_SET_MSK 0x00000008
4378 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATEN_CLR_MSK 0xfffffff7
4380 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATEN_RESET 0x0
4382 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATEN_GET(value) (((value) & 0x00000008) >> 3)
4384 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATEN_SET(value) (((value) << 3) & 0x00000008)
4397 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ALARMEN_LSB 4
4399 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ALARMEN_MSB 4
4401 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ALARMEN_WIDTH 1
4403 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ALARMEN_SET_MSK 0x00000010
4405 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ALARMEN_CLR_MSK 0xffffffef
4407 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ALARMEN_RESET 0x0
4409 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ALARMEN_GET(value) (((value) & 0x00000010) >> 4)
4411 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_ALARMEN_SET(value) (((value) << 4) & 0x00000010)
4426 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATCONDDUMP_LSB 5
4428 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATCONDDUMP_MSB 5
4430 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATCONDDUMP_WIDTH 1
4432 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATCONDDUMP_SET_MSK 0x00000020
4434 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATCONDDUMP_CLR_MSK 0xffffffdf
4436 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATCONDDUMP_RESET 0x0
4438 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATCONDDUMP_GET(value) (((value) & 0x00000020) >> 5)
4440 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_STATCONDDUMP_SET(value) (((value) << 5) & 0x00000020)
4453 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_INTRUSIVEMOD_LSB 6
4455 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_INTRUSIVEMOD_MSB 6
4457 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_INTRUSIVEMOD_WIDTH 1
4459 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_INTRUSIVEMOD_SET_MSK 0x00000040
4461 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_INTRUSIVEMOD_CLR_MSK 0xffffffbf
4463 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_INTRUSIVEMOD_RESET 0x0
4465 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_INTRUSIVEMOD_GET(value) (((value) & 0x00000040) >> 6)
4467 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_INTRUSIVEMOD_SET(value) (((value) << 6) & 0x00000040)
4482 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_LSB 7
4484 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_MSB 7
4486 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_WIDTH 1
4488 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET_MSK 0x00000080
4490 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_CLR_MSK 0xffffff7f
4492 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_RESET 0x0
4494 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_GET(value) (((value) & 0x00000080) >> 7)
4496 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET(value) (((value) << 7) & 0x00000080)
4498 #ifndef __ASSEMBLY__
4509 struct ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_s
4512 uint32_t TRACEEN : 1;
4513 uint32_t PAYLOADEN : 1;
4514 uint32_t STATEN : 1;
4515 uint32_t ALARMEN : 1;
4516 uint32_t STATCONDDUMP : 1;
4517 const uint32_t INTRUSIVEMODE : 1;
4518 uint32_t FILTBYTEALWAYSCHAINABLEEN : 1;
4523 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_s ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_t;
4527 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_RESET 0x00000000
4529 #define ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_OFST 0x8
4551 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_GLOBEN_LSB 0
4553 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_GLOBEN_MSB 0
4555 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_GLOBEN_WIDTH 1
4557 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_GLOBEN_SET_MSK 0x00000001
4559 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_GLOBEN_CLR_MSK 0xfffffffe
4561 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_GLOBEN_RESET 0x0
4563 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_GLOBEN_GET(value) (((value) & 0x00000001) >> 0)
4565 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_GLOBEN_SET(value) (((value) << 0) & 0x00000001)
4575 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ACT_LSB 1
4577 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ACT_MSB 1
4579 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ACT_WIDTH 1
4581 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ACT_SET_MSK 0x00000002
4583 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ACT_CLR_MSK 0xfffffffd
4585 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ACT_RESET 0x0
4587 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ACT_GET(value) (((value) & 0x00000002) >> 1)
4589 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_ACT_SET(value) (((value) << 1) & 0x00000002)
4591 #ifndef __ASSEMBLY__
4602 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_s
4604 uint32_t GLOBALEN : 1;
4605 const uint32_t ACTIVE : 1;
4610 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_t;
4614 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_RESET 0x00000000
4616 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_OFST 0xc
4642 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_TRACEPORTSEL_LSB 0
4644 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_TRACEPORTSEL_MSB 0
4646 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_TRACEPORTSEL_WIDTH 1
4648 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_TRACEPORTSEL_SET_MSK 0x00000001
4650 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_TRACEPORTSEL_CLR_MSK 0xfffffffe
4652 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_TRACEPORTSEL_RESET 0x0
4654 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_TRACEPORTSEL_GET(value) (((value) & 0x00000001) >> 0)
4656 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_TRACEPORTSEL_SET(value) (((value) << 0) & 0x00000001)
4658 #ifndef __ASSEMBLY__
4669 struct ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_s
4671 uint32_t TRACEPORTSEL : 1;
4676 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_s ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_t;
4680 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_RESET 0x00000000
4682 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_OFST 0x10
4709 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_FLTLUT_LSB 0
4711 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_FLTLUT_MSB 3
4713 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_FLTLUT_WIDTH 4
4715 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_FLTLUT_SET_MSK 0x0000000f
4717 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_FLTLUT_CLR_MSK 0xfffffff0
4719 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_FLTLUT_RESET 0x0
4721 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_FLTLUT_GET(value) (((value) & 0x0000000f) >> 0)
4723 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_FLTLUT_SET(value) (((value) << 0) & 0x0000000f)
4725 #ifndef __ASSEMBLY__
4736 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_s
4738 uint32_t FILTERLUT : 4;
4743 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_t;
4747 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_RESET 0x00000000
4749 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_OFST 0x14
4777 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_TRACEALARMEN_LSB 0
4779 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_TRACEALARMEN_MSB 2
4781 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_TRACEALARMEN_WIDTH 3
4783 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_TRACEALARMEN_SET_MSK 0x00000007
4785 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_TRACEALARMEN_CLR_MSK 0xfffffff8
4787 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_TRACEALARMEN_RESET 0x0
4789 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_TRACEALARMEN_GET(value) (((value) & 0x00000007) >> 0)
4791 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_TRACEALARMEN_SET(value) (((value) << 0) & 0x00000007)
4793 #ifndef __ASSEMBLY__
4804 struct ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_s
4806 uint32_t TRACEALARMEN : 3;
4811 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_s ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_t;
4815 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_RESET 0x00000000
4817 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_OFST 0x18
4844 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_LSB 0
4846 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_MSB 2
4848 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_WIDTH 3
4850 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_SET_MSK 0x00000007
4852 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_CLR_MSK 0xfffffff8
4854 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_RESET 0x0
4856 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_GET(value) (((value) & 0x00000007) >> 0)
4858 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_SET(value) (((value) << 0) & 0x00000007)
4860 #ifndef __ASSEMBLY__
4871 struct ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_s
4873 const uint32_t TRACEALARMSTATUS : 3;
4878 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_s ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_t;
4882 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_RESET 0x00000000
4884 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_OFST 0x1c
4910 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_TRACEALARMCLR_LSB 0
4912 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_TRACEALARMCLR_MSB 2
4914 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_TRACEALARMCLR_WIDTH 3
4916 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_TRACEALARMCLR_SET_MSK 0x00000007
4918 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_TRACEALARMCLR_CLR_MSK 0xfffffff8
4920 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_TRACEALARMCLR_RESET 0x0
4922 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_TRACEALARMCLR_GET(value) (((value) & 0x00000007) >> 0)
4924 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_TRACEALARMCLR_SET(value) (((value) << 0) & 0x00000007)
4926 #ifndef __ASSEMBLY__
4937 struct ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_s
4939 uint32_t TRACEALARMCLR : 3;
4944 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_s ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_t;
4948 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_RESET 0x00000000
4950 #define ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_OFST 0x20
4980 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_STATPERIOD_LSB 0
4982 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_STATPERIOD_MSB 4
4984 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_STATPERIOD_WIDTH 5
4986 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_STATPERIOD_SET_MSK 0x0000001f
4988 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_STATPERIOD_CLR_MSK 0xffffffe0
4990 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_STATPERIOD_RESET 0x0
4992 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_STATPERIOD_GET(value) (((value) & 0x0000001f) >> 0)
4994 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_STATPERIOD_SET(value) (((value) << 0) & 0x0000001f)
4996 #ifndef __ASSEMBLY__
5007 struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_s
5009 uint32_t STATPERIOD : 5;
5014 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_s ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_t;
5018 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_RESET 0x00000000
5020 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_OFST 0x24
5046 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_STATGO_LSB 0
5048 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_STATGO_MSB 0
5050 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_STATGO_WIDTH 1
5052 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_STATGO_SET_MSK 0x00000001
5054 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_STATGO_CLR_MSK 0xfffffffe
5056 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_STATGO_RESET 0x0
5058 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_STATGO_GET(value) (((value) & 0x00000001) >> 0)
5060 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_STATGO_SET(value) (((value) << 0) & 0x00000001)
5062 #ifndef __ASSEMBLY__
5073 struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_s
5075 uint32_t STATGO : 1;
5080 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_s ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_t;
5084 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_RESET 0x00000000
5086 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_OFST 0x28
5111 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_STATALARMMIN_LSB 0
5113 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_STATALARMMIN_MSB 31
5115 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_STATALARMMIN_WIDTH 32
5117 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_STATALARMMIN_SET_MSK 0xffffffff
5119 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_STATALARMMIN_CLR_MSK 0x00000000
5121 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_STATALARMMIN_RESET 0x0
5123 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_STATALARMMIN_GET(value) (((value) & 0xffffffff) >> 0)
5125 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_STATALARMMIN_SET(value) (((value) << 0) & 0xffffffff)
5127 #ifndef __ASSEMBLY__
5138 struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_s
5140 uint32_t STATALARMMIN : 32;
5144 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_s ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_t;
5148 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_RESET 0x00000000
5150 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_OFST 0x2c
5175 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_STATALARMMAX_LSB 0
5177 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_STATALARMMAX_MSB 31
5179 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_STATALARMMAX_WIDTH 32
5181 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_STATALARMMAX_SET_MSK 0xffffffff
5183 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_STATALARMMAX_CLR_MSK 0x00000000
5185 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_STATALARMMAX_RESET 0x0
5187 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_STATALARMMAX_GET(value) (((value) & 0xffffffff) >> 0)
5189 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_STATALARMMAX_SET(value) (((value) << 0) & 0xffffffff)
5191 #ifndef __ASSEMBLY__
5202 struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_s
5204 uint32_t STATALARMMAX : 32;
5208 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_s ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_t;
5212 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_RESET 0x00000000
5214 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_OFST 0x30
5241 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_STATALARMSTAT_LSB 0
5243 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_STATALARMSTAT_MSB 0
5245 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_STATALARMSTAT_WIDTH 1
5247 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_STATALARMSTAT_SET_MSK 0x00000001
5249 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_STATALARMSTAT_CLR_MSK 0xfffffffe
5251 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_STATALARMSTAT_RESET 0x0
5253 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_STATALARMSTAT_GET(value) (((value) & 0x00000001) >> 0)
5255 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_STATALARMSTAT_SET(value) (((value) << 0) & 0x00000001)
5257 #ifndef __ASSEMBLY__
5268 struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_s
5270 const uint32_t STATALARMSTATUS : 1;
5275 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_s ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_t;
5279 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_RESET 0x00000000
5281 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_OFST 0x34
5307 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_STATALARMCLR_LSB 0
5309 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_STATALARMCLR_MSB 0
5311 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_STATALARMCLR_WIDTH 1
5313 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_STATALARMCLR_SET_MSK 0x00000001
5315 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_STATALARMCLR_CLR_MSK 0xfffffffe
5317 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_STATALARMCLR_RESET 0x0
5319 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_STATALARMCLR_GET(value) (((value) & 0x00000001) >> 0)
5321 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_STATALARMCLR_SET(value) (((value) << 0) & 0x00000001)
5323 #ifndef __ASSEMBLY__
5334 struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_s
5336 uint32_t STATALARMCLR : 1;
5341 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_s ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_t;
5345 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_RESET 0x00000000
5347 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_OFST 0x38
5371 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_STATALARMEN_LSB 0
5373 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_STATALARMEN_MSB 0
5375 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_STATALARMEN_WIDTH 1
5377 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_STATALARMEN_SET_MSK 0x00000001
5379 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_STATALARMEN_CLR_MSK 0xfffffffe
5381 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_STATALARMEN_RESET 0x1
5383 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_STATALARMEN_GET(value) (((value) & 0x00000001) >> 0)
5385 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_STATALARMEN_SET(value) (((value) << 0) & 0x00000001)
5387 #ifndef __ASSEMBLY__
5398 struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_s
5400 uint32_t STATALARMEN : 1;
5405 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_s ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_t;
5409 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_RESET 0x00000001
5411 #define ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_OFST 0x3c
5435 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_LSB 0
5437 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_MSB 18
5439 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_WIDTH 19
5441 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_SET_MSK 0x0007ffff
5443 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_CLR_MSK 0xfff80000
5445 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_RESET 0x0
5447 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_GET(value) (((value) & 0x0007ffff) >> 0)
5449 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_SET(value) (((value) << 0) & 0x0007ffff)
5451 #ifndef __ASSEMBLY__
5462 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_s
5464 uint32_t FILTERS_0_ROUTEIDBASE : 19;
5469 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_t;
5473 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_RESET 0x00000000
5475 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_OFST 0x44
5500 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_LSB 0
5502 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_MSB 18
5504 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_WIDTH 19
5506 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_SET_MSK 0x0007ffff
5508 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_CLR_MSK 0xfff80000
5510 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_RESET 0x0
5512 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_GET(value) (((value) & 0x0007ffff) >> 0)
5514 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_SET(value) (((value) << 0) & 0x0007ffff)
5516 #ifndef __ASSEMBLY__
5527 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_s
5529 uint32_t FILTERS_0_ROUTEIDMASK : 19;
5534 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_t;
5538 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_RESET 0x00000000
5540 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_OFST 0x48
5562 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_LSB 0
5564 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_MSB 31
5566 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_WIDTH 32
5568 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_SET_MSK 0xffffffff
5570 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_CLR_MSK 0x00000000
5572 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_RESET 0x0
5574 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_GET(value) (((value) & 0xffffffff) >> 0)
5576 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_SET(value) (((value) << 0) & 0xffffffff)
5578 #ifndef __ASSEMBLY__
5589 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_s
5591 uint32_t FILTERS_0_ADDRBASE_LOW : 32;
5595 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_t;
5599 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_RESET 0x00000000
5601 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_OFST 0x4c
5628 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_LSB 0
5630 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_MSB 5
5632 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_WIDTH 6
5634 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_SET_MSK 0x0000003f
5636 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_CLR_MSK 0xffffffc0
5638 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_RESET 0x0
5640 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0)
5642 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f)
5644 #ifndef __ASSEMBLY__
5655 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_s
5657 uint32_t FILTERS_0_WINDOWSIZE : 6;
5662 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_t;
5666 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_RESET 0x00000000
5668 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_OFST 0x54
5691 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_LSB 0
5693 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_MSB 2
5695 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_WIDTH 3
5697 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET_MSK 0x00000007
5699 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_CLR_MSK 0xfffffff8
5701 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_RESET 0x0
5703 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_GET(value) (((value) & 0x00000007) >> 0)
5705 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET(value) (((value) << 0) & 0x00000007)
5707 #ifndef __ASSEMBLY__
5718 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_s
5720 uint32_t FILTERS_0_SECURITYBASE : 3;
5725 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_t;
5729 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_RESET 0x00000000
5731 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_OFST 0x58
5756 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_LSB 0
5758 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_MSB 2
5760 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_WIDTH 3
5762 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_SET_MSK 0x00000007
5764 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_CLR_MSK 0xfffffff8
5766 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_RESET 0x0
5768 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_GET(value) (((value) & 0x00000007) >> 0)
5770 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_SET(value) (((value) << 0) & 0x00000007)
5772 #ifndef __ASSEMBLY__
5783 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_s
5785 uint32_t FILTERS_0_SECURITYMASK : 3;
5790 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_t;
5794 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_RESET 0x00000000
5796 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_OFST 0x5c
5824 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RDEN_LSB 0
5826 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RDEN_MSB 0
5828 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RDEN_WIDTH 1
5830 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RDEN_SET_MSK 0x00000001
5832 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RDEN_CLR_MSK 0xfffffffe
5834 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RDEN_RESET 0x0
5836 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RDEN_GET(value) (((value) & 0x00000001) >> 0)
5838 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RDEN_SET(value) (((value) << 0) & 0x00000001)
5849 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_WREN_LSB 1
5851 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_WREN_MSB 1
5853 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_WREN_WIDTH 1
5855 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_WREN_SET_MSK 0x00000002
5857 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_WREN_CLR_MSK 0xfffffffd
5859 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_WREN_RESET 0x0
5861 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_WREN_GET(value) (((value) & 0x00000002) >> 1)
5863 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_WREN_SET(value) (((value) << 1) & 0x00000002)
5874 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_LOCKEN_LSB 2
5876 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_LOCKEN_MSB 2
5878 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_LOCKEN_WIDTH 1
5880 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_LOCKEN_SET_MSK 0x00000004
5882 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_LOCKEN_CLR_MSK 0xfffffffb
5884 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_LOCKEN_RESET 0x0
5886 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_LOCKEN_GET(value) (((value) & 0x00000004) >> 2)
5888 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_LOCKEN_SET(value) (((value) << 2) & 0x00000004)
5899 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_URGEN_LSB 3
5901 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_URGEN_MSB 3
5903 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_URGEN_WIDTH 1
5905 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_URGEN_SET_MSK 0x00000008
5907 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_URGEN_CLR_MSK 0xfffffff7
5909 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_URGEN_RESET 0x0
5911 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_URGEN_GET(value) (((value) & 0x00000008) >> 3)
5913 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_URGEN_SET(value) (((value) << 3) & 0x00000008)
5915 #ifndef __ASSEMBLY__
5926 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_s
5930 uint32_t LOCKEN : 1;
5936 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_t;
5940 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_RESET 0x00000000
5942 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_OFST 0x60
5968 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_REQEN_LSB 0
5970 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_REQEN_MSB 0
5972 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_REQEN_WIDTH 1
5974 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_REQEN_SET_MSK 0x00000001
5976 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_REQEN_CLR_MSK 0xfffffffe
5978 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_REQEN_RESET 0x0
5980 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_REQEN_GET(value) (((value) & 0x00000001) >> 0)
5982 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_REQEN_SET(value) (((value) << 0) & 0x00000001)
5993 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RSPEN_LSB 1
5995 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RSPEN_MSB 1
5997 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RSPEN_WIDTH 1
5999 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RSPEN_SET_MSK 0x00000002
6001 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RSPEN_CLR_MSK 0xfffffffd
6003 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RSPEN_RESET 0x0
6005 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RSPEN_GET(value) (((value) & 0x00000002) >> 1)
6007 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RSPEN_SET(value) (((value) << 1) & 0x00000002)
6009 #ifndef __ASSEMBLY__
6020 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_s
6028 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_t;
6032 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_RESET 0x00000000
6034 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_OFST 0x64
6058 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_FLTS_0_LEN_LSB 0
6060 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_FLTS_0_LEN_MSB 3
6062 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_FLTS_0_LEN_WIDTH 4
6064 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_FLTS_0_LEN_SET_MSK 0x0000000f
6066 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_FLTS_0_LEN_CLR_MSK 0xfffffff0
6068 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_FLTS_0_LEN_RESET 0x0
6070 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_FLTS_0_LEN_GET(value) (((value) & 0x0000000f) >> 0)
6072 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_FLTS_0_LEN_SET(value) (((value) << 0) & 0x0000000f)
6074 #ifndef __ASSEMBLY__
6085 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_s
6087 uint32_t FILTERS_0_LENGTH : 4;
6092 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_t;
6096 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_RESET 0x00000000
6098 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_OFST 0x68
6123 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_LSB 0
6125 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_MSB 1
6127 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_WIDTH 2
6129 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_SET_MSK 0x00000003
6131 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_CLR_MSK 0xfffffffc
6133 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_RESET 0x0
6135 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_GET(value) (((value) & 0x00000003) >> 0)
6137 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_SET(value) (((value) << 0) & 0x00000003)
6139 #ifndef __ASSEMBLY__
6150 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_s
6152 uint32_t FILTERS_0_URGENCY : 2;
6157 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_t;
6161 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_RESET 0x00000000
6163 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_OFST 0x6c
6187 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_LSB 0
6189 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_MSB 18
6191 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_WIDTH 19
6193 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_SET_MSK 0x0007ffff
6195 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_CLR_MSK 0xfff80000
6197 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_RESET 0x0
6199 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_GET(value) (((value) & 0x0007ffff) >> 0)
6201 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_FLTS_1_ROUTEIDBASE_SET(value) (((value) << 0) & 0x0007ffff)
6203 #ifndef __ASSEMBLY__
6214 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_s
6216 uint32_t FILTERS_1_ROUTEIDBASE : 19;
6221 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_t;
6225 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_RESET 0x00000000
6227 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_OFST 0x80
6252 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_LSB 0
6254 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_MSB 18
6256 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_WIDTH 19
6258 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_SET_MSK 0x0007ffff
6260 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_CLR_MSK 0xfff80000
6262 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_RESET 0x0
6264 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_GET(value) (((value) & 0x0007ffff) >> 0)
6266 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_FLTS_1_ROUTEIDMSK_SET(value) (((value) << 0) & 0x0007ffff)
6268 #ifndef __ASSEMBLY__
6279 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_s
6281 uint32_t FILTERS_1_ROUTEIDMASK : 19;
6286 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_t;
6290 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_RESET 0x00000000
6292 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_OFST 0x84
6314 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_LSB 0
6316 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_MSB 31
6318 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_WIDTH 32
6320 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_SET_MSK 0xffffffff
6322 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_CLR_MSK 0x00000000
6324 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_RESET 0x0
6326 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_GET(value) (((value) & 0xffffffff) >> 0)
6328 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_FLTS_1_ADDRBASE_LOW_SET(value) (((value) << 0) & 0xffffffff)
6330 #ifndef __ASSEMBLY__
6341 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_s
6343 uint32_t FILTERS_1_ADDRBASE_LOW : 32;
6347 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_t;
6351 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_RESET 0x00000000
6353 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_OFST 0x88
6380 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_LSB 0
6382 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_MSB 5
6384 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_WIDTH 6
6386 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_SET_MSK 0x0000003f
6388 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_CLR_MSK 0xffffffc0
6390 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_RESET 0x0
6392 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0)
6394 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_FLTS_1_WINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f)
6396 #ifndef __ASSEMBLY__
6407 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_s
6409 uint32_t FILTERS_1_WINDOWSIZE : 6;
6414 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_t;
6418 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_RESET 0x00000000
6420 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_OFST 0x90
6443 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_LSB 0
6445 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_MSB 2
6447 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_WIDTH 3
6449 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_SET_MSK 0x00000007
6451 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_CLR_MSK 0xfffffff8
6453 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_RESET 0x0
6455 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_GET(value) (((value) & 0x00000007) >> 0)
6457 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_FLTS_1_SECURITYBASE_SET(value) (((value) << 0) & 0x00000007)
6459 #ifndef __ASSEMBLY__
6470 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_s
6472 uint32_t FILTERS_1_SECURITYBASE : 3;
6477 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_t;
6481 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_RESET 0x00000000
6483 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_OFST 0x94
6508 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_LSB 0
6510 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_MSB 2
6512 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_WIDTH 3
6514 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_SET_MSK 0x00000007
6516 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_CLR_MSK 0xfffffff8
6518 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_RESET 0x0
6520 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_GET(value) (((value) & 0x00000007) >> 0)
6522 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_FLTS_1_SECURITYMSK_SET(value) (((value) << 0) & 0x00000007)
6524 #ifndef __ASSEMBLY__
6535 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_s
6537 uint32_t FILTERS_1_SECURITYMASK : 3;
6542 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_t;
6546 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_RESET 0x00000000
6548 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_OFST 0x98
6576 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RDEN_LSB 0
6578 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RDEN_MSB 0
6580 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RDEN_WIDTH 1
6582 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RDEN_SET_MSK 0x00000001
6584 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RDEN_CLR_MSK 0xfffffffe
6586 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RDEN_RESET 0x0
6588 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RDEN_GET(value) (((value) & 0x00000001) >> 0)
6590 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RDEN_SET(value) (((value) << 0) & 0x00000001)
6601 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_WREN_LSB 1
6603 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_WREN_MSB 1
6605 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_WREN_WIDTH 1
6607 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_WREN_SET_MSK 0x00000002
6609 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_WREN_CLR_MSK 0xfffffffd
6611 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_WREN_RESET 0x0
6613 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_WREN_GET(value) (((value) & 0x00000002) >> 1)
6615 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_WREN_SET(value) (((value) << 1) & 0x00000002)
6626 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_LOCKEN_LSB 2
6628 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_LOCKEN_MSB 2
6630 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_LOCKEN_WIDTH 1
6632 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_LOCKEN_SET_MSK 0x00000004
6634 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_LOCKEN_CLR_MSK 0xfffffffb
6636 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_LOCKEN_RESET 0x0
6638 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_LOCKEN_GET(value) (((value) & 0x00000004) >> 2)
6640 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_LOCKEN_SET(value) (((value) << 2) & 0x00000004)
6651 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_URGEN_LSB 3
6653 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_URGEN_MSB 3
6655 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_URGEN_WIDTH 1
6657 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_URGEN_SET_MSK 0x00000008
6659 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_URGEN_CLR_MSK 0xfffffff7
6661 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_URGEN_RESET 0x0
6663 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_URGEN_GET(value) (((value) & 0x00000008) >> 3)
6665 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_URGEN_SET(value) (((value) << 3) & 0x00000008)
6667 #ifndef __ASSEMBLY__
6678 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_s
6682 uint32_t LOCKEN : 1;
6688 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_t;
6692 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_RESET 0x00000000
6694 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_OFST 0x9c
6720 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_REQEN_LSB 0
6722 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_REQEN_MSB 0
6724 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_REQEN_WIDTH 1
6726 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_REQEN_SET_MSK 0x00000001
6728 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_REQEN_CLR_MSK 0xfffffffe
6730 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_REQEN_RESET 0x0
6732 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_REQEN_GET(value) (((value) & 0x00000001) >> 0)
6734 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_REQEN_SET(value) (((value) << 0) & 0x00000001)
6745 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RSPEN_LSB 1
6747 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RSPEN_MSB 1
6749 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RSPEN_WIDTH 1
6751 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RSPEN_SET_MSK 0x00000002
6753 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RSPEN_CLR_MSK 0xfffffffd
6755 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RSPEN_RESET 0x0
6757 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RSPEN_GET(value) (((value) & 0x00000002) >> 1)
6759 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RSPEN_SET(value) (((value) << 1) & 0x00000002)
6761 #ifndef __ASSEMBLY__
6772 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_s
6780 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_t;
6784 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_RESET 0x00000000
6786 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_OFST 0xa0
6810 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_FLTS_1_LEN_LSB 0
6812 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_FLTS_1_LEN_MSB 3
6814 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_FLTS_1_LEN_WIDTH 4
6816 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_FLTS_1_LEN_SET_MSK 0x0000000f
6818 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_FLTS_1_LEN_CLR_MSK 0xfffffff0
6820 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_FLTS_1_LEN_RESET 0x0
6822 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_FLTS_1_LEN_GET(value) (((value) & 0x0000000f) >> 0)
6824 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_FLTS_1_LEN_SET(value) (((value) << 0) & 0x0000000f)
6826 #ifndef __ASSEMBLY__
6837 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_s
6839 uint32_t FILTERS_1_LENGTH : 4;
6844 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_t;
6848 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_RESET 0x00000000
6850 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_OFST 0xa4
6875 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_LSB 0
6877 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_MSB 1
6879 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_WIDTH 2
6881 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_SET_MSK 0x00000003
6883 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_CLR_MSK 0xfffffffc
6885 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_RESET 0x0
6887 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_GET(value) (((value) & 0x00000003) >> 0)
6889 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_FLTS_1_URGENCY_SET(value) (((value) << 0) & 0x00000003)
6891 #ifndef __ASSEMBLY__
6902 struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_s
6904 uint32_t FILTERS_1_URGENCY : 2;
6909 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_s ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_t;
6913 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_RESET 0x00000000
6915 #define ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_OFST 0xa8
6940 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_LSB 0
6942 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_MSB 0
6944 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_WIDTH 1
6946 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_SET_MSK 0x00000001
6948 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_CLR_MSK 0xfffffffe
6950 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_RESET 0x0
6952 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_GET(value) (((value) & 0x00000001) >> 0)
6954 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_CNTRS_0_PORTSEL_SET(value) (((value) << 0) & 0x00000001)
6956 #ifndef __ASSEMBLY__
6967 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_s
6969 uint32_t COUNTERS_0_PORTSEL : 1;
6974 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_t;
6978 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_RESET 0x00000000
6980 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_OFST 0x134
7007 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_INTEVENT_LSB 0
7009 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_INTEVENT_MSB 4
7011 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_INTEVENT_WIDTH 5
7013 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_INTEVENT_SET_MSK 0x0000001f
7015 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_INTEVENT_CLR_MSK 0xffffffe0
7017 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_INTEVENT_RESET 0x0
7019 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
7021 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
7033 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_EXTEVENT_LSB 5
7035 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_EXTEVENT_MSB 5
7037 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_EXTEVENT_WIDTH 1
7039 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_EXTEVENT_SET_MSK 0x00000020
7041 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_EXTEVENT_CLR_MSK 0xffffffdf
7043 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_EXTEVENT_RESET 0x0
7045 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_EXTEVENT_GET(value) (((value) & 0x00000020) >> 5)
7047 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_EXTEVENT_SET(value) (((value) << 5) & 0x00000020)
7049 #ifndef __ASSEMBLY__
7060 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_s
7062 uint32_t INTEVENT : 5;
7063 uint32_t EXTEVENT : 1;
7068 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_t;
7072 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_RESET 0x00000000
7074 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_OFST 0x138
7099 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_LSB 0
7101 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_MSB 1
7103 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_WIDTH 2
7105 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_SET_MSK 0x00000003
7107 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_CLR_MSK 0xfffffffc
7109 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_RESET 0x0
7111 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
7113 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
7115 #ifndef __ASSEMBLY__
7126 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_s
7128 uint32_t COUNTERS_0_ALARMMODE : 2;
7133 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_t;
7137 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_RESET 0x00000000
7139 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_OFST 0x13c
7164 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_LSB 0
7166 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_MSB 15
7168 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_WIDTH 16
7170 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_SET_MSK 0x0000ffff
7172 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_CLR_MSK 0xffff0000
7174 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_RESET 0x0
7176 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
7178 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_SET(value) (((value) << 0) & 0x0000ffff)
7180 #ifndef __ASSEMBLY__
7191 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_s
7193 const uint32_t COUNTERS_0_VAL : 16;
7198 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_t;
7202 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_RESET 0x00000000
7204 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_OFST 0x140
7229 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_LSB 0
7231 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_MSB 0
7233 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_WIDTH 1
7235 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_SET_MSK 0x00000001
7237 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_CLR_MSK 0xfffffffe
7239 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_RESET 0x0
7241 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_GET(value) (((value) & 0x00000001) >> 0)
7243 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_CNTRS_1_PORTSEL_SET(value) (((value) << 0) & 0x00000001)
7245 #ifndef __ASSEMBLY__
7256 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_s
7258 uint32_t COUNTERS_1_PORTSEL : 1;
7263 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_t;
7267 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_RESET 0x00000000
7269 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_OFST 0x148
7296 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_INTEVENT_LSB 0
7298 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_INTEVENT_MSB 4
7300 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_INTEVENT_WIDTH 5
7302 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_INTEVENT_SET_MSK 0x0000001f
7304 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_INTEVENT_CLR_MSK 0xffffffe0
7306 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_INTEVENT_RESET 0x0
7308 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
7310 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
7322 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_EXTEVENT_LSB 5
7324 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_EXTEVENT_MSB 5
7326 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_EXTEVENT_WIDTH 1
7328 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_EXTEVENT_SET_MSK 0x00000020
7330 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_EXTEVENT_CLR_MSK 0xffffffdf
7332 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_EXTEVENT_RESET 0x0
7334 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_EXTEVENT_GET(value) (((value) & 0x00000020) >> 5)
7336 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_EXTEVENT_SET(value) (((value) << 5) & 0x00000020)
7338 #ifndef __ASSEMBLY__
7349 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_s
7351 uint32_t INTEVENT : 5;
7352 uint32_t EXTEVENT : 1;
7357 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_t;
7361 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_RESET 0x00000000
7363 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_OFST 0x14c
7388 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_LSB 0
7390 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_MSB 1
7392 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_WIDTH 2
7394 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_SET_MSK 0x00000003
7396 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_CLR_MSK 0xfffffffc
7398 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_RESET 0x0
7400 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
7402 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
7404 #ifndef __ASSEMBLY__
7415 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_s
7417 uint32_t COUNTERS_1_ALARMMODE : 2;
7422 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_t;
7426 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_RESET 0x00000000
7428 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_OFST 0x150
7453 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_LSB 0
7455 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_MSB 15
7457 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_WIDTH 16
7459 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_SET_MSK 0x0000ffff
7461 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_CLR_MSK 0xffff0000
7463 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_RESET 0x0
7465 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
7467 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_SET(value) (((value) << 0) & 0x0000ffff)
7469 #ifndef __ASSEMBLY__
7480 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_s
7482 const uint32_t COUNTERS_1_VAL : 16;
7487 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_t;
7491 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_RESET 0x00000000
7493 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_OFST 0x154
7518 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_LSB 0
7520 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_MSB 0
7522 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_WIDTH 1
7524 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_SET_MSK 0x00000001
7526 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_CLR_MSK 0xfffffffe
7528 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_RESET 0x0
7530 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_GET(value) (((value) & 0x00000001) >> 0)
7532 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_CNTRS_2_PORTSEL_SET(value) (((value) << 0) & 0x00000001)
7534 #ifndef __ASSEMBLY__
7545 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_s
7547 uint32_t COUNTERS_2_PORTSEL : 1;
7552 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_t;
7556 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_RESET 0x00000000
7558 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_OFST 0x15c
7585 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_INTEVENT_LSB 0
7587 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_INTEVENT_MSB 4
7589 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_INTEVENT_WIDTH 5
7591 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_INTEVENT_SET_MSK 0x0000001f
7593 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_INTEVENT_CLR_MSK 0xffffffe0
7595 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_INTEVENT_RESET 0x0
7597 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
7599 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
7611 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_EXTEVENT_LSB 5
7613 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_EXTEVENT_MSB 5
7615 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_EXTEVENT_WIDTH 1
7617 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_EXTEVENT_SET_MSK 0x00000020
7619 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_EXTEVENT_CLR_MSK 0xffffffdf
7621 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_EXTEVENT_RESET 0x0
7623 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_EXTEVENT_GET(value) (((value) & 0x00000020) >> 5)
7625 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_EXTEVENT_SET(value) (((value) << 5) & 0x00000020)
7627 #ifndef __ASSEMBLY__
7638 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_s
7640 uint32_t INTEVENT : 5;
7641 uint32_t EXTEVENT : 1;
7646 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_t;
7650 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_RESET 0x00000000
7652 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_OFST 0x160
7677 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_LSB 0
7679 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_MSB 1
7681 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_WIDTH 2
7683 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_SET_MSK 0x00000003
7685 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_CLR_MSK 0xfffffffc
7687 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_RESET 0x0
7689 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
7691 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
7693 #ifndef __ASSEMBLY__
7704 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_s
7706 uint32_t COUNTERS_2_ALARMMODE : 2;
7711 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_t;
7715 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_RESET 0x00000000
7717 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_OFST 0x164
7742 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_LSB 0
7744 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_MSB 15
7746 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_WIDTH 16
7748 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_SET_MSK 0x0000ffff
7750 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_CLR_MSK 0xffff0000
7752 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_RESET 0x0
7754 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
7756 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_SET(value) (((value) << 0) & 0x0000ffff)
7758 #ifndef __ASSEMBLY__
7769 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_s
7771 const uint32_t COUNTERS_2_VAL : 16;
7776 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_t;
7780 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_RESET 0x00000000
7782 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_OFST 0x168
7807 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_LSB 0
7809 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_MSB 0
7811 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_WIDTH 1
7813 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_SET_MSK 0x00000001
7815 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_CLR_MSK 0xfffffffe
7817 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_RESET 0x0
7819 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_GET(value) (((value) & 0x00000001) >> 0)
7821 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_CNTRS_3_PORTSEL_SET(value) (((value) << 0) & 0x00000001)
7823 #ifndef __ASSEMBLY__
7834 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_s
7836 uint32_t COUNTERS_3_PORTSEL : 1;
7841 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_t;
7845 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_RESET 0x00000000
7847 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_OFST 0x170
7874 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_INTEVENT_LSB 0
7876 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_INTEVENT_MSB 4
7878 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_INTEVENT_WIDTH 5
7880 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_INTEVENT_SET_MSK 0x0000001f
7882 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_INTEVENT_CLR_MSK 0xffffffe0
7884 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_INTEVENT_RESET 0x0
7886 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
7888 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
7900 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_EXTEVENT_LSB 5
7902 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_EXTEVENT_MSB 5
7904 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_EXTEVENT_WIDTH 1
7906 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_EXTEVENT_SET_MSK 0x00000020
7908 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_EXTEVENT_CLR_MSK 0xffffffdf
7910 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_EXTEVENT_RESET 0x0
7912 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_EXTEVENT_GET(value) (((value) & 0x00000020) >> 5)
7914 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_EXTEVENT_SET(value) (((value) << 5) & 0x00000020)
7916 #ifndef __ASSEMBLY__
7927 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_s
7929 uint32_t INTEVENT : 5;
7930 uint32_t EXTEVENT : 1;
7935 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_t;
7939 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_RESET 0x00000000
7941 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_OFST 0x174
7966 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_LSB 0
7968 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_MSB 1
7970 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_WIDTH 2
7972 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_SET_MSK 0x00000003
7974 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_CLR_MSK 0xfffffffc
7976 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_RESET 0x0
7978 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
7980 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
7982 #ifndef __ASSEMBLY__
7993 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_s
7995 uint32_t COUNTERS_3_ALARMMODE : 2;
8000 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_t;
8004 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_RESET 0x00000000
8006 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_OFST 0x178
8031 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_LSB 0
8033 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_MSB 15
8035 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_WIDTH 16
8037 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_SET_MSK 0x0000ffff
8039 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_CLR_MSK 0xffff0000
8041 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_RESET 0x0
8043 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
8045 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_SET(value) (((value) << 0) & 0x0000ffff)
8047 #ifndef __ASSEMBLY__
8058 struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_s
8060 const uint32_t COUNTERS_3_VAL : 16;
8065 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_s ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_t;
8069 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_RESET 0x00000000
8071 #define ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_OFST 0x17c
8073 #ifndef __ASSEMBLY__
8084 struct ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_s
8086 ALT_NOC_MPU_PRB_EMACS_MAIN_COREID_t Probe_emacs_main_Probe_Id_CoreId;
8087 ALT_NOC_MPU_PRB_EMACS_MAIN_REVID_t Probe_emacs_main_Probe_Id_RevisionId;
8088 ALT_NOC_MPU_PRB_EMACS_MAIN_MAINCTL_t Probe_emacs_main_Probe_MainCtl;
8089 ALT_NOC_MPU_PRB_EMACS_MAIN_CFGCTL_t Probe_emacs_main_Probe_CfgCtl;
8090 ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEPORTSEL_t Probe_emacs_main_Probe_TracePortSel;
8091 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTLUT_t Probe_emacs_main_Probe_FilterLut;
8092 ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMEN_t Probe_emacs_main_Probe_TraceAlarmEn;
8093 ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMSTAT_t Probe_emacs_main_Probe_TraceAlarmStatus;
8094 ALT_NOC_MPU_PRB_EMACS_MAIN_TRACEALARMCLR_t Probe_emacs_main_Probe_TraceAlarmClr;
8095 ALT_NOC_MPU_PRB_EMACS_MAIN_STATPERIOD_t Probe_emacs_main_Probe_StatPeriod;
8096 ALT_NOC_MPU_PRB_EMACS_MAIN_STATGO_t Probe_emacs_main_Probe_StatGo;
8097 ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMIN_t Probe_emacs_main_Probe_StatAlarmMin;
8098 ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMMAX_t Probe_emacs_main_Probe_StatAlarmMax;
8099 ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMSTAT_t Probe_emacs_main_Probe_StatAlarmStatus;
8100 ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMCLR_t Probe_emacs_main_Probe_StatAlarmClr;
8101 ALT_NOC_MPU_PRB_EMACS_MAIN_STATALARMEN_t Probe_emacs_main_Probe_StatAlarmEn;
8102 volatile uint32_t _pad_0x40_0x43;
8103 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDBASE_t Probe_emacs_main_Probe_Filters_0_RouteIdBase;
8104 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ROUTEIDMSK_t Probe_emacs_main_Probe_Filters_0_RouteIdMask;
8105 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_ADDRBASE_LOW_t Probe_emacs_main_Probe_Filters_0_AddrBase_Low;
8106 volatile uint32_t _pad_0x50_0x53;
8107 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_WINDOWSIZE_t Probe_emacs_main_Probe_Filters_0_WindowSize;
8108 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYBASE_t Probe_emacs_main_Probe_Filters_0_SecurityBase;
8109 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_SECURITYMSK_t Probe_emacs_main_Probe_Filters_0_SecurityMask;
8110 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_OPCODE_t Probe_emacs_main_Probe_Filters_0_Opcode;
8111 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_STAT_t Probe_emacs_main_Probe_Filters_0_Status;
8112 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_LEN_t Probe_emacs_main_Probe_Filters_0_Length;
8113 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_0_URGENCY_t Probe_emacs_main_Probe_Filters_0_Urgency;
8114 volatile uint32_t _pad_0x70_0x7f[4];
8115 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDBASE_t Probe_emacs_main_Probe_Filters_1_RouteIdBase;
8116 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ROUTEIDMSK_t Probe_emacs_main_Probe_Filters_1_RouteIdMask;
8117 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_ADDRBASE_LOW_t Probe_emacs_main_Probe_Filters_1_AddrBase_Low;
8118 volatile uint32_t _pad_0x8c_0x8f;
8119 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_WINDOWSIZE_t Probe_emacs_main_Probe_Filters_1_WindowSize;
8120 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYBASE_t Probe_emacs_main_Probe_Filters_1_SecurityBase;
8121 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_SECURITYMSK_t Probe_emacs_main_Probe_Filters_1_SecurityMask;
8122 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_OPCODE_t Probe_emacs_main_Probe_Filters_1_Opcode;
8123 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_STAT_t Probe_emacs_main_Probe_Filters_1_Status;
8124 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_LEN_t Probe_emacs_main_Probe_Filters_1_Length;
8125 ALT_NOC_MPU_PRB_EMACS_MAIN_FLTS_1_URGENCY_t Probe_emacs_main_Probe_Filters_1_Urgency;
8126 volatile uint32_t _pad_0xac_0x133[34];
8127 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_PORTSEL_t Probe_emacs_main_Probe_Counters_0_PortSel;
8128 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_SRC_t Probe_emacs_main_Probe_Counters_0_Src;
8129 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_ALARMMOD_t Probe_emacs_main_Probe_Counters_0_AlarmMode;
8130 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_0_VAL_t Probe_emacs_main_Probe_Counters_0_Val;
8131 volatile uint32_t _pad_0x144_0x147;
8132 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_PORTSEL_t Probe_emacs_main_Probe_Counters_1_PortSel;
8133 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_SRC_t Probe_emacs_main_Probe_Counters_1_Src;
8134 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_ALARMMOD_t Probe_emacs_main_Probe_Counters_1_AlarmMode;
8135 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_1_VAL_t Probe_emacs_main_Probe_Counters_1_Val;
8136 volatile uint32_t _pad_0x158_0x15b;
8137 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_PORTSEL_t Probe_emacs_main_Probe_Counters_2_PortSel;
8138 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_SRC_t Probe_emacs_main_Probe_Counters_2_Src;
8139 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_ALARMMOD_t Probe_emacs_main_Probe_Counters_2_AlarmMode;
8140 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_2_VAL_t Probe_emacs_main_Probe_Counters_2_Val;
8141 volatile uint32_t _pad_0x16c_0x16f;
8142 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_PORTSEL_t Probe_emacs_main_Probe_Counters_3_PortSel;
8143 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_SRC_t Probe_emacs_main_Probe_Counters_3_Src;
8144 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_ALARMMOD_t Probe_emacs_main_Probe_Counters_3_AlarmMode;
8145 ALT_NOC_MPU_PRB_EMACS_MAIN_CNTRS_3_VAL_t Probe_emacs_main_Probe_Counters_3_Val;
8146 volatile uint32_t _pad_0x180_0x400[160];
8150 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_s ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_t;
8152 struct ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_raw_s
8154 volatile uint32_t Probe_emacs_main_Probe_Id_CoreId;
8155 volatile uint32_t Probe_emacs_main_Probe_Id_RevisionId;
8156 volatile uint32_t Probe_emacs_main_Probe_MainCtl;
8157 volatile uint32_t Probe_emacs_main_Probe_CfgCtl;
8158 volatile uint32_t Probe_emacs_main_Probe_TracePortSel;
8159 volatile uint32_t Probe_emacs_main_Probe_FilterLut;
8160 volatile uint32_t Probe_emacs_main_Probe_TraceAlarmEn;
8161 volatile uint32_t Probe_emacs_main_Probe_TraceAlarmStatus;
8162 volatile uint32_t Probe_emacs_main_Probe_TraceAlarmClr;
8163 volatile uint32_t Probe_emacs_main_Probe_StatPeriod;
8164 volatile uint32_t Probe_emacs_main_Probe_StatGo;
8165 volatile uint32_t Probe_emacs_main_Probe_StatAlarmMin;
8166 volatile uint32_t Probe_emacs_main_Probe_StatAlarmMax;
8167 volatile uint32_t Probe_emacs_main_Probe_StatAlarmStatus;
8168 volatile uint32_t Probe_emacs_main_Probe_StatAlarmClr;
8169 volatile uint32_t Probe_emacs_main_Probe_StatAlarmEn;
8170 uint32_t _pad_0x40_0x43;
8171 volatile uint32_t Probe_emacs_main_Probe_Filters_0_RouteIdBase;
8172 volatile uint32_t Probe_emacs_main_Probe_Filters_0_RouteIdMask;
8173 volatile uint32_t Probe_emacs_main_Probe_Filters_0_AddrBase_Low;
8174 uint32_t _pad_0x50_0x53;
8175 volatile uint32_t Probe_emacs_main_Probe_Filters_0_WindowSize;
8176 volatile uint32_t Probe_emacs_main_Probe_Filters_0_SecurityBase;
8177 volatile uint32_t Probe_emacs_main_Probe_Filters_0_SecurityMask;
8178 volatile uint32_t Probe_emacs_main_Probe_Filters_0_Opcode;
8179 volatile uint32_t Probe_emacs_main_Probe_Filters_0_Status;
8180 volatile uint32_t Probe_emacs_main_Probe_Filters_0_Length;
8181 volatile uint32_t Probe_emacs_main_Probe_Filters_0_Urgency;
8182 uint32_t _pad_0x70_0x7f[4];
8183 volatile uint32_t Probe_emacs_main_Probe_Filters_1_RouteIdBase;
8184 volatile uint32_t Probe_emacs_main_Probe_Filters_1_RouteIdMask;
8185 volatile uint32_t Probe_emacs_main_Probe_Filters_1_AddrBase_Low;
8186 uint32_t _pad_0x8c_0x8f;
8187 volatile uint32_t Probe_emacs_main_Probe_Filters_1_WindowSize;
8188 volatile uint32_t Probe_emacs_main_Probe_Filters_1_SecurityBase;
8189 volatile uint32_t Probe_emacs_main_Probe_Filters_1_SecurityMask;
8190 volatile uint32_t Probe_emacs_main_Probe_Filters_1_Opcode;
8191 volatile uint32_t Probe_emacs_main_Probe_Filters_1_Status;
8192 volatile uint32_t Probe_emacs_main_Probe_Filters_1_Length;
8193 volatile uint32_t Probe_emacs_main_Probe_Filters_1_Urgency;
8194 uint32_t _pad_0xac_0x133[34];
8195 volatile uint32_t Probe_emacs_main_Probe_Counters_0_PortSel;
8196 volatile uint32_t Probe_emacs_main_Probe_Counters_0_Src;
8197 volatile uint32_t Probe_emacs_main_Probe_Counters_0_AlarmMode;
8198 volatile uint32_t Probe_emacs_main_Probe_Counters_0_Val;
8199 uint32_t _pad_0x144_0x147;
8200 volatile uint32_t Probe_emacs_main_Probe_Counters_1_PortSel;
8201 volatile uint32_t Probe_emacs_main_Probe_Counters_1_Src;
8202 volatile uint32_t Probe_emacs_main_Probe_Counters_1_AlarmMode;
8203 volatile uint32_t Probe_emacs_main_Probe_Counters_1_Val;
8204 uint32_t _pad_0x158_0x15b;
8205 volatile uint32_t Probe_emacs_main_Probe_Counters_2_PortSel;
8206 volatile uint32_t Probe_emacs_main_Probe_Counters_2_Src;
8207 volatile uint32_t Probe_emacs_main_Probe_Counters_2_AlarmMode;
8208 volatile uint32_t Probe_emacs_main_Probe_Counters_2_Val;
8209 uint32_t _pad_0x16c_0x16f;
8210 volatile uint32_t Probe_emacs_main_Probe_Counters_3_PortSel;
8211 volatile uint32_t Probe_emacs_main_Probe_Counters_3_Src;
8212 volatile uint32_t Probe_emacs_main_Probe_Counters_3_AlarmMode;
8213 volatile uint32_t Probe_emacs_main_Probe_Counters_3_Val;
8214 uint32_t _pad_0x180_0x400[160];
8218 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_raw_s ALT_NOC_MPU_PRB_EMACS_MAIN_PRB_raw_t;
8246 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_TYPEID_LSB 0
8248 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_TYPEID_MSB 7
8250 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_TYPEID_WIDTH 8
8252 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_TYPEID_SET_MSK 0x000000ff
8254 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_TYPEID_CLR_MSK 0xffffff00
8256 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_TYPEID_RESET 0xa
8258 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0)
8260 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff)
8271 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_CHECKSUM_LSB 8
8273 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_CHECKSUM_MSB 31
8275 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_CHECKSUM_WIDTH 24
8277 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_CHECKSUM_SET_MSK 0xffffff00
8279 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_CHECKSUM_CLR_MSK 0x000000ff
8281 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_CHECKSUM_RESET 0xa6b796
8283 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
8285 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
8287 #ifndef __ASSEMBLY__
8298 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_s
8300 const uint32_t CORETYPEID : 8;
8301 const uint32_t CORECHECKSUM : 24;
8305 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_t;
8309 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_RESET 0xa6b7960a
8311 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_OFST 0x0
8333 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_UID_LSB 0
8335 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_UID_MSB 7
8337 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_UID_WIDTH 8
8339 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_UID_SET_MSK 0x000000ff
8341 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_UID_CLR_MSK 0xffffff00
8343 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_UID_RESET 0x0
8345 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_UID_GET(value) (((value) & 0x000000ff) >> 0)
8347 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_UID_SET(value) (((value) << 0) & 0x000000ff)
8359 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_FLEXNOCID_LSB 8
8361 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_FLEXNOCID_MSB 31
8363 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_FLEXNOCID_WIDTH 24
8365 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_FLEXNOCID_SET_MSK 0xffffff00
8367 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_FLEXNOCID_CLR_MSK 0x000000ff
8369 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_FLEXNOCID_RESET 0x129ff
8371 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
8373 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
8375 #ifndef __ASSEMBLY__
8386 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_s
8388 const uint32_t USERID : 8;
8389 const uint32_t FLEXNOCID : 24;
8393 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_t;
8397 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_RESET 0x0129ff00
8399 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_OFST 0x4
8422 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_EN_LSB 0
8424 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_EN_MSB 0
8426 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_EN_WIDTH 1
8428 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_EN_SET_MSK 0x00000001
8430 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_EN_CLR_MSK 0xfffffffe
8432 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_EN_RESET 0x0
8434 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_EN_GET(value) (((value) & 0x00000001) >> 0)
8436 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_EN_SET(value) (((value) << 0) & 0x00000001)
8438 #ifndef __ASSEMBLY__
8449 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_s
8456 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_t;
8460 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_RESET 0x00000000
8462 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_OFST 0x8
8486 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_MOD_LSB 0
8488 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_MOD_MSB 0
8490 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_MOD_WIDTH 1
8492 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_MOD_SET_MSK 0x00000001
8494 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_MOD_CLR_MSK 0xfffffffe
8496 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_MOD_RESET 0x0
8498 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_MOD_GET(value) (((value) & 0x00000001) >> 0)
8500 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_MOD_SET(value) (((value) << 0) & 0x00000001)
8502 #ifndef __ASSEMBLY__
8513 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_s
8520 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_t;
8524 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_RESET 0x00000000
8526 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_OFST 0xc
8550 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_THRESHOLDS_0_0_LSB 0
8552 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_THRESHOLDS_0_0_MSB 1
8554 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_THRESHOLDS_0_0_WIDTH 2
8556 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_THRESHOLDS_0_0_SET_MSK 0x00000003
8558 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_THRESHOLDS_0_0_CLR_MSK 0xfffffffc
8560 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_THRESHOLDS_0_0_RESET 0x0
8562 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_THRESHOLDS_0_0_GET(value) (((value) & 0x00000003) >> 0)
8564 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_THRESHOLDS_0_0_SET(value) (((value) << 0) & 0x00000003)
8566 #ifndef __ASSEMBLY__
8577 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_s
8579 uint32_t THRESHOLDS_0_0 : 2;
8584 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_t;
8588 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_RESET 0x00000000
8590 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_OFST 0x2c
8614 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_THRESHOLDS_0_1_LSB 0
8616 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_THRESHOLDS_0_1_MSB 1
8618 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_THRESHOLDS_0_1_WIDTH 2
8620 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_THRESHOLDS_0_1_SET_MSK 0x00000003
8622 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_THRESHOLDS_0_1_CLR_MSK 0xfffffffc
8624 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_THRESHOLDS_0_1_RESET 0x0
8626 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_THRESHOLDS_0_1_GET(value) (((value) & 0x00000003) >> 0)
8628 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_THRESHOLDS_0_1_SET(value) (((value) << 0) & 0x00000003)
8630 #ifndef __ASSEMBLY__
8641 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_s
8643 uint32_t THRESHOLDS_0_1 : 2;
8648 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_t;
8652 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_RESET 0x00000000
8654 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_OFST 0x30
8678 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_THRESHOLDS_0_2_LSB 0
8680 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_THRESHOLDS_0_2_MSB 1
8682 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_THRESHOLDS_0_2_WIDTH 2
8684 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_THRESHOLDS_0_2_SET_MSK 0x00000003
8686 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_THRESHOLDS_0_2_CLR_MSK 0xfffffffc
8688 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_THRESHOLDS_0_2_RESET 0x0
8690 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_THRESHOLDS_0_2_GET(value) (((value) & 0x00000003) >> 0)
8692 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_THRESHOLDS_0_2_SET(value) (((value) << 0) & 0x00000003)
8694 #ifndef __ASSEMBLY__
8705 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_s
8707 uint32_t THRESHOLDS_0_2 : 2;
8712 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_t;
8716 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_RESET 0x00000000
8718 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_OFST 0x34
8745 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OVFSTAT_LSB 0
8747 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OVFSTAT_MSB 0
8749 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OVFSTAT_WIDTH 1
8751 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OVFSTAT_SET_MSK 0x00000001
8753 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OVFSTAT_CLR_MSK 0xfffffffe
8755 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OVFSTAT_RESET 0x0
8757 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OVFSTAT_GET(value) (((value) & 0x00000001) >> 0)
8759 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OVFSTAT_SET(value) (((value) << 0) & 0x00000001)
8761 #ifndef __ASSEMBLY__
8772 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_s
8774 const uint32_t OVERFLOWSTATUS : 1;
8779 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_t;
8783 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_RESET 0x00000000
8785 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_OFST 0x6c
8810 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OVFRST_LSB 0
8812 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OVFRST_MSB 0
8814 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OVFRST_WIDTH 1
8816 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OVFRST_SET_MSK 0x00000001
8818 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OVFRST_CLR_MSK 0xfffffffe
8820 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OVFRST_RESET 0x0
8822 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OVFRST_GET(value) (((value) & 0x00000001) >> 0)
8824 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OVFRST_SET(value) (((value) << 0) & 0x00000001)
8826 #ifndef __ASSEMBLY__
8837 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_s
8839 uint32_t OVERFLOWRESET : 1;
8844 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_t;
8848 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_RESET 0x00000000
8850 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_OFST 0x70
8876 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_PENDINGEVENTMOD_LSB 0
8878 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_PENDINGEVENTMOD_MSB 0
8880 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_PENDINGEVENTMOD_WIDTH 1
8882 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_PENDINGEVENTMOD_SET_MSK 0x00000001
8884 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_PENDINGEVENTMOD_CLR_MSK 0xfffffffe
8886 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_PENDINGEVENTMOD_RESET 0x0
8888 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_PENDINGEVENTMOD_GET(value) (((value) & 0x00000001) >> 0)
8890 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_PENDINGEVENTMOD_SET(value) (((value) << 0) & 0x00000001)
8892 #ifndef __ASSEMBLY__
8903 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_s
8905 uint32_t PENDINGEVENTMODE : 1;
8910 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_t;
8914 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_RESET 0x00000000
8916 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_OFST 0x74
8942 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_PRESCALER_LSB 0
8944 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_PRESCALER_MSB 7
8946 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_PRESCALER_WIDTH 8
8948 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_PRESCALER_SET_MSK 0x000000ff
8950 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_PRESCALER_CLR_MSK 0xffffff00
8952 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_PRESCALER_RESET 0x0
8954 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_PRESCALER_GET(value) (((value) & 0x000000ff) >> 0)
8956 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_PRESCALER_SET(value) (((value) << 0) & 0x000000ff)
8958 #ifndef __ASSEMBLY__
8969 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_s
8971 uint32_t PRESCALER : 8;
8976 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_t;
8980 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_RESET 0x00000000
8982 #define ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_OFST 0x78
8984 #ifndef __ASSEMBLY__
8995 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_s
8997 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_COREID_t Probe_emacs_main_TransactionStatProfiler_Id_CoreId;
8998 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_REVID_t Probe_emacs_main_TransactionStatProfiler_Id_RevisionId;
8999 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_EN_t Probe_emacs_main_TransactionStatProfiler_En;
9000 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_MOD_t Probe_emacs_main_TransactionStatProfiler_Mode;
9001 volatile uint32_t _pad_0x10_0x2b[7];
9002 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_0_t Probe_emacs_main_TransactionStatProfiler_Thresholds_0_0;
9003 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_1_t Probe_emacs_main_TransactionStatProfiler_Thresholds_0_1;
9004 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_THRESHOLDS_0_2_t Probe_emacs_main_TransactionStatProfiler_Thresholds_0_2;
9005 volatile uint32_t _pad_0x38_0x6b[13];
9006 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFSTAT_t Probe_emacs_main_TransactionStatProfiler_OverflowStatus;
9007 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_OVFRST_t Probe_emacs_main_TransactionStatProfiler_OverflowReset;
9008 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PENDINGEVENTMOD_t Probe_emacs_main_TransactionStatProfiler_PendingEventMode;
9009 ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_PRESCALER_t Probe_emacs_main_TransactionStatProfiler_PreScaler;
9010 volatile uint32_t _pad_0x7c_0x80;
9014 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_t;
9016 struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_raw_s
9018 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_Id_CoreId;
9019 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_Id_RevisionId;
9020 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_En;
9021 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_Mode;
9022 uint32_t _pad_0x10_0x2b[7];
9023 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_Thresholds_0_0;
9024 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_Thresholds_0_1;
9025 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_Thresholds_0_2;
9026 uint32_t _pad_0x38_0x6b[13];
9027 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_OverflowStatus;
9028 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_OverflowReset;
9029 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_PendingEventMode;
9030 volatile uint32_t Probe_emacs_main_TransactionStatProfiler_PreScaler;
9031 uint32_t _pad_0x7c_0x80;
9035 typedef volatile struct ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_raw_s ALT_NOC_MPU_PRB_EMACS_MAIN_XACTSTATPROFILER_raw_t;
9063 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_TYPEID_LSB 0
9065 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_TYPEID_MSB 7
9067 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_TYPEID_WIDTH 8
9069 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_TYPEID_SET_MSK 0x000000ff
9071 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_TYPEID_CLR_MSK 0xffffff00
9073 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_TYPEID_RESET 0x6
9075 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0)
9077 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff)
9088 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_CHECKSUM_LSB 8
9090 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_CHECKSUM_MSB 31
9092 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_CHECKSUM_WIDTH 24
9094 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_CHECKSUM_SET_MSK 0xffffff00
9096 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_CHECKSUM_CLR_MSK 0x000000ff
9098 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_CHECKSUM_RESET 0xc7360b
9100 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
9102 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
9104 #ifndef __ASSEMBLY__
9115 struct ALT_NOC_MPU_PRB_MPU_MAIN_COREID_s
9117 const uint32_t CORETYPEID : 8;
9118 const uint32_t CORECHECKSUM : 24;
9122 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_COREID_s ALT_NOC_MPU_PRB_MPU_MAIN_COREID_t;
9126 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_RESET 0xc7360b06
9128 #define ALT_NOC_MPU_PRB_MPU_MAIN_COREID_OFST 0x0
9150 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_UID_LSB 0
9152 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_UID_MSB 7
9154 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_UID_WIDTH 8
9156 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_UID_SET_MSK 0x000000ff
9158 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_UID_CLR_MSK 0xffffff00
9160 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_UID_RESET 0x0
9162 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_UID_GET(value) (((value) & 0x000000ff) >> 0)
9164 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_UID_SET(value) (((value) << 0) & 0x000000ff)
9176 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_FLEXNOCID_LSB 8
9178 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_FLEXNOCID_MSB 31
9180 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_FLEXNOCID_WIDTH 24
9182 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_FLEXNOCID_SET_MSK 0xffffff00
9184 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_FLEXNOCID_CLR_MSK 0x000000ff
9186 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_FLEXNOCID_RESET 0x129ff
9188 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
9190 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
9192 #ifndef __ASSEMBLY__
9203 struct ALT_NOC_MPU_PRB_MPU_MAIN_REVID_s
9205 const uint32_t USERID : 8;
9206 const uint32_t FLEXNOCID : 24;
9210 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_REVID_s ALT_NOC_MPU_PRB_MPU_MAIN_REVID_t;
9214 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_RESET 0x0129ff00
9216 #define ALT_NOC_MPU_PRB_MPU_MAIN_REVID_OFST 0x4
9250 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_LSB 0
9252 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_MSB 0
9254 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_WIDTH 1
9256 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_SET_MSK 0x00000001
9258 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_CLR_MSK 0xfffffffe
9260 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_RESET 0x0
9262 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_GET(value) (((value) & 0x00000001) >> 0)
9264 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ERREN_SET(value) (((value) << 0) & 0x00000001)
9276 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_LSB 1
9278 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_MSB 1
9280 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_WIDTH 1
9282 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_SET_MSK 0x00000002
9284 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_CLR_MSK 0xfffffffd
9286 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_RESET 0x0
9288 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_GET(value) (((value) & 0x00000002) >> 1)
9290 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_TRACEEN_SET(value) (((value) << 1) & 0x00000002)
9302 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_LSB 2
9304 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_MSB 2
9306 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_WIDTH 1
9308 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_SET_MSK 0x00000004
9310 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_CLR_MSK 0xfffffffb
9312 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_RESET 0x0
9314 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_GET(value) (((value) & 0x00000004) >> 2)
9316 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_PAYLDEN_SET(value) (((value) << 2) & 0x00000004)
9330 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_LSB 3
9332 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_MSB 3
9334 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_WIDTH 1
9336 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_SET_MSK 0x00000008
9338 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_CLR_MSK 0xfffffff7
9340 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_RESET 0x0
9342 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_GET(value) (((value) & 0x00000008) >> 3)
9344 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATEN_SET(value) (((value) << 3) & 0x00000008)
9357 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_LSB 4
9359 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_MSB 4
9361 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_WIDTH 1
9363 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_SET_MSK 0x00000010
9365 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_CLR_MSK 0xffffffef
9367 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_RESET 0x0
9369 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_GET(value) (((value) & 0x00000010) >> 4)
9371 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_ALARMEN_SET(value) (((value) << 4) & 0x00000010)
9386 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_LSB 5
9388 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_MSB 5
9390 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_WIDTH 1
9392 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_SET_MSK 0x00000020
9394 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_CLR_MSK 0xffffffdf
9396 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_RESET 0x0
9398 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_GET(value) (((value) & 0x00000020) >> 5)
9400 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_STATCONDDUMP_SET(value) (((value) << 5) & 0x00000020)
9413 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_LSB 6
9415 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_MSB 6
9417 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_WIDTH 1
9419 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_SET_MSK 0x00000040
9421 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_CLR_MSK 0xffffffbf
9423 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_RESET 0x0
9425 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_GET(value) (((value) & 0x00000040) >> 6)
9427 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_INTRUSIVEMOD_SET(value) (((value) << 6) & 0x00000040)
9442 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_LSB 7
9444 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_MSB 7
9446 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_WIDTH 1
9448 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET_MSK 0x00000080
9450 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_CLR_MSK 0xffffff7f
9452 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_RESET 0x0
9454 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_GET(value) (((value) & 0x00000080) >> 7)
9456 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_FILTBYTEALWAYSCHAINABLEEN_SET(value) (((value) << 7) & 0x00000080)
9458 #ifndef __ASSEMBLY__
9469 struct ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_s
9472 uint32_t TRACEEN : 1;
9473 uint32_t PAYLOADEN : 1;
9474 uint32_t STATEN : 1;
9475 uint32_t ALARMEN : 1;
9476 uint32_t STATCONDDUMP : 1;
9477 const uint32_t INTRUSIVEMODE : 1;
9478 uint32_t FILTBYTEALWAYSCHAINABLEEN : 1;
9483 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_s ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_t;
9487 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_RESET 0x00000000
9489 #define ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_OFST 0x8
9511 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_GLOBEN_LSB 0
9513 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_GLOBEN_MSB 0
9515 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_GLOBEN_WIDTH 1
9517 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_GLOBEN_SET_MSK 0x00000001
9519 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_GLOBEN_CLR_MSK 0xfffffffe
9521 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_GLOBEN_RESET 0x0
9523 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_GLOBEN_GET(value) (((value) & 0x00000001) >> 0)
9525 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_GLOBEN_SET(value) (((value) << 0) & 0x00000001)
9535 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ACT_LSB 1
9537 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ACT_MSB 1
9539 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ACT_WIDTH 1
9541 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ACT_SET_MSK 0x00000002
9543 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ACT_CLR_MSK 0xfffffffd
9545 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ACT_RESET 0x0
9547 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ACT_GET(value) (((value) & 0x00000002) >> 1)
9549 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_ACT_SET(value) (((value) << 1) & 0x00000002)
9551 #ifndef __ASSEMBLY__
9562 struct ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_s
9564 uint32_t GLOBALEN : 1;
9565 const uint32_t ACTIVE : 1;
9570 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_s ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_t;
9574 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_RESET 0x00000000
9576 #define ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_OFST 0xc
9603 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_FLTLUT_LSB 0
9605 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_FLTLUT_MSB 1
9607 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_FLTLUT_WIDTH 2
9609 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_FLTLUT_SET_MSK 0x00000003
9611 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_FLTLUT_CLR_MSK 0xfffffffc
9613 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_FLTLUT_RESET 0x0
9615 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_FLTLUT_GET(value) (((value) & 0x00000003) >> 0)
9617 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_FLTLUT_SET(value) (((value) << 0) & 0x00000003)
9619 #ifndef __ASSEMBLY__
9630 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_s
9632 uint32_t FILTERLUT : 2;
9637 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_t;
9641 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_RESET 0x00000000
9643 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_OFST 0x14
9671 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_TRACEALARMEN_LSB 0
9673 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_TRACEALARMEN_MSB 1
9675 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_TRACEALARMEN_WIDTH 2
9677 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_TRACEALARMEN_SET_MSK 0x00000003
9679 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_TRACEALARMEN_CLR_MSK 0xfffffffc
9681 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_TRACEALARMEN_RESET 0x0
9683 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_TRACEALARMEN_GET(value) (((value) & 0x00000003) >> 0)
9685 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_TRACEALARMEN_SET(value) (((value) << 0) & 0x00000003)
9687 #ifndef __ASSEMBLY__
9698 struct ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_s
9700 uint32_t TRACEALARMEN : 2;
9705 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_s ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_t;
9709 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_RESET 0x00000000
9711 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_OFST 0x18
9738 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_LSB 0
9740 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_MSB 1
9742 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_WIDTH 2
9744 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_SET_MSK 0x00000003
9746 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_CLR_MSK 0xfffffffc
9748 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_RESET 0x0
9750 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_GET(value) (((value) & 0x00000003) >> 0)
9752 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_TRACEALARMSTAT_SET(value) (((value) << 0) & 0x00000003)
9754 #ifndef __ASSEMBLY__
9765 struct ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_s
9767 const uint32_t TRACEALARMSTATUS : 2;
9772 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_s ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_t;
9776 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_RESET 0x00000000
9778 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_OFST 0x1c
9804 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_TRACEALARMCLR_LSB 0
9806 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_TRACEALARMCLR_MSB 1
9808 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_TRACEALARMCLR_WIDTH 2
9810 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_TRACEALARMCLR_SET_MSK 0x00000003
9812 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_TRACEALARMCLR_CLR_MSK 0xfffffffc
9814 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_TRACEALARMCLR_RESET 0x0
9816 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_TRACEALARMCLR_GET(value) (((value) & 0x00000003) >> 0)
9818 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_TRACEALARMCLR_SET(value) (((value) << 0) & 0x00000003)
9820 #ifndef __ASSEMBLY__
9831 struct ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_s
9833 uint32_t TRACEALARMCLR : 2;
9838 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_s ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_t;
9842 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_RESET 0x00000000
9844 #define ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_OFST 0x20
9874 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_STATPERIOD_LSB 0
9876 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_STATPERIOD_MSB 4
9878 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_STATPERIOD_WIDTH 5
9880 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_STATPERIOD_SET_MSK 0x0000001f
9882 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_STATPERIOD_CLR_MSK 0xffffffe0
9884 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_STATPERIOD_RESET 0x0
9886 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_STATPERIOD_GET(value) (((value) & 0x0000001f) >> 0)
9888 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_STATPERIOD_SET(value) (((value) << 0) & 0x0000001f)
9890 #ifndef __ASSEMBLY__
9901 struct ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_s
9903 uint32_t STATPERIOD : 5;
9908 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_s ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_t;
9912 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_RESET 0x00000000
9914 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_OFST 0x24
9940 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_STATGO_LSB 0
9942 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_STATGO_MSB 0
9944 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_STATGO_WIDTH 1
9946 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_STATGO_SET_MSK 0x00000001
9948 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_STATGO_CLR_MSK 0xfffffffe
9950 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_STATGO_RESET 0x0
9952 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_STATGO_GET(value) (((value) & 0x00000001) >> 0)
9954 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_STATGO_SET(value) (((value) << 0) & 0x00000001)
9956 #ifndef __ASSEMBLY__
9967 struct ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_s
9969 uint32_t STATGO : 1;
9974 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_s ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_t;
9978 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_RESET 0x00000000
9980 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_OFST 0x28
10005 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_STATALARMMIN_LSB 0
10007 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_STATALARMMIN_MSB 31
10009 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_STATALARMMIN_WIDTH 32
10011 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_STATALARMMIN_SET_MSK 0xffffffff
10013 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_STATALARMMIN_CLR_MSK 0x00000000
10015 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_STATALARMMIN_RESET 0x0
10017 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_STATALARMMIN_GET(value) (((value) & 0xffffffff) >> 0)
10019 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_STATALARMMIN_SET(value) (((value) << 0) & 0xffffffff)
10021 #ifndef __ASSEMBLY__
10032 struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_s
10034 uint32_t STATALARMMIN : 32;
10038 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_s ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_t;
10042 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_RESET 0x00000000
10044 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_OFST 0x2c
10069 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_STATALARMMAX_LSB 0
10071 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_STATALARMMAX_MSB 31
10073 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_STATALARMMAX_WIDTH 32
10075 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_STATALARMMAX_SET_MSK 0xffffffff
10077 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_STATALARMMAX_CLR_MSK 0x00000000
10079 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_STATALARMMAX_RESET 0x0
10081 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_STATALARMMAX_GET(value) (((value) & 0xffffffff) >> 0)
10083 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_STATALARMMAX_SET(value) (((value) << 0) & 0xffffffff)
10085 #ifndef __ASSEMBLY__
10096 struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_s
10098 uint32_t STATALARMMAX : 32;
10102 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_s ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_t;
10106 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_RESET 0x00000000
10108 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_OFST 0x30
10135 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_STATALARMSTAT_LSB 0
10137 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_STATALARMSTAT_MSB 0
10139 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_STATALARMSTAT_WIDTH 1
10141 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_STATALARMSTAT_SET_MSK 0x00000001
10143 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_STATALARMSTAT_CLR_MSK 0xfffffffe
10145 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_STATALARMSTAT_RESET 0x0
10147 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_STATALARMSTAT_GET(value) (((value) & 0x00000001) >> 0)
10149 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_STATALARMSTAT_SET(value) (((value) << 0) & 0x00000001)
10151 #ifndef __ASSEMBLY__
10162 struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_s
10164 const uint32_t STATALARMSTATUS : 1;
10169 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_s ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_t;
10173 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_RESET 0x00000000
10175 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_OFST 0x34
10201 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_STATALARMCLR_LSB 0
10203 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_STATALARMCLR_MSB 0
10205 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_STATALARMCLR_WIDTH 1
10207 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_STATALARMCLR_SET_MSK 0x00000001
10209 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_STATALARMCLR_CLR_MSK 0xfffffffe
10211 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_STATALARMCLR_RESET 0x0
10213 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_STATALARMCLR_GET(value) (((value) & 0x00000001) >> 0)
10215 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_STATALARMCLR_SET(value) (((value) << 0) & 0x00000001)
10217 #ifndef __ASSEMBLY__
10228 struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_s
10230 uint32_t STATALARMCLR : 1;
10235 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_s ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_t;
10239 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_RESET 0x00000000
10241 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_OFST 0x38
10265 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_STATALARMEN_LSB 0
10267 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_STATALARMEN_MSB 0
10269 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_STATALARMEN_WIDTH 1
10271 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_STATALARMEN_SET_MSK 0x00000001
10273 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_STATALARMEN_CLR_MSK 0xfffffffe
10275 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_STATALARMEN_RESET 0x1
10277 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_STATALARMEN_GET(value) (((value) & 0x00000001) >> 0)
10279 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_STATALARMEN_SET(value) (((value) << 0) & 0x00000001)
10281 #ifndef __ASSEMBLY__
10292 struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_s
10294 uint32_t STATALARMEN : 1;
10299 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_s ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_t;
10303 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_RESET 0x00000001
10305 #define ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_OFST 0x3c
10329 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_LSB 0
10331 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_MSB 18
10333 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_WIDTH 19
10335 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_SET_MSK 0x0007ffff
10337 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_CLR_MSK 0xfff80000
10339 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_RESET 0x0
10341 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_GET(value) (((value) & 0x0007ffff) >> 0)
10343 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_FLTS_0_ROUTEIDBASE_SET(value) (((value) << 0) & 0x0007ffff)
10345 #ifndef __ASSEMBLY__
10356 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_s
10358 uint32_t FILTERS_0_ROUTEIDBASE : 19;
10363 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_t;
10367 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_RESET 0x00000000
10369 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_OFST 0x44
10394 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_LSB 0
10396 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_MSB 18
10398 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_WIDTH 19
10400 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_SET_MSK 0x0007ffff
10402 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_CLR_MSK 0xfff80000
10404 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_RESET 0x0
10406 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_GET(value) (((value) & 0x0007ffff) >> 0)
10408 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_FLTS_0_ROUTEIDMSK_SET(value) (((value) << 0) & 0x0007ffff)
10410 #ifndef __ASSEMBLY__
10421 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_s
10423 uint32_t FILTERS_0_ROUTEIDMASK : 19;
10428 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_t;
10432 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_RESET 0x00000000
10434 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_OFST 0x48
10456 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_LSB 0
10458 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_MSB 31
10460 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_WIDTH 32
10462 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_SET_MSK 0xffffffff
10464 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_CLR_MSK 0x00000000
10466 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_RESET 0x0
10468 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_GET(value) (((value) & 0xffffffff) >> 0)
10470 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_FLTS_0_ADDRBASE_LOW_SET(value) (((value) << 0) & 0xffffffff)
10472 #ifndef __ASSEMBLY__
10483 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_s
10485 uint32_t FILTERS_0_ADDRBASE_LOW : 32;
10489 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_t;
10493 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_RESET 0x00000000
10495 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_OFST 0x4c
10522 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_LSB 0
10524 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_MSB 5
10526 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_WIDTH 6
10528 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_SET_MSK 0x0000003f
10530 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_CLR_MSK 0xffffffc0
10532 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_RESET 0x0
10534 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0)
10536 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_FLTS_0_WINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f)
10538 #ifndef __ASSEMBLY__
10549 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_s
10551 uint32_t FILTERS_0_WINDOWSIZE : 6;
10556 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_t;
10560 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_RESET 0x00000000
10562 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_OFST 0x54
10585 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_LSB 0
10587 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_MSB 2
10589 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_WIDTH 3
10591 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET_MSK 0x00000007
10593 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_CLR_MSK 0xfffffff8
10595 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_RESET 0x0
10597 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_GET(value) (((value) & 0x00000007) >> 0)
10599 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_FLTS_0_SECURITYBASE_SET(value) (((value) << 0) & 0x00000007)
10601 #ifndef __ASSEMBLY__
10612 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_s
10614 uint32_t FILTERS_0_SECURITYBASE : 3;
10619 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_t;
10623 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_RESET 0x00000000
10625 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_OFST 0x58
10650 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_LSB 0
10652 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_MSB 2
10654 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_WIDTH 3
10656 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_SET_MSK 0x00000007
10658 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_CLR_MSK 0xfffffff8
10660 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_RESET 0x0
10662 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_GET(value) (((value) & 0x00000007) >> 0)
10664 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_FLTS_0_SECURITYMSK_SET(value) (((value) << 0) & 0x00000007)
10666 #ifndef __ASSEMBLY__
10677 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_s
10679 uint32_t FILTERS_0_SECURITYMASK : 3;
10684 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_t;
10688 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_RESET 0x00000000
10690 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_OFST 0x5c
10718 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RDEN_LSB 0
10720 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RDEN_MSB 0
10722 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RDEN_WIDTH 1
10724 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RDEN_SET_MSK 0x00000001
10726 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RDEN_CLR_MSK 0xfffffffe
10728 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RDEN_RESET 0x0
10730 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RDEN_GET(value) (((value) & 0x00000001) >> 0)
10732 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RDEN_SET(value) (((value) << 0) & 0x00000001)
10743 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_WREN_LSB 1
10745 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_WREN_MSB 1
10747 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_WREN_WIDTH 1
10749 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_WREN_SET_MSK 0x00000002
10751 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_WREN_CLR_MSK 0xfffffffd
10753 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_WREN_RESET 0x0
10755 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_WREN_GET(value) (((value) & 0x00000002) >> 1)
10757 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_WREN_SET(value) (((value) << 1) & 0x00000002)
10768 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_LOCKEN_LSB 2
10770 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_LOCKEN_MSB 2
10772 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_LOCKEN_WIDTH 1
10774 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_LOCKEN_SET_MSK 0x00000004
10776 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_LOCKEN_CLR_MSK 0xfffffffb
10778 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_LOCKEN_RESET 0x0
10780 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_LOCKEN_GET(value) (((value) & 0x00000004) >> 2)
10782 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_LOCKEN_SET(value) (((value) << 2) & 0x00000004)
10793 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_URGEN_LSB 3
10795 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_URGEN_MSB 3
10797 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_URGEN_WIDTH 1
10799 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_URGEN_SET_MSK 0x00000008
10801 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_URGEN_CLR_MSK 0xfffffff7
10803 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_URGEN_RESET 0x0
10805 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_URGEN_GET(value) (((value) & 0x00000008) >> 3)
10807 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_URGEN_SET(value) (((value) << 3) & 0x00000008)
10809 #ifndef __ASSEMBLY__
10820 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_s
10824 uint32_t LOCKEN : 1;
10825 uint32_t URGEN : 1;
10830 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_t;
10834 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_RESET 0x00000000
10836 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_OFST 0x60
10862 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_REQEN_LSB 0
10864 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_REQEN_MSB 0
10866 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_REQEN_WIDTH 1
10868 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_REQEN_SET_MSK 0x00000001
10870 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_REQEN_CLR_MSK 0xfffffffe
10872 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_REQEN_RESET 0x0
10874 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_REQEN_GET(value) (((value) & 0x00000001) >> 0)
10876 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_REQEN_SET(value) (((value) << 0) & 0x00000001)
10887 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RSPEN_LSB 1
10889 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RSPEN_MSB 1
10891 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RSPEN_WIDTH 1
10893 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RSPEN_SET_MSK 0x00000002
10895 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RSPEN_CLR_MSK 0xfffffffd
10897 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RSPEN_RESET 0x0
10899 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RSPEN_GET(value) (((value) & 0x00000002) >> 1)
10901 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RSPEN_SET(value) (((value) << 1) & 0x00000002)
10903 #ifndef __ASSEMBLY__
10914 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_s
10916 uint32_t REQEN : 1;
10917 uint32_t RSPEN : 1;
10922 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_t;
10926 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_RESET 0x00000000
10928 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_OFST 0x64
10952 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_FLTS_0_LEN_LSB 0
10954 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_FLTS_0_LEN_MSB 3
10956 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_FLTS_0_LEN_WIDTH 4
10958 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_FLTS_0_LEN_SET_MSK 0x0000000f
10960 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_FLTS_0_LEN_CLR_MSK 0xfffffff0
10962 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_FLTS_0_LEN_RESET 0x0
10964 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_FLTS_0_LEN_GET(value) (((value) & 0x0000000f) >> 0)
10966 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_FLTS_0_LEN_SET(value) (((value) << 0) & 0x0000000f)
10968 #ifndef __ASSEMBLY__
10979 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_s
10981 uint32_t FILTERS_0_LENGTH : 4;
10986 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_t;
10990 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_RESET 0x00000000
10992 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_OFST 0x68
11017 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_LSB 0
11019 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_MSB 1
11021 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_WIDTH 2
11023 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_SET_MSK 0x00000003
11025 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_CLR_MSK 0xfffffffc
11027 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_RESET 0x0
11029 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_GET(value) (((value) & 0x00000003) >> 0)
11031 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_FLTS_0_URGENCY_SET(value) (((value) << 0) & 0x00000003)
11033 #ifndef __ASSEMBLY__
11044 struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_s
11046 uint32_t FILTERS_0_URGENCY : 2;
11051 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_s ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_t;
11055 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_RESET 0x00000000
11057 #define ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_OFST 0x6c
11083 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_INTEVENT_LSB 0
11085 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_INTEVENT_MSB 4
11087 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_INTEVENT_WIDTH 5
11089 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_INTEVENT_SET_MSK 0x0000001f
11091 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_INTEVENT_CLR_MSK 0xffffffe0
11093 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_INTEVENT_RESET 0x0
11095 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
11097 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
11099 #ifndef __ASSEMBLY__
11110 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_s
11112 uint32_t INTEVENT : 5;
11117 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_t;
11121 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_RESET 0x00000000
11123 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_OFST 0x138
11148 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_LSB 0
11150 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_MSB 1
11152 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_WIDTH 2
11154 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_SET_MSK 0x00000003
11156 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_CLR_MSK 0xfffffffc
11158 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_RESET 0x0
11160 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
11162 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_CNTRS_0_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
11164 #ifndef __ASSEMBLY__
11175 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_s
11177 uint32_t COUNTERS_0_ALARMMODE : 2;
11182 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_t;
11186 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_RESET 0x00000000
11188 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_OFST 0x13c
11213 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_LSB 0
11215 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_MSB 15
11217 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_WIDTH 16
11219 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_SET_MSK 0x0000ffff
11221 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_CLR_MSK 0xffff0000
11223 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_RESET 0x0
11225 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
11227 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_CNTRS_0_VAL_SET(value) (((value) << 0) & 0x0000ffff)
11229 #ifndef __ASSEMBLY__
11240 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_s
11242 const uint32_t COUNTERS_0_VAL : 16;
11247 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_t;
11251 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_RESET 0x00000000
11253 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_OFST 0x140
11279 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_INTEVENT_LSB 0
11281 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_INTEVENT_MSB 4
11283 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_INTEVENT_WIDTH 5
11285 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_INTEVENT_SET_MSK 0x0000001f
11287 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_INTEVENT_CLR_MSK 0xffffffe0
11289 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_INTEVENT_RESET 0x0
11291 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
11293 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
11295 #ifndef __ASSEMBLY__
11306 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_s
11308 uint32_t INTEVENT : 5;
11313 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_t;
11317 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_RESET 0x00000000
11319 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_OFST 0x14c
11344 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_LSB 0
11346 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_MSB 1
11348 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_WIDTH 2
11350 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_SET_MSK 0x00000003
11352 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_CLR_MSK 0xfffffffc
11354 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_RESET 0x0
11356 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
11358 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_CNTRS_1_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
11360 #ifndef __ASSEMBLY__
11371 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_s
11373 uint32_t COUNTERS_1_ALARMMODE : 2;
11378 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_t;
11382 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_RESET 0x00000000
11384 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_OFST 0x150
11409 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_LSB 0
11411 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_MSB 15
11413 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_WIDTH 16
11415 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_SET_MSK 0x0000ffff
11417 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_CLR_MSK 0xffff0000
11419 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_RESET 0x0
11421 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
11423 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_CNTRS_1_VAL_SET(value) (((value) << 0) & 0x0000ffff)
11425 #ifndef __ASSEMBLY__
11436 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_s
11438 const uint32_t COUNTERS_1_VAL : 16;
11443 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_t;
11447 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_RESET 0x00000000
11449 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_OFST 0x154
11475 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_INTEVENT_LSB 0
11477 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_INTEVENT_MSB 4
11479 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_INTEVENT_WIDTH 5
11481 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_INTEVENT_SET_MSK 0x0000001f
11483 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_INTEVENT_CLR_MSK 0xffffffe0
11485 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_INTEVENT_RESET 0x0
11487 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
11489 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
11491 #ifndef __ASSEMBLY__
11502 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_s
11504 uint32_t INTEVENT : 5;
11509 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_t;
11513 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_RESET 0x00000000
11515 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_OFST 0x160
11540 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_LSB 0
11542 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_MSB 1
11544 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_WIDTH 2
11546 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_SET_MSK 0x00000003
11548 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_CLR_MSK 0xfffffffc
11550 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_RESET 0x0
11552 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
11554 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_CNTRS_2_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
11556 #ifndef __ASSEMBLY__
11567 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_s
11569 uint32_t COUNTERS_2_ALARMMODE : 2;
11574 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_t;
11578 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_RESET 0x00000000
11580 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_OFST 0x164
11605 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_LSB 0
11607 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_MSB 15
11609 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_WIDTH 16
11611 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_SET_MSK 0x0000ffff
11613 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_CLR_MSK 0xffff0000
11615 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_RESET 0x0
11617 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
11619 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_CNTRS_2_VAL_SET(value) (((value) << 0) & 0x0000ffff)
11621 #ifndef __ASSEMBLY__
11632 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_s
11634 const uint32_t COUNTERS_2_VAL : 16;
11639 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_t;
11643 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_RESET 0x00000000
11645 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_OFST 0x168
11671 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_INTEVENT_LSB 0
11673 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_INTEVENT_MSB 4
11675 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_INTEVENT_WIDTH 5
11677 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_INTEVENT_SET_MSK 0x0000001f
11679 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_INTEVENT_CLR_MSK 0xffffffe0
11681 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_INTEVENT_RESET 0x0
11683 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_INTEVENT_GET(value) (((value) & 0x0000001f) >> 0)
11685 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_INTEVENT_SET(value) (((value) << 0) & 0x0000001f)
11687 #ifndef __ASSEMBLY__
11698 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_s
11700 uint32_t INTEVENT : 5;
11705 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_t;
11709 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_RESET 0x00000000
11711 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_OFST 0x174
11736 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_LSB 0
11738 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_MSB 1
11740 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_WIDTH 2
11742 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_SET_MSK 0x00000003
11744 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_CLR_MSK 0xfffffffc
11746 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_RESET 0x0
11748 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_GET(value) (((value) & 0x00000003) >> 0)
11750 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_CNTRS_3_ALARMMOD_SET(value) (((value) << 0) & 0x00000003)
11752 #ifndef __ASSEMBLY__
11763 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_s
11765 uint32_t COUNTERS_3_ALARMMODE : 2;
11770 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_t;
11774 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_RESET 0x00000000
11776 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_OFST 0x178
11801 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_LSB 0
11803 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_MSB 15
11805 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_WIDTH 16
11807 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_SET_MSK 0x0000ffff
11809 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_CLR_MSK 0xffff0000
11811 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_RESET 0x0
11813 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_GET(value) (((value) & 0x0000ffff) >> 0)
11815 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_CNTRS_3_VAL_SET(value) (((value) << 0) & 0x0000ffff)
11817 #ifndef __ASSEMBLY__
11828 struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_s
11830 const uint32_t COUNTERS_3_VAL : 16;
11835 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_s ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_t;
11839 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_RESET 0x00000000
11841 #define ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_OFST 0x17c
11843 #ifndef __ASSEMBLY__
11854 struct ALT_NOC_MPU_PRB_MPU_MAIN_PRB_s
11856 ALT_NOC_MPU_PRB_MPU_MAIN_COREID_t Probe_MPU_main_Probe_Id_CoreId;
11857 ALT_NOC_MPU_PRB_MPU_MAIN_REVID_t Probe_MPU_main_Probe_Id_RevisionId;
11858 ALT_NOC_MPU_PRB_MPU_MAIN_MAINCTL_t Probe_MPU_main_Probe_MainCtl;
11859 ALT_NOC_MPU_PRB_MPU_MAIN_CFGCTL_t Probe_MPU_main_Probe_CfgCtl;
11860 volatile uint32_t _pad_0x10_0x13;
11861 ALT_NOC_MPU_PRB_MPU_MAIN_FLTLUT_t Probe_MPU_main_Probe_FilterLut;
11862 ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMEN_t Probe_MPU_main_Probe_TraceAlarmEn;
11863 ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMSTAT_t Probe_MPU_main_Probe_TraceAlarmStatus;
11864 ALT_NOC_MPU_PRB_MPU_MAIN_TRACEALARMCLR_t Probe_MPU_main_Probe_TraceAlarmClr;
11865 ALT_NOC_MPU_PRB_MPU_MAIN_STATPERIOD_t Probe_MPU_main_Probe_StatPeriod;
11866 ALT_NOC_MPU_PRB_MPU_MAIN_STATGO_t Probe_MPU_main_Probe_StatGo;
11867 ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMIN_t Probe_MPU_main_Probe_StatAlarmMin;
11868 ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMMAX_t Probe_MPU_main_Probe_StatAlarmMax;
11869 ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMSTAT_t Probe_MPU_main_Probe_StatAlarmStatus;
11870 ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMCLR_t Probe_MPU_main_Probe_StatAlarmClr;
11871 ALT_NOC_MPU_PRB_MPU_MAIN_STATALARMEN_t Probe_MPU_main_Probe_StatAlarmEn;
11872 volatile uint32_t _pad_0x40_0x43;
11873 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDBASE_t Probe_MPU_main_Probe_Filters_0_RouteIdBase;
11874 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ROUTEIDMSK_t Probe_MPU_main_Probe_Filters_0_RouteIdMask;
11875 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_ADDRBASE_LOW_t Probe_MPU_main_Probe_Filters_0_AddrBase_Low;
11876 volatile uint32_t _pad_0x50_0x53;
11877 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_WINDOWSIZE_t Probe_MPU_main_Probe_Filters_0_WindowSize;
11878 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYBASE_t Probe_MPU_main_Probe_Filters_0_SecurityBase;
11879 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_SECURITYMSK_t Probe_MPU_main_Probe_Filters_0_SecurityMask;
11880 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_OPCODE_t Probe_MPU_main_Probe_Filters_0_Opcode;
11881 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_STAT_t Probe_MPU_main_Probe_Filters_0_Status;
11882 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_LEN_t Probe_MPU_main_Probe_Filters_0_Length;
11883 ALT_NOC_MPU_PRB_MPU_MAIN_FLTS_0_URGENCY_t Probe_MPU_main_Probe_Filters_0_Urgency;
11884 volatile uint32_t _pad_0x70_0x137[50];
11885 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_SRC_t Probe_MPU_main_Probe_Counters_0_Src;
11886 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_ALARMMOD_t Probe_MPU_main_Probe_Counters_0_AlarmMode;
11887 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_0_VAL_t Probe_MPU_main_Probe_Counters_0_Val;
11888 volatile uint32_t _pad_0x144_0x14b[2];
11889 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_SRC_t Probe_MPU_main_Probe_Counters_1_Src;
11890 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_ALARMMOD_t Probe_MPU_main_Probe_Counters_1_AlarmMode;
11891 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_1_VAL_t Probe_MPU_main_Probe_Counters_1_Val;
11892 volatile uint32_t _pad_0x158_0x15f[2];
11893 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_SRC_t Probe_MPU_main_Probe_Counters_2_Src;
11894 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_ALARMMOD_t Probe_MPU_main_Probe_Counters_2_AlarmMode;
11895 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_2_VAL_t Probe_MPU_main_Probe_Counters_2_Val;
11896 volatile uint32_t _pad_0x16c_0x173[2];
11897 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_SRC_t Probe_MPU_main_Probe_Counters_3_Src;
11898 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_ALARMMOD_t Probe_MPU_main_Probe_Counters_3_AlarmMode;
11899 ALT_NOC_MPU_PRB_MPU_MAIN_CNTRS_3_VAL_t Probe_MPU_main_Probe_Counters_3_Val;
11900 volatile uint32_t _pad_0x180_0x400[160];
11904 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_PRB_s ALT_NOC_MPU_PRB_MPU_MAIN_PRB_t;
11906 struct ALT_NOC_MPU_PRB_MPU_MAIN_PRB_raw_s
11908 volatile uint32_t Probe_MPU_main_Probe_Id_CoreId;
11909 volatile uint32_t Probe_MPU_main_Probe_Id_RevisionId;
11910 volatile uint32_t Probe_MPU_main_Probe_MainCtl;
11911 volatile uint32_t Probe_MPU_main_Probe_CfgCtl;
11912 uint32_t _pad_0x10_0x13;
11913 volatile uint32_t Probe_MPU_main_Probe_FilterLut;
11914 volatile uint32_t Probe_MPU_main_Probe_TraceAlarmEn;
11915 volatile uint32_t Probe_MPU_main_Probe_TraceAlarmStatus;
11916 volatile uint32_t Probe_MPU_main_Probe_TraceAlarmClr;
11917 volatile uint32_t Probe_MPU_main_Probe_StatPeriod;
11918 volatile uint32_t Probe_MPU_main_Probe_StatGo;
11919 volatile uint32_t Probe_MPU_main_Probe_StatAlarmMin;
11920 volatile uint32_t Probe_MPU_main_Probe_StatAlarmMax;
11921 volatile uint32_t Probe_MPU_main_Probe_StatAlarmStatus;
11922 volatile uint32_t Probe_MPU_main_Probe_StatAlarmClr;
11923 volatile uint32_t Probe_MPU_main_Probe_StatAlarmEn;
11924 uint32_t _pad_0x40_0x43;
11925 volatile uint32_t Probe_MPU_main_Probe_Filters_0_RouteIdBase;
11926 volatile uint32_t Probe_MPU_main_Probe_Filters_0_RouteIdMask;
11927 volatile uint32_t Probe_MPU_main_Probe_Filters_0_AddrBase_Low;
11928 uint32_t _pad_0x50_0x53;
11929 volatile uint32_t Probe_MPU_main_Probe_Filters_0_WindowSize;
11930 volatile uint32_t Probe_MPU_main_Probe_Filters_0_SecurityBase;
11931 volatile uint32_t Probe_MPU_main_Probe_Filters_0_SecurityMask;
11932 volatile uint32_t Probe_MPU_main_Probe_Filters_0_Opcode;
11933 volatile uint32_t Probe_MPU_main_Probe_Filters_0_Status;
11934 volatile uint32_t Probe_MPU_main_Probe_Filters_0_Length;
11935 volatile uint32_t Probe_MPU_main_Probe_Filters_0_Urgency;
11936 uint32_t _pad_0x70_0x137[50];
11937 volatile uint32_t Probe_MPU_main_Probe_Counters_0_Src;
11938 volatile uint32_t Probe_MPU_main_Probe_Counters_0_AlarmMode;
11939 volatile uint32_t Probe_MPU_main_Probe_Counters_0_Val;
11940 uint32_t _pad_0x144_0x14b[2];
11941 volatile uint32_t Probe_MPU_main_Probe_Counters_1_Src;
11942 volatile uint32_t Probe_MPU_main_Probe_Counters_1_AlarmMode;
11943 volatile uint32_t Probe_MPU_main_Probe_Counters_1_Val;
11944 uint32_t _pad_0x158_0x15f[2];
11945 volatile uint32_t Probe_MPU_main_Probe_Counters_2_Src;
11946 volatile uint32_t Probe_MPU_main_Probe_Counters_2_AlarmMode;
11947 volatile uint32_t Probe_MPU_main_Probe_Counters_2_Val;
11948 uint32_t _pad_0x16c_0x173[2];
11949 volatile uint32_t Probe_MPU_main_Probe_Counters_3_Src;
11950 volatile uint32_t Probe_MPU_main_Probe_Counters_3_AlarmMode;
11951 volatile uint32_t Probe_MPU_main_Probe_Counters_3_Val;
11952 uint32_t _pad_0x180_0x400[160];
11956 typedef volatile struct ALT_NOC_MPU_PRB_MPU_MAIN_PRB_raw_s ALT_NOC_MPU_PRB_MPU_MAIN_PRB_raw_t;