35 #ifndef __ALT_SOCAL_SPIM_H__
36 #define __ALT_SOCAL_SPIM_H__
121 #define ALT_SPIM_CTLR0_DFS_E_WIDTH4BIT 0x3
127 #define ALT_SPIM_CTLR0_DFS_E_WIDTH5BIT 0x4
133 #define ALT_SPIM_CTLR0_DFS_E_WIDTH6BIT 0x5
139 #define ALT_SPIM_CTLR0_DFS_E_WIDTH7BIT 0x6
145 #define ALT_SPIM_CTLR0_DFS_E_WIDTH8BIT 0x7
151 #define ALT_SPIM_CTLR0_DFS_E_WIDTH9BIT 0x8
157 #define ALT_SPIM_CTLR0_DFS_E_WIDTH10BIT 0x9
163 #define ALT_SPIM_CTLR0_DFS_E_WIDTH11BIT 0xa
169 #define ALT_SPIM_CTLR0_DFS_E_WIDTH12BIT 0xb
175 #define ALT_SPIM_CTLR0_DFS_E_WIDTH13BIT 0xc
181 #define ALT_SPIM_CTLR0_DFS_E_WIDTH14BIT 0xd
187 #define ALT_SPIM_CTLR0_DFS_E_WIDTH15BIT 0xe
193 #define ALT_SPIM_CTLR0_DFS_E_WIDTH16BIT 0xf
196 #define ALT_SPIM_CTLR0_DFS_LSB 0
198 #define ALT_SPIM_CTLR0_DFS_MSB 3
200 #define ALT_SPIM_CTLR0_DFS_WIDTH 4
202 #define ALT_SPIM_CTLR0_DFS_SET_MSK 0x0000000f
204 #define ALT_SPIM_CTLR0_DFS_CLR_MSK 0xfffffff0
206 #define ALT_SPIM_CTLR0_DFS_RESET 0x7
208 #define ALT_SPIM_CTLR0_DFS_GET(value) (((value) & 0x0000000f) >> 0)
210 #define ALT_SPIM_CTLR0_DFS_SET(value) (((value) << 0) & 0x0000000f)
243 #define ALT_SPIM_CTLR0_FRF_E_MOTSPI 0x0
249 #define ALT_SPIM_CTLR0_FRF_E_TISSP 0x1
255 #define ALT_SPIM_CTLR0_FRF_E_NATMW 0x2
258 #define ALT_SPIM_CTLR0_FRF_LSB 4
260 #define ALT_SPIM_CTLR0_FRF_MSB 5
262 #define ALT_SPIM_CTLR0_FRF_WIDTH 2
264 #define ALT_SPIM_CTLR0_FRF_SET_MSK 0x00000030
266 #define ALT_SPIM_CTLR0_FRF_CLR_MSK 0xffffffcf
268 #define ALT_SPIM_CTLR0_FRF_RESET 0x0
270 #define ALT_SPIM_CTLR0_FRF_GET(value) (((value) & 0x00000030) >> 4)
272 #define ALT_SPIM_CTLR0_FRF_SET(value) (((value) << 4) & 0x00000030)
310 #define ALT_SPIM_CTLR0_SCPH_E_MIDBIT 0x0
316 #define ALT_SPIM_CTLR0_SCPH_E_STARTBIT 0x1
319 #define ALT_SPIM_CTLR0_SCPH_LSB 6
321 #define ALT_SPIM_CTLR0_SCPH_MSB 6
323 #define ALT_SPIM_CTLR0_SCPH_WIDTH 1
325 #define ALT_SPIM_CTLR0_SCPH_SET_MSK 0x00000040
327 #define ALT_SPIM_CTLR0_SCPH_CLR_MSK 0xffffffbf
329 #define ALT_SPIM_CTLR0_SCPH_RESET 0x0
331 #define ALT_SPIM_CTLR0_SCPH_GET(value) (((value) & 0x00000040) >> 6)
333 #define ALT_SPIM_CTLR0_SCPH_SET(value) (((value) << 6) & 0x00000040)
365 #define ALT_SPIM_CTLR0_SCPOL_E_INACTLOW 0x0
371 #define ALT_SPIM_CTLR0_SCPOL_E_INACTHIGH 0x1
374 #define ALT_SPIM_CTLR0_SCPOL_LSB 7
376 #define ALT_SPIM_CTLR0_SCPOL_MSB 7
378 #define ALT_SPIM_CTLR0_SCPOL_WIDTH 1
380 #define ALT_SPIM_CTLR0_SCPOL_SET_MSK 0x00000080
382 #define ALT_SPIM_CTLR0_SCPOL_CLR_MSK 0xffffff7f
384 #define ALT_SPIM_CTLR0_SCPOL_RESET 0x0
386 #define ALT_SPIM_CTLR0_SCPOL_GET(value) (((value) & 0x00000080) >> 7)
388 #define ALT_SPIM_CTLR0_SCPOL_SET(value) (((value) << 7) & 0x00000080)
442 #define ALT_SPIM_CTLR0_TMOD_E_TXRX 0x0
448 #define ALT_SPIM_CTLR0_TMOD_E_TXONLY 0x1
454 #define ALT_SPIM_CTLR0_TMOD_E_RXONLY 0x2
460 #define ALT_SPIM_CTLR0_TMOD_E_EERD 0x3
463 #define ALT_SPIM_CTLR0_TMOD_LSB 8
465 #define ALT_SPIM_CTLR0_TMOD_MSB 9
467 #define ALT_SPIM_CTLR0_TMOD_WIDTH 2
469 #define ALT_SPIM_CTLR0_TMOD_SET_MSK 0x00000300
471 #define ALT_SPIM_CTLR0_TMOD_CLR_MSK 0xfffffcff
473 #define ALT_SPIM_CTLR0_TMOD_RESET 0x0
475 #define ALT_SPIM_CTLR0_TMOD_GET(value) (((value) & 0x00000300) >> 8)
477 #define ALT_SPIM_CTLR0_TMOD_SET(value) (((value) << 8) & 0x00000300)
507 #define ALT_SPIM_CTLR0_SRL_E_NORMMOD 0x0
513 #define ALT_SPIM_CTLR0_SRL_E_TESTMOD 0x1
516 #define ALT_SPIM_CTLR0_SRL_LSB 11
518 #define ALT_SPIM_CTLR0_SRL_MSB 11
520 #define ALT_SPIM_CTLR0_SRL_WIDTH 1
522 #define ALT_SPIM_CTLR0_SRL_SET_MSK 0x00000800
524 #define ALT_SPIM_CTLR0_SRL_CLR_MSK 0xfffff7ff
526 #define ALT_SPIM_CTLR0_SRL_RESET 0x0
528 #define ALT_SPIM_CTLR0_SRL_GET(value) (((value) & 0x00000800) >> 11)
530 #define ALT_SPIM_CTLR0_SRL_SET(value) (((value) << 11) & 0x00000800)
568 #define ALT_SPIM_CTLR0_CFS_E_SIZE1BIT 0x0
574 #define ALT_SPIM_CTLR0_CFS_E_SIZE2BIT 0x1
580 #define ALT_SPIM_CTLR0_CFS_E_SIZE3BIT 0x2
586 #define ALT_SPIM_CTLR0_CFS_E_SIZE4BIT 0x3
592 #define ALT_SPIM_CTLR0_CFS_E_SIZE5BIT 0x4
598 #define ALT_SPIM_CTLR0_CFS_E_SIZE6BIT 0x05
604 #define ALT_SPIM_CTLR0_CFS_E_SIZE7BIT 0x6
610 #define ALT_SPIM_CTLR0_CFS_E_SIZE8BIT 0x7
616 #define ALT_SPIM_CTLR0_CFS_E_SIZE9BIT 0x8
622 #define ALT_SPIM_CTLR0_CFS_E_SIZE10BIT 0x9
628 #define ALT_SPIM_CTLR0_CFS_E_SIZE11BIT 0xa
634 #define ALT_SPIM_CTLR0_CFS_E_SIZE12BIT 0xb
640 #define ALT_SPIM_CTLR0_CFS_E_SIZE13BIT 0xc
646 #define ALT_SPIM_CTLR0_CFS_E_SIZE14BIT 0xd
652 #define ALT_SPIM_CTLR0_CFS_E_SIZE15BIT 0xe
658 #define ALT_SPIM_CTLR0_CFS_E_SIZE16BIT 0xf
661 #define ALT_SPIM_CTLR0_CFS_LSB 12
663 #define ALT_SPIM_CTLR0_CFS_MSB 15
665 #define ALT_SPIM_CTLR0_CFS_WIDTH 4
667 #define ALT_SPIM_CTLR0_CFS_SET_MSK 0x0000f000
669 #define ALT_SPIM_CTLR0_CFS_CLR_MSK 0xffff0fff
671 #define ALT_SPIM_CTLR0_CFS_RESET 0x0
673 #define ALT_SPIM_CTLR0_CFS_GET(value) (((value) & 0x0000f000) >> 12)
675 #define ALT_SPIM_CTLR0_CFS_SET(value) (((value) << 12) & 0x0000f000)
688 struct ALT_SPIM_CTLR0_s
702 typedef volatile struct ALT_SPIM_CTLR0_s ALT_SPIM_CTLR0_t;
706 #define ALT_SPIM_CTLR0_RESET 0x00000007
708 #define ALT_SPIM_CTLR0_OFST 0x0
710 #define ALT_SPIM_CTLR0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_CTLR0_OFST))
765 #define ALT_SPIM_CTLR1_NDF_LSB 0
767 #define ALT_SPIM_CTLR1_NDF_MSB 15
769 #define ALT_SPIM_CTLR1_NDF_WIDTH 16
771 #define ALT_SPIM_CTLR1_NDF_SET_MSK 0x0000ffff
773 #define ALT_SPIM_CTLR1_NDF_CLR_MSK 0xffff0000
775 #define ALT_SPIM_CTLR1_NDF_RESET 0x0
777 #define ALT_SPIM_CTLR1_NDF_GET(value) (((value) & 0x0000ffff) >> 0)
779 #define ALT_SPIM_CTLR1_NDF_SET(value) (((value) << 0) & 0x0000ffff)
792 struct ALT_SPIM_CTLR1_s
799 typedef volatile struct ALT_SPIM_CTLR1_s ALT_SPIM_CTLR1_t;
803 #define ALT_SPIM_CTLR1_RESET 0x00000000
805 #define ALT_SPIM_CTLR1_OFST 0x4
807 #define ALT_SPIM_CTLR1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_CTLR1_OFST))
854 #define ALT_SPIM_SPIENR_SPI_EN_E_DISD 0x0
860 #define ALT_SPIM_SPIENR_SPI_EN_E_END 0x1
863 #define ALT_SPIM_SPIENR_SPI_EN_LSB 0
865 #define ALT_SPIM_SPIENR_SPI_EN_MSB 0
867 #define ALT_SPIM_SPIENR_SPI_EN_WIDTH 1
869 #define ALT_SPIM_SPIENR_SPI_EN_SET_MSK 0x00000001
871 #define ALT_SPIM_SPIENR_SPI_EN_CLR_MSK 0xfffffffe
873 #define ALT_SPIM_SPIENR_SPI_EN_RESET 0x0
875 #define ALT_SPIM_SPIENR_SPI_EN_GET(value) (((value) & 0x00000001) >> 0)
877 #define ALT_SPIM_SPIENR_SPI_EN_SET(value) (((value) << 0) & 0x00000001)
890 struct ALT_SPIM_SPIENR_s
897 typedef volatile struct ALT_SPIM_SPIENR_s ALT_SPIM_SPIENR_t;
901 #define ALT_SPIM_SPIENR_RESET 0x00000000
903 #define ALT_SPIM_SPIENR_OFST 0x8
905 #define ALT_SPIM_SPIENR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_SPIENR_OFST))
964 #define ALT_SPIM_MWCR_MWMOD_E_NONSEQ 0x0
970 #define ALT_SPIM_MWCR_MWMOD_E_SEQ 0x1
973 #define ALT_SPIM_MWCR_MWMOD_LSB 0
975 #define ALT_SPIM_MWCR_MWMOD_MSB 0
977 #define ALT_SPIM_MWCR_MWMOD_WIDTH 1
979 #define ALT_SPIM_MWCR_MWMOD_SET_MSK 0x00000001
981 #define ALT_SPIM_MWCR_MWMOD_CLR_MSK 0xfffffffe
983 #define ALT_SPIM_MWCR_MWMOD_RESET 0x0
985 #define ALT_SPIM_MWCR_MWMOD_GET(value) (((value) & 0x00000001) >> 0)
987 #define ALT_SPIM_MWCR_MWMOD_SET(value) (((value) << 0) & 0x00000001)
1019 #define ALT_SPIM_MWCR_MDD_E_RXMOD 0x0
1025 #define ALT_SPIM_MWCR_MDD_E_TXMOD 0x1
1028 #define ALT_SPIM_MWCR_MDD_LSB 1
1030 #define ALT_SPIM_MWCR_MDD_MSB 1
1032 #define ALT_SPIM_MWCR_MDD_WIDTH 1
1034 #define ALT_SPIM_MWCR_MDD_SET_MSK 0x00000002
1036 #define ALT_SPIM_MWCR_MDD_CLR_MSK 0xfffffffd
1038 #define ALT_SPIM_MWCR_MDD_RESET 0x0
1040 #define ALT_SPIM_MWCR_MDD_GET(value) (((value) & 0x00000002) >> 1)
1042 #define ALT_SPIM_MWCR_MDD_SET(value) (((value) << 1) & 0x00000002)
1080 #define ALT_SPIM_MWCR_MHS_E_DISD 0x0
1086 #define ALT_SPIM_MWCR_MHS_E_END 0x1
1089 #define ALT_SPIM_MWCR_MHS_LSB 2
1091 #define ALT_SPIM_MWCR_MHS_MSB 2
1093 #define ALT_SPIM_MWCR_MHS_WIDTH 1
1095 #define ALT_SPIM_MWCR_MHS_SET_MSK 0x00000004
1097 #define ALT_SPIM_MWCR_MHS_CLR_MSK 0xfffffffb
1099 #define ALT_SPIM_MWCR_MHS_RESET 0x0
1101 #define ALT_SPIM_MWCR_MHS_GET(value) (((value) & 0x00000004) >> 2)
1103 #define ALT_SPIM_MWCR_MHS_SET(value) (((value) << 2) & 0x00000004)
1105 #ifndef __ASSEMBLY__
1116 struct ALT_SPIM_MWCR_s
1125 typedef volatile struct ALT_SPIM_MWCR_s ALT_SPIM_MWCR_t;
1129 #define ALT_SPIM_MWCR_RESET 0x00000000
1131 #define ALT_SPIM_MWCR_OFST 0xc
1133 #define ALT_SPIM_MWCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_MWCR_OFST))
1204 #define ALT_SPIM_SER_SER_E_NOTSELECTED 0x0
1210 #define ALT_SPIM_SER_SER_E_SELECTED 0x1
1213 #define ALT_SPIM_SER_SER_LSB 0
1215 #define ALT_SPIM_SER_SER_MSB 3
1217 #define ALT_SPIM_SER_SER_WIDTH 4
1219 #define ALT_SPIM_SER_SER_SET_MSK 0x0000000f
1221 #define ALT_SPIM_SER_SER_CLR_MSK 0xfffffff0
1223 #define ALT_SPIM_SER_SER_RESET 0x0
1225 #define ALT_SPIM_SER_SER_GET(value) (((value) & 0x0000000f) >> 0)
1227 #define ALT_SPIM_SER_SER_SET(value) (((value) << 0) & 0x0000000f)
1229 #ifndef __ASSEMBLY__
1240 struct ALT_SPIM_SER_s
1247 typedef volatile struct ALT_SPIM_SER_s ALT_SPIM_SER_t;
1251 #define ALT_SPIM_SER_RESET 0x00000000
1253 #define ALT_SPIM_SER_OFST 0x10
1255 #define ALT_SPIM_SER_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_SER_OFST))
1311 #define ALT_SPIM_BAUDR_SCKDV_LSB 0
1313 #define ALT_SPIM_BAUDR_SCKDV_MSB 15
1315 #define ALT_SPIM_BAUDR_SCKDV_WIDTH 16
1317 #define ALT_SPIM_BAUDR_SCKDV_SET_MSK 0x0000ffff
1319 #define ALT_SPIM_BAUDR_SCKDV_CLR_MSK 0xffff0000
1321 #define ALT_SPIM_BAUDR_SCKDV_RESET 0x0
1323 #define ALT_SPIM_BAUDR_SCKDV_GET(value) (((value) & 0x0000ffff) >> 0)
1325 #define ALT_SPIM_BAUDR_SCKDV_SET(value) (((value) << 0) & 0x0000ffff)
1327 #ifndef __ASSEMBLY__
1338 struct ALT_SPIM_BAUDR_s
1340 uint32_t sckdv : 16;
1345 typedef volatile struct ALT_SPIM_BAUDR_s ALT_SPIM_BAUDR_t;
1349 #define ALT_SPIM_BAUDR_RESET 0x00000000
1351 #define ALT_SPIM_BAUDR_OFST 0x14
1353 #define ALT_SPIM_BAUDR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_BAUDR_OFST))
1395 #define ALT_SPIM_TXFTLR_TFT_LSB 0
1397 #define ALT_SPIM_TXFTLR_TFT_MSB 7
1399 #define ALT_SPIM_TXFTLR_TFT_WIDTH 8
1401 #define ALT_SPIM_TXFTLR_TFT_SET_MSK 0x000000ff
1403 #define ALT_SPIM_TXFTLR_TFT_CLR_MSK 0xffffff00
1405 #define ALT_SPIM_TXFTLR_TFT_RESET 0x0
1407 #define ALT_SPIM_TXFTLR_TFT_GET(value) (((value) & 0x000000ff) >> 0)
1409 #define ALT_SPIM_TXFTLR_TFT_SET(value) (((value) << 0) & 0x000000ff)
1411 #ifndef __ASSEMBLY__
1422 struct ALT_SPIM_TXFTLR_s
1429 typedef volatile struct ALT_SPIM_TXFTLR_s ALT_SPIM_TXFTLR_t;
1433 #define ALT_SPIM_TXFTLR_RESET 0x00000000
1435 #define ALT_SPIM_TXFTLR_OFST 0x18
1437 #define ALT_SPIM_TXFTLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_TXFTLR_OFST))
1479 #define ALT_SPIM_RXFTLR_RFT_LSB 0
1481 #define ALT_SPIM_RXFTLR_RFT_MSB 7
1483 #define ALT_SPIM_RXFTLR_RFT_WIDTH 8
1485 #define ALT_SPIM_RXFTLR_RFT_SET_MSK 0x000000ff
1487 #define ALT_SPIM_RXFTLR_RFT_CLR_MSK 0xffffff00
1489 #define ALT_SPIM_RXFTLR_RFT_RESET 0x0
1491 #define ALT_SPIM_RXFTLR_RFT_GET(value) (((value) & 0x000000ff) >> 0)
1493 #define ALT_SPIM_RXFTLR_RFT_SET(value) (((value) << 0) & 0x000000ff)
1495 #ifndef __ASSEMBLY__
1506 struct ALT_SPIM_RXFTLR_s
1513 typedef volatile struct ALT_SPIM_RXFTLR_s ALT_SPIM_RXFTLR_t;
1517 #define ALT_SPIM_RXFTLR_RESET 0x00000000
1519 #define ALT_SPIM_RXFTLR_OFST 0x1c
1521 #define ALT_SPIM_RXFTLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXFTLR_OFST))
1547 #define ALT_SPIM_TXFLR_TXTFL_LSB 0
1549 #define ALT_SPIM_TXFLR_TXTFL_MSB 8
1551 #define ALT_SPIM_TXFLR_TXTFL_WIDTH 9
1553 #define ALT_SPIM_TXFLR_TXTFL_SET_MSK 0x000001ff
1555 #define ALT_SPIM_TXFLR_TXTFL_CLR_MSK 0xfffffe00
1557 #define ALT_SPIM_TXFLR_TXTFL_RESET 0x0
1559 #define ALT_SPIM_TXFLR_TXTFL_GET(value) (((value) & 0x000001ff) >> 0)
1561 #define ALT_SPIM_TXFLR_TXTFL_SET(value) (((value) << 0) & 0x000001ff)
1563 #ifndef __ASSEMBLY__
1574 struct ALT_SPIM_TXFLR_s
1576 const uint32_t txtfl : 9;
1581 typedef volatile struct ALT_SPIM_TXFLR_s ALT_SPIM_TXFLR_t;
1585 #define ALT_SPIM_TXFLR_RESET 0x00000000
1587 #define ALT_SPIM_TXFLR_OFST 0x20
1589 #define ALT_SPIM_TXFLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_TXFLR_OFST))
1615 #define ALT_SPIM_RXFLR_RXTFL_LSB 0
1617 #define ALT_SPIM_RXFLR_RXTFL_MSB 8
1619 #define ALT_SPIM_RXFLR_RXTFL_WIDTH 9
1621 #define ALT_SPIM_RXFLR_RXTFL_SET_MSK 0x000001ff
1623 #define ALT_SPIM_RXFLR_RXTFL_CLR_MSK 0xfffffe00
1625 #define ALT_SPIM_RXFLR_RXTFL_RESET 0x0
1627 #define ALT_SPIM_RXFLR_RXTFL_GET(value) (((value) & 0x000001ff) >> 0)
1629 #define ALT_SPIM_RXFLR_RXTFL_SET(value) (((value) << 0) & 0x000001ff)
1631 #ifndef __ASSEMBLY__
1642 struct ALT_SPIM_RXFLR_s
1644 const uint32_t rxtfl : 9;
1649 typedef volatile struct ALT_SPIM_RXFLR_s ALT_SPIM_RXFLR_t;
1653 #define ALT_SPIM_RXFLR_RESET 0x00000000
1655 #define ALT_SPIM_RXFLR_OFST 0x24
1657 #define ALT_SPIM_RXFLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXFLR_OFST))
1700 #define ALT_SPIM_SR_BUSY_E_INACT 0x0
1706 #define ALT_SPIM_SR_BUSY_E_ACT 0x1
1709 #define ALT_SPIM_SR_BUSY_LSB 0
1711 #define ALT_SPIM_SR_BUSY_MSB 0
1713 #define ALT_SPIM_SR_BUSY_WIDTH 1
1715 #define ALT_SPIM_SR_BUSY_SET_MSK 0x00000001
1717 #define ALT_SPIM_SR_BUSY_CLR_MSK 0xfffffffe
1719 #define ALT_SPIM_SR_BUSY_RESET 0x0
1721 #define ALT_SPIM_SR_BUSY_GET(value) (((value) & 0x00000001) >> 0)
1723 #define ALT_SPIM_SR_BUSY_SET(value) (((value) << 0) & 0x00000001)
1745 #define ALT_SPIM_SR_TFNF_E_FULL 0x0
1751 #define ALT_SPIM_SR_TFNF_E_NOTFULL 0x1
1754 #define ALT_SPIM_SR_TFNF_LSB 1
1756 #define ALT_SPIM_SR_TFNF_MSB 1
1758 #define ALT_SPIM_SR_TFNF_WIDTH 1
1760 #define ALT_SPIM_SR_TFNF_SET_MSK 0x00000002
1762 #define ALT_SPIM_SR_TFNF_CLR_MSK 0xfffffffd
1764 #define ALT_SPIM_SR_TFNF_RESET 0x1
1766 #define ALT_SPIM_SR_TFNF_GET(value) (((value) & 0x00000002) >> 1)
1768 #define ALT_SPIM_SR_TFNF_SET(value) (((value) << 1) & 0x00000002)
1790 #define ALT_SPIM_SR_TFE_E_NOTEMPTY 0x0
1796 #define ALT_SPIM_SR_TFE_E_EMPTY 0x1
1799 #define ALT_SPIM_SR_TFE_LSB 2
1801 #define ALT_SPIM_SR_TFE_MSB 2
1803 #define ALT_SPIM_SR_TFE_WIDTH 1
1805 #define ALT_SPIM_SR_TFE_SET_MSK 0x00000004
1807 #define ALT_SPIM_SR_TFE_CLR_MSK 0xfffffffb
1809 #define ALT_SPIM_SR_TFE_RESET 0x1
1811 #define ALT_SPIM_SR_TFE_GET(value) (((value) & 0x00000004) >> 2)
1813 #define ALT_SPIM_SR_TFE_SET(value) (((value) << 2) & 0x00000004)
1835 #define ALT_SPIM_SR_RFNE_E_EMPTY 0x0
1841 #define ALT_SPIM_SR_RFNE_E_NOTEMPTY 0x1
1844 #define ALT_SPIM_SR_RFNE_LSB 3
1846 #define ALT_SPIM_SR_RFNE_MSB 3
1848 #define ALT_SPIM_SR_RFNE_WIDTH 1
1850 #define ALT_SPIM_SR_RFNE_SET_MSK 0x00000008
1852 #define ALT_SPIM_SR_RFNE_CLR_MSK 0xfffffff7
1854 #define ALT_SPIM_SR_RFNE_RESET 0x0
1856 #define ALT_SPIM_SR_RFNE_GET(value) (((value) & 0x00000008) >> 3)
1858 #define ALT_SPIM_SR_RFNE_SET(value) (((value) << 3) & 0x00000008)
1880 #define ALT_SPIM_SR_RFF_E_NOTFULL 0x0
1886 #define ALT_SPIM_SR_RFF_E_FULL 0x1
1889 #define ALT_SPIM_SR_RFF_LSB 4
1891 #define ALT_SPIM_SR_RFF_MSB 4
1893 #define ALT_SPIM_SR_RFF_WIDTH 1
1895 #define ALT_SPIM_SR_RFF_SET_MSK 0x00000010
1897 #define ALT_SPIM_SR_RFF_CLR_MSK 0xffffffef
1899 #define ALT_SPIM_SR_RFF_RESET 0x0
1901 #define ALT_SPIM_SR_RFF_GET(value) (((value) & 0x00000010) >> 4)
1903 #define ALT_SPIM_SR_RFF_SET(value) (((value) << 4) & 0x00000010)
1933 #define ALT_SPIM_SR_DCOL_E_NOERROR 0x0
1939 #define ALT_SPIM_SR_DCOL_E_ERROR 0x1
1942 #define ALT_SPIM_SR_DCOL_LSB 6
1944 #define ALT_SPIM_SR_DCOL_MSB 6
1946 #define ALT_SPIM_SR_DCOL_WIDTH 1
1948 #define ALT_SPIM_SR_DCOL_SET_MSK 0x00000040
1950 #define ALT_SPIM_SR_DCOL_CLR_MSK 0xffffffbf
1952 #define ALT_SPIM_SR_DCOL_RESET 0x0
1954 #define ALT_SPIM_SR_DCOL_GET(value) (((value) & 0x00000040) >> 6)
1956 #define ALT_SPIM_SR_DCOL_SET(value) (((value) << 6) & 0x00000040)
1958 #ifndef __ASSEMBLY__
1969 struct ALT_SPIM_SR_s
1971 const uint32_t busy : 1;
1972 const uint32_t tfnf : 1;
1973 const uint32_t tfe : 1;
1974 const uint32_t rfne : 1;
1975 const uint32_t rff : 1;
1977 const uint32_t dcol : 1;
1982 typedef volatile struct ALT_SPIM_SR_s ALT_SPIM_SR_t;
1986 #define ALT_SPIM_SR_RESET 0x00000006
1988 #define ALT_SPIM_SR_OFST 0x28
1990 #define ALT_SPIM_SR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_SR_OFST))
2034 #define ALT_SPIM_IMR_TXEIM_E_MSKED 0x0
2040 #define ALT_SPIM_IMR_TXEIM_E_END 0x1
2043 #define ALT_SPIM_IMR_TXEIM_LSB 0
2045 #define ALT_SPIM_IMR_TXEIM_MSB 0
2047 #define ALT_SPIM_IMR_TXEIM_WIDTH 1
2049 #define ALT_SPIM_IMR_TXEIM_SET_MSK 0x00000001
2051 #define ALT_SPIM_IMR_TXEIM_CLR_MSK 0xfffffffe
2053 #define ALT_SPIM_IMR_TXEIM_RESET 0x1
2055 #define ALT_SPIM_IMR_TXEIM_GET(value) (((value) & 0x00000001) >> 0)
2057 #define ALT_SPIM_IMR_TXEIM_SET(value) (((value) << 0) & 0x00000001)
2083 #define ALT_SPIM_IMR_TXOIM_E_MSKED 0x0
2089 #define ALT_SPIM_IMR_TXOIM_E_END 0x1
2092 #define ALT_SPIM_IMR_TXOIM_LSB 1
2094 #define ALT_SPIM_IMR_TXOIM_MSB 1
2096 #define ALT_SPIM_IMR_TXOIM_WIDTH 1
2098 #define ALT_SPIM_IMR_TXOIM_SET_MSK 0x00000002
2100 #define ALT_SPIM_IMR_TXOIM_CLR_MSK 0xfffffffd
2102 #define ALT_SPIM_IMR_TXOIM_RESET 0x1
2104 #define ALT_SPIM_IMR_TXOIM_GET(value) (((value) & 0x00000002) >> 1)
2106 #define ALT_SPIM_IMR_TXOIM_SET(value) (((value) << 1) & 0x00000002)
2132 #define ALT_SPIM_IMR_RXUIM_E_MSKED 0x0
2138 #define ALT_SPIM_IMR_RXUIM_E_END 0x1
2141 #define ALT_SPIM_IMR_RXUIM_LSB 2
2143 #define ALT_SPIM_IMR_RXUIM_MSB 2
2145 #define ALT_SPIM_IMR_RXUIM_WIDTH 1
2147 #define ALT_SPIM_IMR_RXUIM_SET_MSK 0x00000004
2149 #define ALT_SPIM_IMR_RXUIM_CLR_MSK 0xfffffffb
2151 #define ALT_SPIM_IMR_RXUIM_RESET 0x1
2153 #define ALT_SPIM_IMR_RXUIM_GET(value) (((value) & 0x00000004) >> 2)
2155 #define ALT_SPIM_IMR_RXUIM_SET(value) (((value) << 2) & 0x00000004)
2181 #define ALT_SPIM_IMR_RXOIM_E_MSKED 0x0
2187 #define ALT_SPIM_IMR_RXOIM_E_END 0x1
2190 #define ALT_SPIM_IMR_RXOIM_LSB 3
2192 #define ALT_SPIM_IMR_RXOIM_MSB 3
2194 #define ALT_SPIM_IMR_RXOIM_WIDTH 1
2196 #define ALT_SPIM_IMR_RXOIM_SET_MSK 0x00000008
2198 #define ALT_SPIM_IMR_RXOIM_CLR_MSK 0xfffffff7
2200 #define ALT_SPIM_IMR_RXOIM_RESET 0x1
2202 #define ALT_SPIM_IMR_RXOIM_GET(value) (((value) & 0x00000008) >> 3)
2204 #define ALT_SPIM_IMR_RXOIM_SET(value) (((value) << 3) & 0x00000008)
2230 #define ALT_SPIM_IMR_RXFIM_E_MSKED 0x0
2236 #define ALT_SPIM_IMR_RXFIM_E_END 0x1
2239 #define ALT_SPIM_IMR_RXFIM_LSB 4
2241 #define ALT_SPIM_IMR_RXFIM_MSB 4
2243 #define ALT_SPIM_IMR_RXFIM_WIDTH 1
2245 #define ALT_SPIM_IMR_RXFIM_SET_MSK 0x00000010
2247 #define ALT_SPIM_IMR_RXFIM_CLR_MSK 0xffffffef
2249 #define ALT_SPIM_IMR_RXFIM_RESET 0x1
2251 #define ALT_SPIM_IMR_RXFIM_GET(value) (((value) & 0x00000010) >> 4)
2253 #define ALT_SPIM_IMR_RXFIM_SET(value) (((value) << 4) & 0x00000010)
2270 #define ALT_SPIM_IMR_MSTIM_LSB 5
2272 #define ALT_SPIM_IMR_MSTIM_MSB 5
2274 #define ALT_SPIM_IMR_MSTIM_WIDTH 1
2276 #define ALT_SPIM_IMR_MSTIM_SET_MSK 0x00000020
2278 #define ALT_SPIM_IMR_MSTIM_CLR_MSK 0xffffffdf
2280 #define ALT_SPIM_IMR_MSTIM_RESET 0x1
2282 #define ALT_SPIM_IMR_MSTIM_GET(value) (((value) & 0x00000020) >> 5)
2284 #define ALT_SPIM_IMR_MSTIM_SET(value) (((value) << 5) & 0x00000020)
2286 #ifndef __ASSEMBLY__
2297 struct ALT_SPIM_IMR_s
2309 typedef volatile struct ALT_SPIM_IMR_s ALT_SPIM_IMR_t;
2313 #define ALT_SPIM_IMR_RESET 0x0000003f
2315 #define ALT_SPIM_IMR_OFST 0x2c
2317 #define ALT_SPIM_IMR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_IMR_OFST))
2362 #define ALT_SPIM_ISR_TXEIS_E_INACT 0x0
2368 #define ALT_SPIM_ISR_TXEIS_E_ACT 0x1
2371 #define ALT_SPIM_ISR_TXEIS_LSB 0
2373 #define ALT_SPIM_ISR_TXEIS_MSB 0
2375 #define ALT_SPIM_ISR_TXEIS_WIDTH 1
2377 #define ALT_SPIM_ISR_TXEIS_SET_MSK 0x00000001
2379 #define ALT_SPIM_ISR_TXEIS_CLR_MSK 0xfffffffe
2381 #define ALT_SPIM_ISR_TXEIS_RESET 0x0
2383 #define ALT_SPIM_ISR_TXEIS_GET(value) (((value) & 0x00000001) >> 0)
2385 #define ALT_SPIM_ISR_TXEIS_SET(value) (((value) << 0) & 0x00000001)
2412 #define ALT_SPIM_ISR_TXOIS_E_INACT 0x0
2418 #define ALT_SPIM_ISR_TXOIS_E_ACT 0x1
2421 #define ALT_SPIM_ISR_TXOIS_LSB 1
2423 #define ALT_SPIM_ISR_TXOIS_MSB 1
2425 #define ALT_SPIM_ISR_TXOIS_WIDTH 1
2427 #define ALT_SPIM_ISR_TXOIS_SET_MSK 0x00000002
2429 #define ALT_SPIM_ISR_TXOIS_CLR_MSK 0xfffffffd
2431 #define ALT_SPIM_ISR_TXOIS_RESET 0x0
2433 #define ALT_SPIM_ISR_TXOIS_GET(value) (((value) & 0x00000002) >> 1)
2435 #define ALT_SPIM_ISR_TXOIS_SET(value) (((value) << 1) & 0x00000002)
2462 #define ALT_SPIM_ISR_RXUIS_E_INACT 0x0
2468 #define ALT_SPIM_ISR_RXUIS_E_ACT 0x1
2471 #define ALT_SPIM_ISR_RXUIS_LSB 2
2473 #define ALT_SPIM_ISR_RXUIS_MSB 2
2475 #define ALT_SPIM_ISR_RXUIS_WIDTH 1
2477 #define ALT_SPIM_ISR_RXUIS_SET_MSK 0x00000004
2479 #define ALT_SPIM_ISR_RXUIS_CLR_MSK 0xfffffffb
2481 #define ALT_SPIM_ISR_RXUIS_RESET 0x0
2483 #define ALT_SPIM_ISR_RXUIS_GET(value) (((value) & 0x00000004) >> 2)
2485 #define ALT_SPIM_ISR_RXUIS_SET(value) (((value) << 2) & 0x00000004)
2512 #define ALT_SPIM_ISR_RXOIS_E_INACT 0x0
2518 #define ALT_SPIM_ISR_RXOIS_E_ACT 0x1
2521 #define ALT_SPIM_ISR_RXOIS_LSB 3
2523 #define ALT_SPIM_ISR_RXOIS_MSB 3
2525 #define ALT_SPIM_ISR_RXOIS_WIDTH 1
2527 #define ALT_SPIM_ISR_RXOIS_SET_MSK 0x00000008
2529 #define ALT_SPIM_ISR_RXOIS_CLR_MSK 0xfffffff7
2531 #define ALT_SPIM_ISR_RXOIS_RESET 0x0
2533 #define ALT_SPIM_ISR_RXOIS_GET(value) (((value) & 0x00000008) >> 3)
2535 #define ALT_SPIM_ISR_RXOIS_SET(value) (((value) << 3) & 0x00000008)
2562 #define ALT_SPIM_ISR_RXFIS_E_INACT 0x0
2568 #define ALT_SPIM_ISR_RXFIS_E_ACT 0x1
2571 #define ALT_SPIM_ISR_RXFIS_LSB 4
2573 #define ALT_SPIM_ISR_RXFIS_MSB 4
2575 #define ALT_SPIM_ISR_RXFIS_WIDTH 1
2577 #define ALT_SPIM_ISR_RXFIS_SET_MSK 0x00000010
2579 #define ALT_SPIM_ISR_RXFIS_CLR_MSK 0xffffffef
2581 #define ALT_SPIM_ISR_RXFIS_RESET 0x0
2583 #define ALT_SPIM_ISR_RXFIS_GET(value) (((value) & 0x00000010) >> 4)
2585 #define ALT_SPIM_ISR_RXFIS_SET(value) (((value) << 4) & 0x00000010)
2615 #define ALT_SPIM_ISR_MSTIS_E_INACT 0x0
2621 #define ALT_SPIM_ISR_MSTIS_E_ACT 0x1
2624 #define ALT_SPIM_ISR_MSTIS_LSB 5
2626 #define ALT_SPIM_ISR_MSTIS_MSB 5
2628 #define ALT_SPIM_ISR_MSTIS_WIDTH 1
2630 #define ALT_SPIM_ISR_MSTIS_SET_MSK 0x00000020
2632 #define ALT_SPIM_ISR_MSTIS_CLR_MSK 0xffffffdf
2634 #define ALT_SPIM_ISR_MSTIS_RESET 0x0
2636 #define ALT_SPIM_ISR_MSTIS_GET(value) (((value) & 0x00000020) >> 5)
2638 #define ALT_SPIM_ISR_MSTIS_SET(value) (((value) << 5) & 0x00000020)
2640 #ifndef __ASSEMBLY__
2651 struct ALT_SPIM_ISR_s
2653 const uint32_t txeis : 1;
2654 const uint32_t txois : 1;
2655 const uint32_t rxuis : 1;
2656 const uint32_t rxois : 1;
2657 const uint32_t rxfis : 1;
2658 const uint32_t mstis : 1;
2663 typedef volatile struct ALT_SPIM_ISR_s ALT_SPIM_ISR_t;
2667 #define ALT_SPIM_ISR_RESET 0x00000000
2669 #define ALT_SPIM_ISR_OFST 0x30
2671 #define ALT_SPIM_ISR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_ISR_OFST))
2716 #define ALT_SPIM_RISR_TXEIR_E_INACT 0x0
2722 #define ALT_SPIM_RISR_TXEIR_E_ACT 0x1
2725 #define ALT_SPIM_RISR_TXEIR_LSB 0
2727 #define ALT_SPIM_RISR_TXEIR_MSB 0
2729 #define ALT_SPIM_RISR_TXEIR_WIDTH 1
2731 #define ALT_SPIM_RISR_TXEIR_SET_MSK 0x00000001
2733 #define ALT_SPIM_RISR_TXEIR_CLR_MSK 0xfffffffe
2735 #define ALT_SPIM_RISR_TXEIR_RESET 0x0
2737 #define ALT_SPIM_RISR_TXEIR_GET(value) (((value) & 0x00000001) >> 0)
2739 #define ALT_SPIM_RISR_TXEIR_SET(value) (((value) << 0) & 0x00000001)
2766 #define ALT_SPIM_RISR_TXOIR_E_INACT 0x0
2772 #define ALT_SPIM_RISR_TXOIR_E_ACT 0x1
2775 #define ALT_SPIM_RISR_TXOIR_LSB 1
2777 #define ALT_SPIM_RISR_TXOIR_MSB 1
2779 #define ALT_SPIM_RISR_TXOIR_WIDTH 1
2781 #define ALT_SPIM_RISR_TXOIR_SET_MSK 0x00000002
2783 #define ALT_SPIM_RISR_TXOIR_CLR_MSK 0xfffffffd
2785 #define ALT_SPIM_RISR_TXOIR_RESET 0x0
2787 #define ALT_SPIM_RISR_TXOIR_GET(value) (((value) & 0x00000002) >> 1)
2789 #define ALT_SPIM_RISR_TXOIR_SET(value) (((value) << 1) & 0x00000002)
2817 #define ALT_SPIM_RISR_RXUIR_E_INACT 0x0
2823 #define ALT_SPIM_RISR_RXUIR_E_ACT 0x1
2826 #define ALT_SPIM_RISR_RXUIR_LSB 2
2828 #define ALT_SPIM_RISR_RXUIR_MSB 2
2830 #define ALT_SPIM_RISR_RXUIR_WIDTH 1
2832 #define ALT_SPIM_RISR_RXUIR_SET_MSK 0x00000004
2834 #define ALT_SPIM_RISR_RXUIR_CLR_MSK 0xfffffffb
2836 #define ALT_SPIM_RISR_RXUIR_RESET 0x0
2838 #define ALT_SPIM_RISR_RXUIR_GET(value) (((value) & 0x00000004) >> 2)
2840 #define ALT_SPIM_RISR_RXUIR_SET(value) (((value) << 2) & 0x00000004)
2867 #define ALT_SPIM_RISR_RXOIR_E_INACTOVE 0x0
2873 #define ALT_SPIM_RISR_RXOIR_E_ACT 0x1
2876 #define ALT_SPIM_RISR_RXOIR_LSB 3
2878 #define ALT_SPIM_RISR_RXOIR_MSB 3
2880 #define ALT_SPIM_RISR_RXOIR_WIDTH 1
2882 #define ALT_SPIM_RISR_RXOIR_SET_MSK 0x00000008
2884 #define ALT_SPIM_RISR_RXOIR_CLR_MSK 0xfffffff7
2886 #define ALT_SPIM_RISR_RXOIR_RESET 0x0
2888 #define ALT_SPIM_RISR_RXOIR_GET(value) (((value) & 0x00000008) >> 3)
2890 #define ALT_SPIM_RISR_RXOIR_SET(value) (((value) << 3) & 0x00000008)
2918 #define ALT_SPIM_RISR_RXFIR_E_INACT 0x0
2924 #define ALT_SPIM_RISR_RXFIR_E_ACT 0x1
2927 #define ALT_SPIM_RISR_RXFIR_LSB 4
2929 #define ALT_SPIM_RISR_RXFIR_MSB 4
2931 #define ALT_SPIM_RISR_RXFIR_WIDTH 1
2933 #define ALT_SPIM_RISR_RXFIR_SET_MSK 0x00000010
2935 #define ALT_SPIM_RISR_RXFIR_CLR_MSK 0xffffffef
2937 #define ALT_SPIM_RISR_RXFIR_RESET 0x0
2939 #define ALT_SPIM_RISR_RXFIR_GET(value) (((value) & 0x00000010) >> 4)
2941 #define ALT_SPIM_RISR_RXFIR_SET(value) (((value) << 4) & 0x00000010)
2960 #define ALT_SPIM_RISR_MSTIR_LSB 5
2962 #define ALT_SPIM_RISR_MSTIR_MSB 5
2964 #define ALT_SPIM_RISR_MSTIR_WIDTH 1
2966 #define ALT_SPIM_RISR_MSTIR_SET_MSK 0x00000020
2968 #define ALT_SPIM_RISR_MSTIR_CLR_MSK 0xffffffdf
2970 #define ALT_SPIM_RISR_MSTIR_RESET 0x0
2972 #define ALT_SPIM_RISR_MSTIR_GET(value) (((value) & 0x00000020) >> 5)
2974 #define ALT_SPIM_RISR_MSTIR_SET(value) (((value) << 5) & 0x00000020)
2976 #ifndef __ASSEMBLY__
2987 struct ALT_SPIM_RISR_s
2989 const uint32_t txeir : 1;
2990 const uint32_t txoir : 1;
2991 const uint32_t rxuir : 1;
2992 const uint32_t rxoir : 1;
2993 const uint32_t rxfir : 1;
2994 const uint32_t mstir : 1;
2999 typedef volatile struct ALT_SPIM_RISR_s ALT_SPIM_RISR_t;
3003 #define ALT_SPIM_RISR_RESET 0x00000000
3005 #define ALT_SPIM_RISR_OFST 0x34
3007 #define ALT_SPIM_RISR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RISR_OFST))
3035 #define ALT_SPIM_TXOICR_TXOICR_LSB 0
3037 #define ALT_SPIM_TXOICR_TXOICR_MSB 0
3039 #define ALT_SPIM_TXOICR_TXOICR_WIDTH 1
3041 #define ALT_SPIM_TXOICR_TXOICR_SET_MSK 0x00000001
3043 #define ALT_SPIM_TXOICR_TXOICR_CLR_MSK 0xfffffffe
3045 #define ALT_SPIM_TXOICR_TXOICR_RESET 0x0
3047 #define ALT_SPIM_TXOICR_TXOICR_GET(value) (((value) & 0x00000001) >> 0)
3049 #define ALT_SPIM_TXOICR_TXOICR_SET(value) (((value) << 0) & 0x00000001)
3051 #ifndef __ASSEMBLY__
3062 struct ALT_SPIM_TXOICR_s
3064 const uint32_t txoicr : 1;
3069 typedef volatile struct ALT_SPIM_TXOICR_s ALT_SPIM_TXOICR_t;
3073 #define ALT_SPIM_TXOICR_RESET 0x00000000
3075 #define ALT_SPIM_TXOICR_OFST 0x38
3077 #define ALT_SPIM_TXOICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_TXOICR_OFST))
3105 #define ALT_SPIM_RXOICR_RXOICR_LSB 0
3107 #define ALT_SPIM_RXOICR_RXOICR_MSB 0
3109 #define ALT_SPIM_RXOICR_RXOICR_WIDTH 1
3111 #define ALT_SPIM_RXOICR_RXOICR_SET_MSK 0x00000001
3113 #define ALT_SPIM_RXOICR_RXOICR_CLR_MSK 0xfffffffe
3115 #define ALT_SPIM_RXOICR_RXOICR_RESET 0x0
3117 #define ALT_SPIM_RXOICR_RXOICR_GET(value) (((value) & 0x00000001) >> 0)
3119 #define ALT_SPIM_RXOICR_RXOICR_SET(value) (((value) << 0) & 0x00000001)
3121 #ifndef __ASSEMBLY__
3132 struct ALT_SPIM_RXOICR_s
3134 const uint32_t rxoicr : 1;
3139 typedef volatile struct ALT_SPIM_RXOICR_s ALT_SPIM_RXOICR_t;
3143 #define ALT_SPIM_RXOICR_RESET 0x00000000
3145 #define ALT_SPIM_RXOICR_OFST 0x3c
3147 #define ALT_SPIM_RXOICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXOICR_OFST))
3175 #define ALT_SPIM_RXUICR_RXUICR_LSB 0
3177 #define ALT_SPIM_RXUICR_RXUICR_MSB 0
3179 #define ALT_SPIM_RXUICR_RXUICR_WIDTH 1
3181 #define ALT_SPIM_RXUICR_RXUICR_SET_MSK 0x00000001
3183 #define ALT_SPIM_RXUICR_RXUICR_CLR_MSK 0xfffffffe
3185 #define ALT_SPIM_RXUICR_RXUICR_RESET 0x0
3187 #define ALT_SPIM_RXUICR_RXUICR_GET(value) (((value) & 0x00000001) >> 0)
3189 #define ALT_SPIM_RXUICR_RXUICR_SET(value) (((value) << 0) & 0x00000001)
3191 #ifndef __ASSEMBLY__
3202 struct ALT_SPIM_RXUICR_s
3204 const uint32_t rxuicr : 1;
3209 typedef volatile struct ALT_SPIM_RXUICR_s ALT_SPIM_RXUICR_t;
3213 #define ALT_SPIM_RXUICR_RESET 0x00000000
3215 #define ALT_SPIM_RXUICR_OFST 0x40
3217 #define ALT_SPIM_RXUICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXUICR_OFST))
3245 #define ALT_SPIM_MSTICR_MSTICR_LSB 0
3247 #define ALT_SPIM_MSTICR_MSTICR_MSB 0
3249 #define ALT_SPIM_MSTICR_MSTICR_WIDTH 1
3251 #define ALT_SPIM_MSTICR_MSTICR_SET_MSK 0x00000001
3253 #define ALT_SPIM_MSTICR_MSTICR_CLR_MSK 0xfffffffe
3255 #define ALT_SPIM_MSTICR_MSTICR_RESET 0x0
3257 #define ALT_SPIM_MSTICR_MSTICR_GET(value) (((value) & 0x00000001) >> 0)
3259 #define ALT_SPIM_MSTICR_MSTICR_SET(value) (((value) << 0) & 0x00000001)
3261 #ifndef __ASSEMBLY__
3272 struct ALT_SPIM_MSTICR_s
3274 const uint32_t msticr : 1;
3279 typedef volatile struct ALT_SPIM_MSTICR_s ALT_SPIM_MSTICR_t;
3283 #define ALT_SPIM_MSTICR_RESET 0x00000000
3285 #define ALT_SPIM_MSTICR_OFST 0x44
3287 #define ALT_SPIM_MSTICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_MSTICR_OFST))
3317 #define ALT_SPIM_ICR_ICR_LSB 0
3319 #define ALT_SPIM_ICR_ICR_MSB 0
3321 #define ALT_SPIM_ICR_ICR_WIDTH 1
3323 #define ALT_SPIM_ICR_ICR_SET_MSK 0x00000001
3325 #define ALT_SPIM_ICR_ICR_CLR_MSK 0xfffffffe
3327 #define ALT_SPIM_ICR_ICR_RESET 0x0
3329 #define ALT_SPIM_ICR_ICR_GET(value) (((value) & 0x00000001) >> 0)
3331 #define ALT_SPIM_ICR_ICR_SET(value) (((value) << 0) & 0x00000001)
3333 #ifndef __ASSEMBLY__
3344 struct ALT_SPIM_ICR_s
3346 const uint32_t icr : 1;
3351 typedef volatile struct ALT_SPIM_ICR_s ALT_SPIM_ICR_t;
3355 #define ALT_SPIM_ICR_RESET 0x00000000
3357 #define ALT_SPIM_ICR_OFST 0x48
3359 #define ALT_SPIM_ICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_ICR_OFST))
3413 #define ALT_SPIM_DMACR_RDMAE_E_DISD 0x0
3419 #define ALT_SPIM_DMACR_RDMAE_E_END 0x1
3422 #define ALT_SPIM_DMACR_RDMAE_LSB 0
3424 #define ALT_SPIM_DMACR_RDMAE_MSB 0
3426 #define ALT_SPIM_DMACR_RDMAE_WIDTH 1
3428 #define ALT_SPIM_DMACR_RDMAE_SET_MSK 0x00000001
3430 #define ALT_SPIM_DMACR_RDMAE_CLR_MSK 0xfffffffe
3432 #define ALT_SPIM_DMACR_RDMAE_RESET 0x0
3434 #define ALT_SPIM_DMACR_RDMAE_GET(value) (((value) & 0x00000001) >> 0)
3436 #define ALT_SPIM_DMACR_RDMAE_SET(value) (((value) << 0) & 0x00000001)
3464 #define ALT_SPIM_DMACR_TDMAE_E_DISD 0x0
3470 #define ALT_SPIM_DMACR_TDMAE_E_END 0x1
3473 #define ALT_SPIM_DMACR_TDMAE_LSB 1
3475 #define ALT_SPIM_DMACR_TDMAE_MSB 1
3477 #define ALT_SPIM_DMACR_TDMAE_WIDTH 1
3479 #define ALT_SPIM_DMACR_TDMAE_SET_MSK 0x00000002
3481 #define ALT_SPIM_DMACR_TDMAE_CLR_MSK 0xfffffffd
3483 #define ALT_SPIM_DMACR_TDMAE_RESET 0x0
3485 #define ALT_SPIM_DMACR_TDMAE_GET(value) (((value) & 0x00000002) >> 1)
3487 #define ALT_SPIM_DMACR_TDMAE_SET(value) (((value) << 1) & 0x00000002)
3489 #ifndef __ASSEMBLY__
3500 struct ALT_SPIM_DMACR_s
3508 typedef volatile struct ALT_SPIM_DMACR_s ALT_SPIM_DMACR_t;
3512 #define ALT_SPIM_DMACR_RESET 0x00000000
3514 #define ALT_SPIM_DMACR_OFST 0x4c
3516 #define ALT_SPIM_DMACR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_DMACR_OFST))
3558 #define ALT_SPIM_DMATDLR_DMATDL_LSB 0
3560 #define ALT_SPIM_DMATDLR_DMATDL_MSB 7
3562 #define ALT_SPIM_DMATDLR_DMATDL_WIDTH 8
3564 #define ALT_SPIM_DMATDLR_DMATDL_SET_MSK 0x000000ff
3566 #define ALT_SPIM_DMATDLR_DMATDL_CLR_MSK 0xffffff00
3568 #define ALT_SPIM_DMATDLR_DMATDL_RESET 0x0
3570 #define ALT_SPIM_DMATDLR_DMATDL_GET(value) (((value) & 0x000000ff) >> 0)
3572 #define ALT_SPIM_DMATDLR_DMATDL_SET(value) (((value) << 0) & 0x000000ff)
3574 #ifndef __ASSEMBLY__
3585 struct ALT_SPIM_DMATDLR_s
3587 uint32_t dmatdl : 8;
3592 typedef volatile struct ALT_SPIM_DMATDLR_s ALT_SPIM_DMATDLR_t;
3596 #define ALT_SPIM_DMATDLR_RESET 0x00000000
3598 #define ALT_SPIM_DMATDLR_OFST 0x50
3600 #define ALT_SPIM_DMATDLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_DMATDLR_OFST))
3640 #define ALT_SPIM_DMARDLR_DMARDL_LSB 0
3642 #define ALT_SPIM_DMARDLR_DMARDL_MSB 7
3644 #define ALT_SPIM_DMARDLR_DMARDL_WIDTH 8
3646 #define ALT_SPIM_DMARDLR_DMARDL_SET_MSK 0x000000ff
3648 #define ALT_SPIM_DMARDLR_DMARDL_CLR_MSK 0xffffff00
3650 #define ALT_SPIM_DMARDLR_DMARDL_RESET 0x0
3652 #define ALT_SPIM_DMARDLR_DMARDL_GET(value) (((value) & 0x000000ff) >> 0)
3654 #define ALT_SPIM_DMARDLR_DMARDL_SET(value) (((value) << 0) & 0x000000ff)
3656 #ifndef __ASSEMBLY__
3667 struct ALT_SPIM_DMARDLR_s
3669 uint32_t dmardl : 8;
3674 typedef volatile struct ALT_SPIM_DMARDLR_s ALT_SPIM_DMARDLR_t;
3678 #define ALT_SPIM_DMARDLR_RESET 0x00000000
3680 #define ALT_SPIM_DMARDLR_OFST 0x54
3682 #define ALT_SPIM_DMARDLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_DMARDLR_OFST))
3709 #define ALT_SPIM_IDR_IDR_LSB 0
3711 #define ALT_SPIM_IDR_IDR_MSB 31
3713 #define ALT_SPIM_IDR_IDR_WIDTH 32
3715 #define ALT_SPIM_IDR_IDR_SET_MSK 0xffffffff
3717 #define ALT_SPIM_IDR_IDR_CLR_MSK 0x00000000
3719 #define ALT_SPIM_IDR_IDR_RESET 0x5510000
3721 #define ALT_SPIM_IDR_IDR_GET(value) (((value) & 0xffffffff) >> 0)
3723 #define ALT_SPIM_IDR_IDR_SET(value) (((value) << 0) & 0xffffffff)
3725 #ifndef __ASSEMBLY__
3736 struct ALT_SPIM_IDR_s
3738 const uint32_t idr : 32;
3742 typedef volatile struct ALT_SPIM_IDR_s ALT_SPIM_IDR_t;
3746 #define ALT_SPIM_IDR_RESET 0x05510000
3748 #define ALT_SPIM_IDR_OFST 0x58
3750 #define ALT_SPIM_IDR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_IDR_OFST))
3774 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_LSB 0
3776 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_MSB 31
3778 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_WIDTH 32
3780 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_SET_MSK 0xffffffff
3782 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_CLR_MSK 0x00000000
3784 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_RESET 0x3332322a
3786 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_GET(value) (((value) & 0xffffffff) >> 0)
3788 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_SET(value) (((value) << 0) & 0xffffffff)
3790 #ifndef __ASSEMBLY__
3801 struct ALT_SPIM_SPI_VER_ID_s
3803 uint32_t spi_version_id : 32;
3807 typedef volatile struct ALT_SPIM_SPI_VER_ID_s ALT_SPIM_SPI_VER_ID_t;
3811 #define ALT_SPIM_SPI_VER_ID_RESET 0x3332322a
3813 #define ALT_SPIM_SPI_VER_ID_OFST 0x5c
3815 #define ALT_SPIM_SPI_VER_ID_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_SPI_VER_ID_OFST))
3855 #define ALT_SPIM_DR_DR_LSB 0
3857 #define ALT_SPIM_DR_DR_MSB 15
3859 #define ALT_SPIM_DR_DR_WIDTH 16
3861 #define ALT_SPIM_DR_DR_SET_MSK 0x0000ffff
3863 #define ALT_SPIM_DR_DR_CLR_MSK 0xffff0000
3865 #define ALT_SPIM_DR_DR_RESET 0x0
3867 #define ALT_SPIM_DR_DR_GET(value) (((value) & 0x0000ffff) >> 0)
3869 #define ALT_SPIM_DR_DR_SET(value) (((value) << 0) & 0x0000ffff)
3871 #ifndef __ASSEMBLY__
3882 struct ALT_SPIM_DR_s
3889 typedef volatile struct ALT_SPIM_DR_s ALT_SPIM_DR_t;
3893 #define ALT_SPIM_DR_RESET 0x00000000
3895 #define ALT_SPIM_DR_OFST 0x60
3897 #define ALT_SPIM_DR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_DR_OFST))
3947 #define ALT_SPIM_RX_SMPL_DLY_RSD_LSB 0
3949 #define ALT_SPIM_RX_SMPL_DLY_RSD_MSB 7
3951 #define ALT_SPIM_RX_SMPL_DLY_RSD_WIDTH 8
3953 #define ALT_SPIM_RX_SMPL_DLY_RSD_SET_MSK 0x000000ff
3955 #define ALT_SPIM_RX_SMPL_DLY_RSD_CLR_MSK 0xffffff00
3957 #define ALT_SPIM_RX_SMPL_DLY_RSD_RESET 0x0
3959 #define ALT_SPIM_RX_SMPL_DLY_RSD_GET(value) (((value) & 0x000000ff) >> 0)
3961 #define ALT_SPIM_RX_SMPL_DLY_RSD_SET(value) (((value) << 0) & 0x000000ff)
3963 #ifndef __ASSEMBLY__
3974 struct ALT_SPIM_RX_SMPL_DLY_s
3981 typedef volatile struct ALT_SPIM_RX_SMPL_DLY_s ALT_SPIM_RX_SMPL_DLY_t;
3985 #define ALT_SPIM_RX_SMPL_DLY_RESET 0x00000000
3987 #define ALT_SPIM_RX_SMPL_DLY_OFST 0xf0
3989 #define ALT_SPIM_RX_SMPL_DLY_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RX_SMPL_DLY_OFST))
4012 #define ALT_SPIM_RSVD_0_FLD_LSB 0
4014 #define ALT_SPIM_RSVD_0_FLD_MSB 31
4016 #define ALT_SPIM_RSVD_0_FLD_WIDTH 32
4018 #define ALT_SPIM_RSVD_0_FLD_SET_MSK 0xffffffff
4020 #define ALT_SPIM_RSVD_0_FLD_CLR_MSK 0x00000000
4022 #define ALT_SPIM_RSVD_0_FLD_RESET 0x0
4024 #define ALT_SPIM_RSVD_0_FLD_GET(value) (((value) & 0xffffffff) >> 0)
4026 #define ALT_SPIM_RSVD_0_FLD_SET(value) (((value) << 0) & 0xffffffff)
4028 #ifndef __ASSEMBLY__
4039 struct ALT_SPIM_RSVD_0_s
4045 typedef volatile struct ALT_SPIM_RSVD_0_s ALT_SPIM_RSVD_0_t;
4049 #define ALT_SPIM_RSVD_0_RESET 0x00000000
4051 #define ALT_SPIM_RSVD_0_OFST 0xf4
4053 #define ALT_SPIM_RSVD_0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RSVD_0_OFST))
4076 #define ALT_SPIM_RSVD_1_FLD_LSB 0
4078 #define ALT_SPIM_RSVD_1_FLD_MSB 31
4080 #define ALT_SPIM_RSVD_1_FLD_WIDTH 32
4082 #define ALT_SPIM_RSVD_1_FLD_SET_MSK 0xffffffff
4084 #define ALT_SPIM_RSVD_1_FLD_CLR_MSK 0x00000000
4086 #define ALT_SPIM_RSVD_1_FLD_RESET 0x0
4088 #define ALT_SPIM_RSVD_1_FLD_GET(value) (((value) & 0xffffffff) >> 0)
4090 #define ALT_SPIM_RSVD_1_FLD_SET(value) (((value) << 0) & 0xffffffff)
4092 #ifndef __ASSEMBLY__
4103 struct ALT_SPIM_RSVD_1_s
4109 typedef volatile struct ALT_SPIM_RSVD_1_s ALT_SPIM_RSVD_1_t;
4113 #define ALT_SPIM_RSVD_1_RESET 0x00000000
4115 #define ALT_SPIM_RSVD_1_OFST 0xf8
4117 #define ALT_SPIM_RSVD_1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RSVD_1_OFST))
4140 #define ALT_SPIM_RSVD_2_FLD_LSB 0
4142 #define ALT_SPIM_RSVD_2_FLD_MSB 31
4144 #define ALT_SPIM_RSVD_2_FLD_WIDTH 32
4146 #define ALT_SPIM_RSVD_2_FLD_SET_MSK 0xffffffff
4148 #define ALT_SPIM_RSVD_2_FLD_CLR_MSK 0x00000000
4150 #define ALT_SPIM_RSVD_2_FLD_RESET 0x0
4152 #define ALT_SPIM_RSVD_2_FLD_GET(value) (((value) & 0xffffffff) >> 0)
4154 #define ALT_SPIM_RSVD_2_FLD_SET(value) (((value) << 0) & 0xffffffff)
4156 #ifndef __ASSEMBLY__
4167 struct ALT_SPIM_RSVD_2_s
4173 typedef volatile struct ALT_SPIM_RSVD_2_s ALT_SPIM_RSVD_2_t;
4177 #define ALT_SPIM_RSVD_2_RESET 0x00000000
4179 #define ALT_SPIM_RSVD_2_OFST 0xfc
4181 #define ALT_SPIM_RSVD_2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RSVD_2_OFST))
4183 #ifndef __ASSEMBLY__
4196 ALT_SPIM_CTLR0_t ctrlr0;
4197 ALT_SPIM_CTLR1_t ctrlr1;
4198 ALT_SPIM_SPIENR_t spienr;
4199 ALT_SPIM_MWCR_t mwcr;
4201 ALT_SPIM_BAUDR_t baudr;
4202 ALT_SPIM_TXFTLR_t txftlr;
4203 ALT_SPIM_RXFTLR_t rxftlr;
4204 ALT_SPIM_TXFLR_t txflr;
4205 ALT_SPIM_RXFLR_t rxflr;
4209 ALT_SPIM_RISR_t risr;
4210 ALT_SPIM_TXOICR_t txoicr;
4211 ALT_SPIM_RXOICR_t rxoicr;
4212 ALT_SPIM_RXUICR_t rxuicr;
4213 ALT_SPIM_MSTICR_t msticr;
4215 ALT_SPIM_DMACR_t dmacr;
4216 ALT_SPIM_DMATDLR_t dmatdlr;
4217 ALT_SPIM_DMARDLR_t dmardlr;
4219 ALT_SPIM_SPI_VER_ID_t spi_version_id;
4221 volatile uint32_t _pad_0x64_0xef[35];
4222 ALT_SPIM_RX_SMPL_DLY_t rx_sample_dly;
4223 ALT_SPIM_RSVD_0_t rsvd_0;
4224 ALT_SPIM_RSVD_1_t rsvd_1;
4225 ALT_SPIM_RSVD_2_t rsvd_2;
4229 typedef volatile struct ALT_SPIM_s ALT_SPIM_t;
4231 struct ALT_SPIM_raw_s
4233 volatile uint32_t ctrlr0;
4234 volatile uint32_t ctrlr1;
4235 volatile uint32_t spienr;
4236 volatile uint32_t mwcr;
4237 volatile uint32_t ser;
4238 volatile uint32_t baudr;
4239 volatile uint32_t txftlr;
4240 volatile uint32_t rxftlr;
4241 volatile uint32_t txflr;
4242 volatile uint32_t rxflr;
4243 volatile uint32_t sr;
4244 volatile uint32_t imr;
4245 volatile uint32_t isr;
4246 volatile uint32_t risr;
4247 volatile uint32_t txoicr;
4248 volatile uint32_t rxoicr;
4249 volatile uint32_t rxuicr;
4250 volatile uint32_t msticr;
4251 volatile uint32_t icr;
4252 volatile uint32_t dmacr;
4253 volatile uint32_t dmatdlr;
4254 volatile uint32_t dmardlr;
4255 volatile uint32_t idr;
4256 volatile uint32_t spi_version_id;
4257 volatile uint32_t dr;
4258 uint32_t _pad_0x64_0xef[35];
4259 volatile uint32_t rx_sample_dly;
4260 volatile uint32_t rsvd_0;
4261 volatile uint32_t rsvd_1;
4262 volatile uint32_t rsvd_2;
4266 typedef volatile struct ALT_SPIM_raw_s ALT_SPIM_raw_t;