35 #ifndef __ALTERA_ALT_SPIM_H__
36 #define __ALTERA_ALT_SPIM_H__
101 #define ALT_SPIM_CTLR0_DFS_E_WIDTH4BIT 0x3
107 #define ALT_SPIM_CTLR0_DFS_E_WIDTH5BIT 0x4
113 #define ALT_SPIM_CTLR0_DFS_E_WIDTH6BIT 0x5
119 #define ALT_SPIM_CTLR0_DFS_E_WIDTH7BIT 0x6
125 #define ALT_SPIM_CTLR0_DFS_E_WIDTH8BIT 0x7
131 #define ALT_SPIM_CTLR0_DFS_E_WIDTH9BIT 0x8
137 #define ALT_SPIM_CTLR0_DFS_E_WIDTH10BIT 0x9
140 #define ALT_SPIM_CTLR0_DFS_LSB 0
142 #define ALT_SPIM_CTLR0_DFS_MSB 3
144 #define ALT_SPIM_CTLR0_DFS_WIDTH 4
146 #define ALT_SPIM_CTLR0_DFS_SET_MSK 0x0000000f
148 #define ALT_SPIM_CTLR0_DFS_CLR_MSK 0xfffffff0
150 #define ALT_SPIM_CTLR0_DFS_RESET 0x7
152 #define ALT_SPIM_CTLR0_DFS_GET(value) (((value) & 0x0000000f) >> 0)
154 #define ALT_SPIM_CTLR0_DFS_SET(value) (((value) << 0) & 0x0000000f)
177 #define ALT_SPIM_CTLR0_FRF_E_MOTSPI 0x0
183 #define ALT_SPIM_CTLR0_FRF_E_TISSP 0x1
189 #define ALT_SPIM_CTLR0_FRF_E_NATMW 0x2
192 #define ALT_SPIM_CTLR0_FRF_LSB 4
194 #define ALT_SPIM_CTLR0_FRF_MSB 5
196 #define ALT_SPIM_CTLR0_FRF_WIDTH 2
198 #define ALT_SPIM_CTLR0_FRF_SET_MSK 0x00000030
200 #define ALT_SPIM_CTLR0_FRF_CLR_MSK 0xffffffcf
202 #define ALT_SPIM_CTLR0_FRF_RESET 0x0
204 #define ALT_SPIM_CTLR0_FRF_GET(value) (((value) & 0x00000030) >> 4)
206 #define ALT_SPIM_CTLR0_FRF_SET(value) (((value) << 4) & 0x00000030)
232 #define ALT_SPIM_CTLR0_SCPH_E_MIDBIT 0x0
238 #define ALT_SPIM_CTLR0_SCPH_E_STARTBIT 0x1
241 #define ALT_SPIM_CTLR0_SCPH_LSB 6
243 #define ALT_SPIM_CTLR0_SCPH_MSB 6
245 #define ALT_SPIM_CTLR0_SCPH_WIDTH 1
247 #define ALT_SPIM_CTLR0_SCPH_SET_MSK 0x00000040
249 #define ALT_SPIM_CTLR0_SCPH_CLR_MSK 0xffffffbf
251 #define ALT_SPIM_CTLR0_SCPH_RESET 0x0
253 #define ALT_SPIM_CTLR0_SCPH_GET(value) (((value) & 0x00000040) >> 6)
255 #define ALT_SPIM_CTLR0_SCPH_SET(value) (((value) << 6) & 0x00000040)
279 #define ALT_SPIM_CTLR0_SCPOL_E_INACTLOW 0x0
285 #define ALT_SPIM_CTLR0_SCPOL_E_INACTHIGH 0x1
288 #define ALT_SPIM_CTLR0_SCPOL_LSB 7
290 #define ALT_SPIM_CTLR0_SCPOL_MSB 7
292 #define ALT_SPIM_CTLR0_SCPOL_WIDTH 1
294 #define ALT_SPIM_CTLR0_SCPOL_SET_MSK 0x00000080
296 #define ALT_SPIM_CTLR0_SCPOL_CLR_MSK 0xffffff7f
298 #define ALT_SPIM_CTLR0_SCPOL_RESET 0x0
300 #define ALT_SPIM_CTLR0_SCPOL_GET(value) (((value) & 0x00000080) >> 7)
302 #define ALT_SPIM_CTLR0_SCPOL_SET(value) (((value) << 7) & 0x00000080)
335 #define ALT_SPIM_CTLR0_TMOD_E_TXRX 0x0
341 #define ALT_SPIM_CTLR0_TMOD_E_TXONLY 0x1
347 #define ALT_SPIM_CTLR0_TMOD_E_RXONLY 0x2
353 #define ALT_SPIM_CTLR0_TMOD_E_EERD 0x3
356 #define ALT_SPIM_CTLR0_TMOD_LSB 8
358 #define ALT_SPIM_CTLR0_TMOD_MSB 9
360 #define ALT_SPIM_CTLR0_TMOD_WIDTH 2
362 #define ALT_SPIM_CTLR0_TMOD_SET_MSK 0x00000300
364 #define ALT_SPIM_CTLR0_TMOD_CLR_MSK 0xfffffcff
366 #define ALT_SPIM_CTLR0_TMOD_RESET 0x0
368 #define ALT_SPIM_CTLR0_TMOD_GET(value) (((value) & 0x00000300) >> 8)
370 #define ALT_SPIM_CTLR0_TMOD_SET(value) (((value) << 8) & 0x00000300)
393 #define ALT_SPIM_CTLR0_SRL_E_NORMMOD 0x0
399 #define ALT_SPIM_CTLR0_SRL_E_TESTMOD 0x1
402 #define ALT_SPIM_CTLR0_SRL_LSB 11
404 #define ALT_SPIM_CTLR0_SRL_MSB 11
406 #define ALT_SPIM_CTLR0_SRL_WIDTH 1
408 #define ALT_SPIM_CTLR0_SRL_SET_MSK 0x00000800
410 #define ALT_SPIM_CTLR0_SRL_CLR_MSK 0xfffff7ff
412 #define ALT_SPIM_CTLR0_SRL_RESET 0x0
414 #define ALT_SPIM_CTLR0_SRL_GET(value) (((value) & 0x00000800) >> 11)
416 #define ALT_SPIM_CTLR0_SRL_SET(value) (((value) << 11) & 0x00000800)
428 #define ALT_SPIM_CTLR0_CFS_LSB 12
430 #define ALT_SPIM_CTLR0_CFS_MSB 15
432 #define ALT_SPIM_CTLR0_CFS_WIDTH 4
434 #define ALT_SPIM_CTLR0_CFS_SET_MSK 0x0000f000
436 #define ALT_SPIM_CTLR0_CFS_CLR_MSK 0xffff0fff
438 #define ALT_SPIM_CTLR0_CFS_RESET 0x0
440 #define ALT_SPIM_CTLR0_CFS_GET(value) (((value) & 0x0000f000) >> 12)
442 #define ALT_SPIM_CTLR0_CFS_SET(value) (((value) << 12) & 0x0000f000)
455 struct ALT_SPIM_CTLR0_s
469 typedef volatile struct ALT_SPIM_CTLR0_s ALT_SPIM_CTLR0_t;
473 #define ALT_SPIM_CTLR0_OFST 0x0
475 #define ALT_SPIM_CTLR0_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_CTLR0_OFST))
506 #define ALT_SPIM_CTLR1_NDF_LSB 0
508 #define ALT_SPIM_CTLR1_NDF_MSB 15
510 #define ALT_SPIM_CTLR1_NDF_WIDTH 16
512 #define ALT_SPIM_CTLR1_NDF_SET_MSK 0x0000ffff
514 #define ALT_SPIM_CTLR1_NDF_CLR_MSK 0xffff0000
516 #define ALT_SPIM_CTLR1_NDF_RESET 0x0
518 #define ALT_SPIM_CTLR1_NDF_GET(value) (((value) & 0x0000ffff) >> 0)
520 #define ALT_SPIM_CTLR1_NDF_SET(value) (((value) << 0) & 0x0000ffff)
533 struct ALT_SPIM_CTLR1_s
540 typedef volatile struct ALT_SPIM_CTLR1_s ALT_SPIM_CTLR1_t;
544 #define ALT_SPIM_CTLR1_OFST 0x4
546 #define ALT_SPIM_CTLR1_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_CTLR1_OFST))
584 #define ALT_SPIM_SPIENR_SPI_EN_E_DISD 0x0
590 #define ALT_SPIM_SPIENR_SPI_EN_E_END 0x1
593 #define ALT_SPIM_SPIENR_SPI_EN_LSB 0
595 #define ALT_SPIM_SPIENR_SPI_EN_MSB 0
597 #define ALT_SPIM_SPIENR_SPI_EN_WIDTH 1
599 #define ALT_SPIM_SPIENR_SPI_EN_SET_MSK 0x00000001
601 #define ALT_SPIM_SPIENR_SPI_EN_CLR_MSK 0xfffffffe
603 #define ALT_SPIM_SPIENR_SPI_EN_RESET 0x0
605 #define ALT_SPIM_SPIENR_SPI_EN_GET(value) (((value) & 0x00000001) >> 0)
607 #define ALT_SPIM_SPIENR_SPI_EN_SET(value) (((value) << 0) & 0x00000001)
620 struct ALT_SPIM_SPIENR_s
627 typedef volatile struct ALT_SPIM_SPIENR_s ALT_SPIM_SPIENR_t;
631 #define ALT_SPIM_SPIENR_OFST 0x8
633 #define ALT_SPIM_SPIENR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_SPIENR_OFST))
676 #define ALT_SPIM_MWCR_MWMOD_E_NONSEQ 0x0
682 #define ALT_SPIM_MWCR_MWMOD_E_SEQ 0x1
685 #define ALT_SPIM_MWCR_MWMOD_LSB 0
687 #define ALT_SPIM_MWCR_MWMOD_MSB 0
689 #define ALT_SPIM_MWCR_MWMOD_WIDTH 1
691 #define ALT_SPIM_MWCR_MWMOD_SET_MSK 0x00000001
693 #define ALT_SPIM_MWCR_MWMOD_CLR_MSK 0xfffffffe
695 #define ALT_SPIM_MWCR_MWMOD_RESET 0x0
697 #define ALT_SPIM_MWCR_MWMOD_GET(value) (((value) & 0x00000001) >> 0)
699 #define ALT_SPIM_MWCR_MWMOD_SET(value) (((value) << 0) & 0x00000001)
722 #define ALT_SPIM_MWCR_MDD_E_RXMOD 0x0
728 #define ALT_SPIM_MWCR_MDD_E_TXMOD 0x1
731 #define ALT_SPIM_MWCR_MDD_LSB 1
733 #define ALT_SPIM_MWCR_MDD_MSB 1
735 #define ALT_SPIM_MWCR_MDD_WIDTH 1
737 #define ALT_SPIM_MWCR_MDD_SET_MSK 0x00000002
739 #define ALT_SPIM_MWCR_MDD_CLR_MSK 0xfffffffd
741 #define ALT_SPIM_MWCR_MDD_RESET 0x0
743 #define ALT_SPIM_MWCR_MDD_GET(value) (((value) & 0x00000002) >> 1)
745 #define ALT_SPIM_MWCR_MDD_SET(value) (((value) << 1) & 0x00000002)
770 #define ALT_SPIM_MWCR_MHS_E_DISD 0x0
776 #define ALT_SPIM_MWCR_MHS_E_END 0x1
779 #define ALT_SPIM_MWCR_MHS_LSB 2
781 #define ALT_SPIM_MWCR_MHS_MSB 2
783 #define ALT_SPIM_MWCR_MHS_WIDTH 1
785 #define ALT_SPIM_MWCR_MHS_SET_MSK 0x00000004
787 #define ALT_SPIM_MWCR_MHS_CLR_MSK 0xfffffffb
789 #define ALT_SPIM_MWCR_MHS_RESET 0x0
791 #define ALT_SPIM_MWCR_MHS_GET(value) (((value) & 0x00000004) >> 2)
793 #define ALT_SPIM_MWCR_MHS_SET(value) (((value) << 2) & 0x00000004)
806 struct ALT_SPIM_MWCR_s
815 typedef volatile struct ALT_SPIM_MWCR_s ALT_SPIM_MWCR_t;
819 #define ALT_SPIM_MWCR_OFST 0xc
821 #define ALT_SPIM_MWCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_MWCR_OFST))
865 #define ALT_SPIM_SER_SER_E_NOTSELECTED 0x0
871 #define ALT_SPIM_SER_SER_E_SELECTED 0x1
874 #define ALT_SPIM_SER_SER_LSB 0
876 #define ALT_SPIM_SER_SER_MSB 3
878 #define ALT_SPIM_SER_SER_WIDTH 4
880 #define ALT_SPIM_SER_SER_SET_MSK 0x0000000f
882 #define ALT_SPIM_SER_SER_CLR_MSK 0xfffffff0
884 #define ALT_SPIM_SER_SER_RESET 0x0
886 #define ALT_SPIM_SER_SER_GET(value) (((value) & 0x0000000f) >> 0)
888 #define ALT_SPIM_SER_SER_SET(value) (((value) << 0) & 0x0000000f)
901 struct ALT_SPIM_SER_s
908 typedef volatile struct ALT_SPIM_SER_s ALT_SPIM_SER_t;
912 #define ALT_SPIM_SER_OFST 0x10
914 #define ALT_SPIM_SER_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_SER_OFST))
952 #define ALT_SPIM_BAUDR_SCKDV_LSB 0
954 #define ALT_SPIM_BAUDR_SCKDV_MSB 15
956 #define ALT_SPIM_BAUDR_SCKDV_WIDTH 16
958 #define ALT_SPIM_BAUDR_SCKDV_SET_MSK 0x0000ffff
960 #define ALT_SPIM_BAUDR_SCKDV_CLR_MSK 0xffff0000
962 #define ALT_SPIM_BAUDR_SCKDV_RESET 0x0
964 #define ALT_SPIM_BAUDR_SCKDV_GET(value) (((value) & 0x0000ffff) >> 0)
966 #define ALT_SPIM_BAUDR_SCKDV_SET(value) (((value) << 0) & 0x0000ffff)
979 struct ALT_SPIM_BAUDR_s
986 typedef volatile struct ALT_SPIM_BAUDR_s ALT_SPIM_BAUDR_t;
990 #define ALT_SPIM_BAUDR_OFST 0x14
992 #define ALT_SPIM_BAUDR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_BAUDR_OFST))
1020 #define ALT_SPIM_TXFTLR_TFT_LSB 0
1022 #define ALT_SPIM_TXFTLR_TFT_MSB 7
1024 #define ALT_SPIM_TXFTLR_TFT_WIDTH 8
1026 #define ALT_SPIM_TXFTLR_TFT_SET_MSK 0x000000ff
1028 #define ALT_SPIM_TXFTLR_TFT_CLR_MSK 0xffffff00
1030 #define ALT_SPIM_TXFTLR_TFT_RESET 0x0
1032 #define ALT_SPIM_TXFTLR_TFT_GET(value) (((value) & 0x000000ff) >> 0)
1034 #define ALT_SPIM_TXFTLR_TFT_SET(value) (((value) << 0) & 0x000000ff)
1036 #ifndef __ASSEMBLY__
1047 struct ALT_SPIM_TXFTLR_s
1054 typedef volatile struct ALT_SPIM_TXFTLR_s ALT_SPIM_TXFTLR_t;
1058 #define ALT_SPIM_TXFTLR_OFST 0x18
1060 #define ALT_SPIM_TXFTLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_TXFTLR_OFST))
1088 #define ALT_SPIM_RXFTLR_RFT_LSB 0
1090 #define ALT_SPIM_RXFTLR_RFT_MSB 7
1092 #define ALT_SPIM_RXFTLR_RFT_WIDTH 8
1094 #define ALT_SPIM_RXFTLR_RFT_SET_MSK 0x000000ff
1096 #define ALT_SPIM_RXFTLR_RFT_CLR_MSK 0xffffff00
1098 #define ALT_SPIM_RXFTLR_RFT_RESET 0x0
1100 #define ALT_SPIM_RXFTLR_RFT_GET(value) (((value) & 0x000000ff) >> 0)
1102 #define ALT_SPIM_RXFTLR_RFT_SET(value) (((value) << 0) & 0x000000ff)
1104 #ifndef __ASSEMBLY__
1115 struct ALT_SPIM_RXFTLR_s
1122 typedef volatile struct ALT_SPIM_RXFTLR_s ALT_SPIM_RXFTLR_t;
1126 #define ALT_SPIM_RXFTLR_OFST 0x1c
1128 #define ALT_SPIM_RXFTLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXFTLR_OFST))
1153 #define ALT_SPIM_TXFLR_TXTFL_LSB 0
1155 #define ALT_SPIM_TXFLR_TXTFL_MSB 8
1157 #define ALT_SPIM_TXFLR_TXTFL_WIDTH 9
1159 #define ALT_SPIM_TXFLR_TXTFL_SET_MSK 0x000001ff
1161 #define ALT_SPIM_TXFLR_TXTFL_CLR_MSK 0xfffffe00
1163 #define ALT_SPIM_TXFLR_TXTFL_RESET 0x0
1165 #define ALT_SPIM_TXFLR_TXTFL_GET(value) (((value) & 0x000001ff) >> 0)
1167 #define ALT_SPIM_TXFLR_TXTFL_SET(value) (((value) << 0) & 0x000001ff)
1169 #ifndef __ASSEMBLY__
1180 struct ALT_SPIM_TXFLR_s
1182 const uint32_t txtfl : 9;
1187 typedef volatile struct ALT_SPIM_TXFLR_s ALT_SPIM_TXFLR_t;
1191 #define ALT_SPIM_TXFLR_OFST 0x20
1193 #define ALT_SPIM_TXFLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_TXFLR_OFST))
1218 #define ALT_SPIM_RXFLR_RXTFL_LSB 0
1220 #define ALT_SPIM_RXFLR_RXTFL_MSB 8
1222 #define ALT_SPIM_RXFLR_RXTFL_WIDTH 9
1224 #define ALT_SPIM_RXFLR_RXTFL_SET_MSK 0x000001ff
1226 #define ALT_SPIM_RXFLR_RXTFL_CLR_MSK 0xfffffe00
1228 #define ALT_SPIM_RXFLR_RXTFL_RESET 0x0
1230 #define ALT_SPIM_RXFLR_RXTFL_GET(value) (((value) & 0x000001ff) >> 0)
1232 #define ALT_SPIM_RXFLR_RXTFL_SET(value) (((value) << 0) & 0x000001ff)
1234 #ifndef __ASSEMBLY__
1245 struct ALT_SPIM_RXFLR_s
1247 const uint32_t rxtfl : 9;
1252 typedef volatile struct ALT_SPIM_RXFLR_s ALT_SPIM_RXFLR_t;
1256 #define ALT_SPIM_RXFLR_OFST 0x24
1258 #define ALT_SPIM_RXFLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXFLR_OFST))
1299 #define ALT_SPIM_SR_BUSY_E_INACT 0x0
1305 #define ALT_SPIM_SR_BUSY_E_ACT 0x1
1308 #define ALT_SPIM_SR_BUSY_LSB 0
1310 #define ALT_SPIM_SR_BUSY_MSB 0
1312 #define ALT_SPIM_SR_BUSY_WIDTH 1
1314 #define ALT_SPIM_SR_BUSY_SET_MSK 0x00000001
1316 #define ALT_SPIM_SR_BUSY_CLR_MSK 0xfffffffe
1318 #define ALT_SPIM_SR_BUSY_RESET 0x0
1320 #define ALT_SPIM_SR_BUSY_GET(value) (((value) & 0x00000001) >> 0)
1322 #define ALT_SPIM_SR_BUSY_SET(value) (((value) << 0) & 0x00000001)
1344 #define ALT_SPIM_SR_TFNF_E_FULL 0x0
1350 #define ALT_SPIM_SR_TFNF_E_NOTFULL 0x1
1353 #define ALT_SPIM_SR_TFNF_LSB 1
1355 #define ALT_SPIM_SR_TFNF_MSB 1
1357 #define ALT_SPIM_SR_TFNF_WIDTH 1
1359 #define ALT_SPIM_SR_TFNF_SET_MSK 0x00000002
1361 #define ALT_SPIM_SR_TFNF_CLR_MSK 0xfffffffd
1363 #define ALT_SPIM_SR_TFNF_RESET 0x1
1365 #define ALT_SPIM_SR_TFNF_GET(value) (((value) & 0x00000002) >> 1)
1367 #define ALT_SPIM_SR_TFNF_SET(value) (((value) << 1) & 0x00000002)
1389 #define ALT_SPIM_SR_TFE_E_EMPTY 0x1
1395 #define ALT_SPIM_SR_TFE_E_NOTEMPTY 0x0
1398 #define ALT_SPIM_SR_TFE_LSB 2
1400 #define ALT_SPIM_SR_TFE_MSB 2
1402 #define ALT_SPIM_SR_TFE_WIDTH 1
1404 #define ALT_SPIM_SR_TFE_SET_MSK 0x00000004
1406 #define ALT_SPIM_SR_TFE_CLR_MSK 0xfffffffb
1408 #define ALT_SPIM_SR_TFE_RESET 0x1
1410 #define ALT_SPIM_SR_TFE_GET(value) (((value) & 0x00000004) >> 2)
1412 #define ALT_SPIM_SR_TFE_SET(value) (((value) << 2) & 0x00000004)
1434 #define ALT_SPIM_SR_RFNE_E_EMPTY 0x0
1440 #define ALT_SPIM_SR_RFNE_E_NOTEMPTY 0x1
1443 #define ALT_SPIM_SR_RFNE_LSB 3
1445 #define ALT_SPIM_SR_RFNE_MSB 3
1447 #define ALT_SPIM_SR_RFNE_WIDTH 1
1449 #define ALT_SPIM_SR_RFNE_SET_MSK 0x00000008
1451 #define ALT_SPIM_SR_RFNE_CLR_MSK 0xfffffff7
1453 #define ALT_SPIM_SR_RFNE_RESET 0x0
1455 #define ALT_SPIM_SR_RFNE_GET(value) (((value) & 0x00000008) >> 3)
1457 #define ALT_SPIM_SR_RFNE_SET(value) (((value) << 3) & 0x00000008)
1479 #define ALT_SPIM_SR_RFF_E_NOTFULL 0x0
1485 #define ALT_SPIM_SR_RFF_E_FULL 0x1
1488 #define ALT_SPIM_SR_RFF_LSB 4
1490 #define ALT_SPIM_SR_RFF_MSB 4
1492 #define ALT_SPIM_SR_RFF_WIDTH 1
1494 #define ALT_SPIM_SR_RFF_SET_MSK 0x00000010
1496 #define ALT_SPIM_SR_RFF_CLR_MSK 0xffffffef
1498 #define ALT_SPIM_SR_RFF_RESET 0x0
1500 #define ALT_SPIM_SR_RFF_GET(value) (((value) & 0x00000010) >> 4)
1502 #define ALT_SPIM_SR_RFF_SET(value) (((value) << 4) & 0x00000010)
1504 #ifndef __ASSEMBLY__
1515 struct ALT_SPIM_SR_s
1517 const uint32_t busy : 1;
1518 const uint32_t tfnf : 1;
1519 const uint32_t tfe : 1;
1520 const uint32_t rfne : 1;
1521 const uint32_t rff : 1;
1526 typedef volatile struct ALT_SPIM_SR_s ALT_SPIM_SR_t;
1530 #define ALT_SPIM_SR_OFST 0x28
1532 #define ALT_SPIM_SR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_SR_OFST))
1571 #define ALT_SPIM_IMR_TXEIM_E_MSKED 0x0
1577 #define ALT_SPIM_IMR_TXEIM_E_END 0x1
1580 #define ALT_SPIM_IMR_TXEIM_LSB 0
1582 #define ALT_SPIM_IMR_TXEIM_MSB 0
1584 #define ALT_SPIM_IMR_TXEIM_WIDTH 1
1586 #define ALT_SPIM_IMR_TXEIM_SET_MSK 0x00000001
1588 #define ALT_SPIM_IMR_TXEIM_CLR_MSK 0xfffffffe
1590 #define ALT_SPIM_IMR_TXEIM_RESET 0x1
1592 #define ALT_SPIM_IMR_TXEIM_GET(value) (((value) & 0x00000001) >> 0)
1594 #define ALT_SPIM_IMR_TXEIM_SET(value) (((value) << 0) & 0x00000001)
1616 #define ALT_SPIM_IMR_TXOIM_E_MSKED 0x0
1622 #define ALT_SPIM_IMR_TXOIM_E_END 0x1
1625 #define ALT_SPIM_IMR_TXOIM_LSB 1
1627 #define ALT_SPIM_IMR_TXOIM_MSB 1
1629 #define ALT_SPIM_IMR_TXOIM_WIDTH 1
1631 #define ALT_SPIM_IMR_TXOIM_SET_MSK 0x00000002
1633 #define ALT_SPIM_IMR_TXOIM_CLR_MSK 0xfffffffd
1635 #define ALT_SPIM_IMR_TXOIM_RESET 0x1
1637 #define ALT_SPIM_IMR_TXOIM_GET(value) (((value) & 0x00000002) >> 1)
1639 #define ALT_SPIM_IMR_TXOIM_SET(value) (((value) << 1) & 0x00000002)
1661 #define ALT_SPIM_IMR_RXUIM_E_MSKED 0x0
1667 #define ALT_SPIM_IMR_RXUIM_E_END 0x1
1670 #define ALT_SPIM_IMR_RXUIM_LSB 2
1672 #define ALT_SPIM_IMR_RXUIM_MSB 2
1674 #define ALT_SPIM_IMR_RXUIM_WIDTH 1
1676 #define ALT_SPIM_IMR_RXUIM_SET_MSK 0x00000004
1678 #define ALT_SPIM_IMR_RXUIM_CLR_MSK 0xfffffffb
1680 #define ALT_SPIM_IMR_RXUIM_RESET 0x1
1682 #define ALT_SPIM_IMR_RXUIM_GET(value) (((value) & 0x00000004) >> 2)
1684 #define ALT_SPIM_IMR_RXUIM_SET(value) (((value) << 2) & 0x00000004)
1706 #define ALT_SPIM_IMR_RXOIM_E_MSKED 0x0
1712 #define ALT_SPIM_IMR_RXOIM_E_END 0x1
1715 #define ALT_SPIM_IMR_RXOIM_LSB 3
1717 #define ALT_SPIM_IMR_RXOIM_MSB 3
1719 #define ALT_SPIM_IMR_RXOIM_WIDTH 1
1721 #define ALT_SPIM_IMR_RXOIM_SET_MSK 0x00000008
1723 #define ALT_SPIM_IMR_RXOIM_CLR_MSK 0xfffffff7
1725 #define ALT_SPIM_IMR_RXOIM_RESET 0x1
1727 #define ALT_SPIM_IMR_RXOIM_GET(value) (((value) & 0x00000008) >> 3)
1729 #define ALT_SPIM_IMR_RXOIM_SET(value) (((value) << 3) & 0x00000008)
1751 #define ALT_SPIM_IMR_RXFIM_E_MSKED 0x0
1757 #define ALT_SPIM_IMR_RXFIM_E_END 0x1
1760 #define ALT_SPIM_IMR_RXFIM_LSB 4
1762 #define ALT_SPIM_IMR_RXFIM_MSB 4
1764 #define ALT_SPIM_IMR_RXFIM_WIDTH 1
1766 #define ALT_SPIM_IMR_RXFIM_SET_MSK 0x00000010
1768 #define ALT_SPIM_IMR_RXFIM_CLR_MSK 0xffffffef
1770 #define ALT_SPIM_IMR_RXFIM_RESET 0x1
1772 #define ALT_SPIM_IMR_RXFIM_GET(value) (((value) & 0x00000010) >> 4)
1774 #define ALT_SPIM_IMR_RXFIM_SET(value) (((value) << 4) & 0x00000010)
1776 #ifndef __ASSEMBLY__
1787 struct ALT_SPIM_IMR_s
1798 typedef volatile struct ALT_SPIM_IMR_s ALT_SPIM_IMR_t;
1802 #define ALT_SPIM_IMR_OFST 0x2c
1804 #define ALT_SPIM_IMR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_IMR_OFST))
1846 #define ALT_SPIM_ISR_TXEIS_E_INACT 0x0
1852 #define ALT_SPIM_ISR_TXEIS_E_ACT 0x1
1855 #define ALT_SPIM_ISR_TXEIS_LSB 0
1857 #define ALT_SPIM_ISR_TXEIS_MSB 0
1859 #define ALT_SPIM_ISR_TXEIS_WIDTH 1
1861 #define ALT_SPIM_ISR_TXEIS_SET_MSK 0x00000001
1863 #define ALT_SPIM_ISR_TXEIS_CLR_MSK 0xfffffffe
1865 #define ALT_SPIM_ISR_TXEIS_RESET 0x0
1867 #define ALT_SPIM_ISR_TXEIS_GET(value) (((value) & 0x00000001) >> 0)
1869 #define ALT_SPIM_ISR_TXEIS_SET(value) (((value) << 0) & 0x00000001)
1892 #define ALT_SPIM_ISR_TXOIS_E_INACT 0x0
1898 #define ALT_SPIM_ISR_TXOIS_E_ACT 0x1
1901 #define ALT_SPIM_ISR_TXOIS_LSB 1
1903 #define ALT_SPIM_ISR_TXOIS_MSB 1
1905 #define ALT_SPIM_ISR_TXOIS_WIDTH 1
1907 #define ALT_SPIM_ISR_TXOIS_SET_MSK 0x00000002
1909 #define ALT_SPIM_ISR_TXOIS_CLR_MSK 0xfffffffd
1911 #define ALT_SPIM_ISR_TXOIS_RESET 0x0
1913 #define ALT_SPIM_ISR_TXOIS_GET(value) (((value) & 0x00000002) >> 1)
1915 #define ALT_SPIM_ISR_TXOIS_SET(value) (((value) << 1) & 0x00000002)
1938 #define ALT_SPIM_ISR_RXUIS_E_INACT 0x0
1944 #define ALT_SPIM_ISR_RXUIS_E_ACT 0x1
1947 #define ALT_SPIM_ISR_RXUIS_LSB 2
1949 #define ALT_SPIM_ISR_RXUIS_MSB 2
1951 #define ALT_SPIM_ISR_RXUIS_WIDTH 1
1953 #define ALT_SPIM_ISR_RXUIS_SET_MSK 0x00000004
1955 #define ALT_SPIM_ISR_RXUIS_CLR_MSK 0xfffffffb
1957 #define ALT_SPIM_ISR_RXUIS_RESET 0x0
1959 #define ALT_SPIM_ISR_RXUIS_GET(value) (((value) & 0x00000004) >> 2)
1961 #define ALT_SPIM_ISR_RXUIS_SET(value) (((value) << 2) & 0x00000004)
1984 #define ALT_SPIM_ISR_RXOIS_E_INACT 0x0
1990 #define ALT_SPIM_ISR_RXOIS_E_ACT 0x1
1993 #define ALT_SPIM_ISR_RXOIS_LSB 3
1995 #define ALT_SPIM_ISR_RXOIS_MSB 3
1997 #define ALT_SPIM_ISR_RXOIS_WIDTH 1
1999 #define ALT_SPIM_ISR_RXOIS_SET_MSK 0x00000008
2001 #define ALT_SPIM_ISR_RXOIS_CLR_MSK 0xfffffff7
2003 #define ALT_SPIM_ISR_RXOIS_RESET 0x0
2005 #define ALT_SPIM_ISR_RXOIS_GET(value) (((value) & 0x00000008) >> 3)
2007 #define ALT_SPIM_ISR_RXOIS_SET(value) (((value) << 3) & 0x00000008)
2030 #define ALT_SPIM_ISR_RXFIS_E_INACT 0x0
2036 #define ALT_SPIM_ISR_RXFIS_E_ACT 0x1
2039 #define ALT_SPIM_ISR_RXFIS_LSB 4
2041 #define ALT_SPIM_ISR_RXFIS_MSB 4
2043 #define ALT_SPIM_ISR_RXFIS_WIDTH 1
2045 #define ALT_SPIM_ISR_RXFIS_SET_MSK 0x00000010
2047 #define ALT_SPIM_ISR_RXFIS_CLR_MSK 0xffffffef
2049 #define ALT_SPIM_ISR_RXFIS_RESET 0x0
2051 #define ALT_SPIM_ISR_RXFIS_GET(value) (((value) & 0x00000010) >> 4)
2053 #define ALT_SPIM_ISR_RXFIS_SET(value) (((value) << 4) & 0x00000010)
2077 #define ALT_SPIM_ISR_MSTIS_E_INACT 0x0
2083 #define ALT_SPIM_ISR_MSTIS_E_ACT 0x1
2086 #define ALT_SPIM_ISR_MSTIS_LSB 5
2088 #define ALT_SPIM_ISR_MSTIS_MSB 5
2090 #define ALT_SPIM_ISR_MSTIS_WIDTH 1
2092 #define ALT_SPIM_ISR_MSTIS_SET_MSK 0x00000020
2094 #define ALT_SPIM_ISR_MSTIS_CLR_MSK 0xffffffdf
2096 #define ALT_SPIM_ISR_MSTIS_RESET 0x0
2098 #define ALT_SPIM_ISR_MSTIS_GET(value) (((value) & 0x00000020) >> 5)
2100 #define ALT_SPIM_ISR_MSTIS_SET(value) (((value) << 5) & 0x00000020)
2102 #ifndef __ASSEMBLY__
2113 struct ALT_SPIM_ISR_s
2115 const uint32_t txeis : 1;
2116 const uint32_t txois : 1;
2117 const uint32_t rxuis : 1;
2118 const uint32_t rxois : 1;
2119 const uint32_t rxfis : 1;
2120 const uint32_t mstis : 1;
2125 typedef volatile struct ALT_SPIM_ISR_s ALT_SPIM_ISR_t;
2129 #define ALT_SPIM_ISR_OFST 0x30
2131 #define ALT_SPIM_ISR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_ISR_OFST))
2171 #define ALT_SPIM_RISR_TXEIR_E_INACT 0x0
2177 #define ALT_SPIM_RISR_TXEIR_E_ACT 0x1
2180 #define ALT_SPIM_RISR_TXEIR_LSB 0
2182 #define ALT_SPIM_RISR_TXEIR_MSB 0
2184 #define ALT_SPIM_RISR_TXEIR_WIDTH 1
2186 #define ALT_SPIM_RISR_TXEIR_SET_MSK 0x00000001
2188 #define ALT_SPIM_RISR_TXEIR_CLR_MSK 0xfffffffe
2190 #define ALT_SPIM_RISR_TXEIR_RESET 0x0
2192 #define ALT_SPIM_RISR_TXEIR_GET(value) (((value) & 0x00000001) >> 0)
2194 #define ALT_SPIM_RISR_TXEIR_SET(value) (((value) << 0) & 0x00000001)
2217 #define ALT_SPIM_RISR_TXOIR_E_INACT 0x0
2223 #define ALT_SPIM_RISR_TXOIR_E_ACT 0x1
2226 #define ALT_SPIM_RISR_TXOIR_LSB 1
2228 #define ALT_SPIM_RISR_TXOIR_MSB 1
2230 #define ALT_SPIM_RISR_TXOIR_WIDTH 1
2232 #define ALT_SPIM_RISR_TXOIR_SET_MSK 0x00000002
2234 #define ALT_SPIM_RISR_TXOIR_CLR_MSK 0xfffffffd
2236 #define ALT_SPIM_RISR_TXOIR_RESET 0x0
2238 #define ALT_SPIM_RISR_TXOIR_GET(value) (((value) & 0x00000002) >> 1)
2240 #define ALT_SPIM_RISR_TXOIR_SET(value) (((value) << 1) & 0x00000002)
2264 #define ALT_SPIM_RISR_RXUIR_E_INACT 0x0
2270 #define ALT_SPIM_RISR_RXUIR_E_ACT 0x1
2273 #define ALT_SPIM_RISR_RXUIR_LSB 2
2275 #define ALT_SPIM_RISR_RXUIR_MSB 2
2277 #define ALT_SPIM_RISR_RXUIR_WIDTH 1
2279 #define ALT_SPIM_RISR_RXUIR_SET_MSK 0x00000004
2281 #define ALT_SPIM_RISR_RXUIR_CLR_MSK 0xfffffffb
2283 #define ALT_SPIM_RISR_RXUIR_RESET 0x0
2285 #define ALT_SPIM_RISR_RXUIR_GET(value) (((value) & 0x00000004) >> 2)
2287 #define ALT_SPIM_RISR_RXUIR_SET(value) (((value) << 2) & 0x00000004)
2310 #define ALT_SPIM_RISR_RXOIR_E_INACTOVE 0x0
2316 #define ALT_SPIM_RISR_RXOIR_E_ACT 0x1
2319 #define ALT_SPIM_RISR_RXOIR_LSB 3
2321 #define ALT_SPIM_RISR_RXOIR_MSB 3
2323 #define ALT_SPIM_RISR_RXOIR_WIDTH 1
2325 #define ALT_SPIM_RISR_RXOIR_SET_MSK 0x00000008
2327 #define ALT_SPIM_RISR_RXOIR_CLR_MSK 0xfffffff7
2329 #define ALT_SPIM_RISR_RXOIR_RESET 0x0
2331 #define ALT_SPIM_RISR_RXOIR_GET(value) (((value) & 0x00000008) >> 3)
2333 #define ALT_SPIM_RISR_RXOIR_SET(value) (((value) << 3) & 0x00000008)
2357 #define ALT_SPIM_RISR_RXFIR_E_INACT 0x0
2363 #define ALT_SPIM_RISR_RXFIR_E_ACT 0x1
2366 #define ALT_SPIM_RISR_RXFIR_LSB 4
2368 #define ALT_SPIM_RISR_RXFIR_MSB 4
2370 #define ALT_SPIM_RISR_RXFIR_WIDTH 1
2372 #define ALT_SPIM_RISR_RXFIR_SET_MSK 0x00000010
2374 #define ALT_SPIM_RISR_RXFIR_CLR_MSK 0xffffffef
2376 #define ALT_SPIM_RISR_RXFIR_RESET 0x0
2378 #define ALT_SPIM_RISR_RXFIR_GET(value) (((value) & 0x00000010) >> 4)
2380 #define ALT_SPIM_RISR_RXFIR_SET(value) (((value) << 4) & 0x00000010)
2382 #ifndef __ASSEMBLY__
2393 struct ALT_SPIM_RISR_s
2395 const uint32_t txeir : 1;
2396 const uint32_t txoir : 1;
2397 const uint32_t rxuir : 1;
2398 const uint32_t rxoir : 1;
2399 const uint32_t rxfir : 1;
2404 typedef volatile struct ALT_SPIM_RISR_s ALT_SPIM_RISR_t;
2408 #define ALT_SPIM_RISR_OFST 0x34
2410 #define ALT_SPIM_RISR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RISR_OFST))
2435 #define ALT_SPIM_TXOICR_TXOICR_LSB 0
2437 #define ALT_SPIM_TXOICR_TXOICR_MSB 0
2439 #define ALT_SPIM_TXOICR_TXOICR_WIDTH 1
2441 #define ALT_SPIM_TXOICR_TXOICR_SET_MSK 0x00000001
2443 #define ALT_SPIM_TXOICR_TXOICR_CLR_MSK 0xfffffffe
2445 #define ALT_SPIM_TXOICR_TXOICR_RESET 0x0
2447 #define ALT_SPIM_TXOICR_TXOICR_GET(value) (((value) & 0x00000001) >> 0)
2449 #define ALT_SPIM_TXOICR_TXOICR_SET(value) (((value) << 0) & 0x00000001)
2451 #ifndef __ASSEMBLY__
2462 struct ALT_SPIM_TXOICR_s
2464 const uint32_t txoicr : 1;
2469 typedef volatile struct ALT_SPIM_TXOICR_s ALT_SPIM_TXOICR_t;
2473 #define ALT_SPIM_TXOICR_OFST 0x38
2475 #define ALT_SPIM_TXOICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_TXOICR_OFST))
2500 #define ALT_SPIM_RXOICR_RXOICR_LSB 0
2502 #define ALT_SPIM_RXOICR_RXOICR_MSB 0
2504 #define ALT_SPIM_RXOICR_RXOICR_WIDTH 1
2506 #define ALT_SPIM_RXOICR_RXOICR_SET_MSK 0x00000001
2508 #define ALT_SPIM_RXOICR_RXOICR_CLR_MSK 0xfffffffe
2510 #define ALT_SPIM_RXOICR_RXOICR_RESET 0x0
2512 #define ALT_SPIM_RXOICR_RXOICR_GET(value) (((value) & 0x00000001) >> 0)
2514 #define ALT_SPIM_RXOICR_RXOICR_SET(value) (((value) << 0) & 0x00000001)
2516 #ifndef __ASSEMBLY__
2527 struct ALT_SPIM_RXOICR_s
2529 const uint32_t rxoicr : 1;
2534 typedef volatile struct ALT_SPIM_RXOICR_s ALT_SPIM_RXOICR_t;
2538 #define ALT_SPIM_RXOICR_OFST 0x3c
2540 #define ALT_SPIM_RXOICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXOICR_OFST))
2565 #define ALT_SPIM_RXUICR_RXUICR_LSB 0
2567 #define ALT_SPIM_RXUICR_RXUICR_MSB 0
2569 #define ALT_SPIM_RXUICR_RXUICR_WIDTH 1
2571 #define ALT_SPIM_RXUICR_RXUICR_SET_MSK 0x00000001
2573 #define ALT_SPIM_RXUICR_RXUICR_CLR_MSK 0xfffffffe
2575 #define ALT_SPIM_RXUICR_RXUICR_RESET 0x0
2577 #define ALT_SPIM_RXUICR_RXUICR_GET(value) (((value) & 0x00000001) >> 0)
2579 #define ALT_SPIM_RXUICR_RXUICR_SET(value) (((value) << 0) & 0x00000001)
2581 #ifndef __ASSEMBLY__
2592 struct ALT_SPIM_RXUICR_s
2594 const uint32_t rxuicr : 1;
2599 typedef volatile struct ALT_SPIM_RXUICR_s ALT_SPIM_RXUICR_t;
2603 #define ALT_SPIM_RXUICR_OFST 0x40
2605 #define ALT_SPIM_RXUICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RXUICR_OFST))
2631 #define ALT_SPIM_ICR_ICR_LSB 0
2633 #define ALT_SPIM_ICR_ICR_MSB 0
2635 #define ALT_SPIM_ICR_ICR_WIDTH 1
2637 #define ALT_SPIM_ICR_ICR_SET_MSK 0x00000001
2639 #define ALT_SPIM_ICR_ICR_CLR_MSK 0xfffffffe
2641 #define ALT_SPIM_ICR_ICR_RESET 0x0
2643 #define ALT_SPIM_ICR_ICR_GET(value) (((value) & 0x00000001) >> 0)
2645 #define ALT_SPIM_ICR_ICR_SET(value) (((value) << 0) & 0x00000001)
2647 #ifndef __ASSEMBLY__
2658 struct ALT_SPIM_ICR_s
2660 const uint32_t icr : 1;
2665 typedef volatile struct ALT_SPIM_ICR_s ALT_SPIM_ICR_t;
2669 #define ALT_SPIM_ICR_OFST 0x48
2671 #define ALT_SPIM_ICR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_ICR_OFST))
2707 #define ALT_SPIM_DMACR_RDMAE_E_DISD 0x0
2713 #define ALT_SPIM_DMACR_RDMAE_E_END 0x1
2716 #define ALT_SPIM_DMACR_RDMAE_LSB 0
2718 #define ALT_SPIM_DMACR_RDMAE_MSB 0
2720 #define ALT_SPIM_DMACR_RDMAE_WIDTH 1
2722 #define ALT_SPIM_DMACR_RDMAE_SET_MSK 0x00000001
2724 #define ALT_SPIM_DMACR_RDMAE_CLR_MSK 0xfffffffe
2726 #define ALT_SPIM_DMACR_RDMAE_RESET 0x0
2728 #define ALT_SPIM_DMACR_RDMAE_GET(value) (((value) & 0x00000001) >> 0)
2730 #define ALT_SPIM_DMACR_RDMAE_SET(value) (((value) << 0) & 0x00000001)
2752 #define ALT_SPIM_DMACR_TDMAE_E_DISD 0x0
2758 #define ALT_SPIM_DMACR_TDMAE_E_END 0x1
2761 #define ALT_SPIM_DMACR_TDMAE_LSB 1
2763 #define ALT_SPIM_DMACR_TDMAE_MSB 1
2765 #define ALT_SPIM_DMACR_TDMAE_WIDTH 1
2767 #define ALT_SPIM_DMACR_TDMAE_SET_MSK 0x00000002
2769 #define ALT_SPIM_DMACR_TDMAE_CLR_MSK 0xfffffffd
2771 #define ALT_SPIM_DMACR_TDMAE_RESET 0x0
2773 #define ALT_SPIM_DMACR_TDMAE_GET(value) (((value) & 0x00000002) >> 1)
2775 #define ALT_SPIM_DMACR_TDMAE_SET(value) (((value) << 1) & 0x00000002)
2777 #ifndef __ASSEMBLY__
2788 struct ALT_SPIM_DMACR_s
2796 typedef volatile struct ALT_SPIM_DMACR_s ALT_SPIM_DMACR_t;
2800 #define ALT_SPIM_DMACR_OFST 0x4c
2802 #define ALT_SPIM_DMACR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_DMACR_OFST))
2829 #define ALT_SPIM_DMATDLR_DMATDL_LSB 0
2831 #define ALT_SPIM_DMATDLR_DMATDL_MSB 7
2833 #define ALT_SPIM_DMATDLR_DMATDL_WIDTH 8
2835 #define ALT_SPIM_DMATDLR_DMATDL_SET_MSK 0x000000ff
2837 #define ALT_SPIM_DMATDLR_DMATDL_CLR_MSK 0xffffff00
2839 #define ALT_SPIM_DMATDLR_DMATDL_RESET 0x0
2841 #define ALT_SPIM_DMATDLR_DMATDL_GET(value) (((value) & 0x000000ff) >> 0)
2843 #define ALT_SPIM_DMATDLR_DMATDL_SET(value) (((value) << 0) & 0x000000ff)
2845 #ifndef __ASSEMBLY__
2856 struct ALT_SPIM_DMATDLR_s
2858 uint32_t dmatdl : 8;
2863 typedef volatile struct ALT_SPIM_DMATDLR_s ALT_SPIM_DMATDLR_t;
2867 #define ALT_SPIM_DMATDLR_OFST 0x50
2869 #define ALT_SPIM_DMATDLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_DMATDLR_OFST))
2896 #define ALT_SPIM_DMARDLR_DMARDL_LSB 0
2898 #define ALT_SPIM_DMARDLR_DMARDL_MSB 7
2900 #define ALT_SPIM_DMARDLR_DMARDL_WIDTH 8
2902 #define ALT_SPIM_DMARDLR_DMARDL_SET_MSK 0x000000ff
2904 #define ALT_SPIM_DMARDLR_DMARDL_CLR_MSK 0xffffff00
2906 #define ALT_SPIM_DMARDLR_DMARDL_RESET 0x0
2908 #define ALT_SPIM_DMARDLR_DMARDL_GET(value) (((value) & 0x000000ff) >> 0)
2910 #define ALT_SPIM_DMARDLR_DMARDL_SET(value) (((value) << 0) & 0x000000ff)
2912 #ifndef __ASSEMBLY__
2923 struct ALT_SPIM_DMARDLR_s
2925 uint32_t dmardl : 8;
2930 typedef volatile struct ALT_SPIM_DMARDLR_s ALT_SPIM_DMARDLR_t;
2934 #define ALT_SPIM_DMARDLR_OFST 0x54
2936 #define ALT_SPIM_DMARDLR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_DMARDLR_OFST))
2959 #define ALT_SPIM_IDR_IDR_LSB 0
2961 #define ALT_SPIM_IDR_IDR_MSB 31
2963 #define ALT_SPIM_IDR_IDR_WIDTH 32
2965 #define ALT_SPIM_IDR_IDR_SET_MSK 0xffffffff
2967 #define ALT_SPIM_IDR_IDR_CLR_MSK 0x00000000
2969 #define ALT_SPIM_IDR_IDR_RESET 0x5510000
2971 #define ALT_SPIM_IDR_IDR_GET(value) (((value) & 0xffffffff) >> 0)
2973 #define ALT_SPIM_IDR_IDR_SET(value) (((value) << 0) & 0xffffffff)
2975 #ifndef __ASSEMBLY__
2986 struct ALT_SPIM_IDR_s
2988 const uint32_t idr : 32;
2992 typedef volatile struct ALT_SPIM_IDR_s ALT_SPIM_IDR_t;
2996 #define ALT_SPIM_IDR_OFST 0x58
2998 #define ALT_SPIM_IDR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_IDR_OFST))
3022 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_LSB 0
3024 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_MSB 31
3026 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_WIDTH 32
3028 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_SET_MSK 0xffffffff
3030 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_CLR_MSK 0x00000000
3032 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_RESET 0x3332302a
3034 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_GET(value) (((value) & 0xffffffff) >> 0)
3036 #define ALT_SPIM_SPI_VER_ID_SPI_VER_ID_SET(value) (((value) << 0) & 0xffffffff)
3038 #ifndef __ASSEMBLY__
3049 struct ALT_SPIM_SPI_VER_ID_s
3051 uint32_t spi_version_id : 32;
3055 typedef volatile struct ALT_SPIM_SPI_VER_ID_s ALT_SPIM_SPI_VER_ID_t;
3059 #define ALT_SPIM_SPI_VER_ID_OFST 0x5c
3061 #define ALT_SPIM_SPI_VER_ID_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_SPI_VER_ID_OFST))
3097 #define ALT_SPIM_DR_DR_LSB 0
3099 #define ALT_SPIM_DR_DR_MSB 15
3101 #define ALT_SPIM_DR_DR_WIDTH 16
3103 #define ALT_SPIM_DR_DR_SET_MSK 0x0000ffff
3105 #define ALT_SPIM_DR_DR_CLR_MSK 0xffff0000
3107 #define ALT_SPIM_DR_DR_RESET 0x0
3109 #define ALT_SPIM_DR_DR_GET(value) (((value) & 0x0000ffff) >> 0)
3111 #define ALT_SPIM_DR_DR_SET(value) (((value) << 0) & 0x0000ffff)
3113 #ifndef __ASSEMBLY__
3124 struct ALT_SPIM_DR_s
3131 typedef volatile struct ALT_SPIM_DR_s ALT_SPIM_DR_t;
3135 #define ALT_SPIM_DR_OFST 0x60
3137 #define ALT_SPIM_DR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_DR_OFST))
3168 #define ALT_SPIM_RX_SMPL_DLY_RSD_LSB 0
3170 #define ALT_SPIM_RX_SMPL_DLY_RSD_MSB 6
3172 #define ALT_SPIM_RX_SMPL_DLY_RSD_WIDTH 7
3174 #define ALT_SPIM_RX_SMPL_DLY_RSD_SET_MSK 0x0000007f
3176 #define ALT_SPIM_RX_SMPL_DLY_RSD_CLR_MSK 0xffffff80
3178 #define ALT_SPIM_RX_SMPL_DLY_RSD_RESET 0x0
3180 #define ALT_SPIM_RX_SMPL_DLY_RSD_GET(value) (((value) & 0x0000007f) >> 0)
3182 #define ALT_SPIM_RX_SMPL_DLY_RSD_SET(value) (((value) << 0) & 0x0000007f)
3184 #ifndef __ASSEMBLY__
3195 struct ALT_SPIM_RX_SMPL_DLY_s
3202 typedef volatile struct ALT_SPIM_RX_SMPL_DLY_s ALT_SPIM_RX_SMPL_DLY_t;
3206 #define ALT_SPIM_RX_SMPL_DLY_OFST 0xf0
3208 #define ALT_SPIM_RX_SMPL_DLY_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SPIM_RX_SMPL_DLY_OFST))
3210 #ifndef __ASSEMBLY__
3223 ALT_SPIM_CTLR0_t ctrlr0;
3224 ALT_SPIM_CTLR1_t ctrlr1;
3225 ALT_SPIM_SPIENR_t spienr;
3226 ALT_SPIM_MWCR_t mwcr;
3228 ALT_SPIM_BAUDR_t baudr;
3229 ALT_SPIM_TXFTLR_t txftlr;
3230 ALT_SPIM_RXFTLR_t rxftlr;
3231 ALT_SPIM_TXFLR_t txflr;
3232 ALT_SPIM_RXFLR_t rxflr;
3236 ALT_SPIM_RISR_t risr;
3237 ALT_SPIM_TXOICR_t txoicr;
3238 ALT_SPIM_RXOICR_t rxoicr;
3239 ALT_SPIM_RXUICR_t rxuicr;
3240 volatile uint32_t _pad_0x44_0x47;
3242 ALT_SPIM_DMACR_t dmacr;
3243 ALT_SPIM_DMATDLR_t dmatdlr;
3244 ALT_SPIM_DMARDLR_t dmardlr;
3246 ALT_SPIM_SPI_VER_ID_t spi_version_id;
3248 volatile uint32_t _pad_0x64_0xef[35];
3249 ALT_SPIM_RX_SMPL_DLY_t rx_sample_dly;
3250 volatile uint32_t _pad_0xf4_0x100[3];
3254 typedef volatile struct ALT_SPIM_s ALT_SPIM_t;
3256 struct ALT_SPIM_raw_s
3258 volatile uint32_t ctrlr0;
3259 volatile uint32_t ctrlr1;
3260 volatile uint32_t spienr;
3261 volatile uint32_t mwcr;
3262 volatile uint32_t ser;
3263 volatile uint32_t baudr;
3264 volatile uint32_t txftlr;
3265 volatile uint32_t rxftlr;
3266 volatile uint32_t txflr;
3267 volatile uint32_t rxflr;
3268 volatile uint32_t sr;
3269 volatile uint32_t imr;
3270 volatile uint32_t isr;
3271 volatile uint32_t risr;
3272 volatile uint32_t txoicr;
3273 volatile uint32_t rxoicr;
3274 volatile uint32_t rxuicr;
3275 uint32_t _pad_0x44_0x47;
3276 volatile uint32_t icr;
3277 volatile uint32_t dmacr;
3278 volatile uint32_t dmatdlr;
3279 volatile uint32_t dmardlr;
3280 volatile uint32_t idr;
3281 volatile uint32_t spi_version_id;
3282 volatile uint32_t dr;
3283 uint32_t _pad_0x64_0xef[35];
3284 volatile uint32_t rx_sample_dly;
3285 uint32_t _pad_0xf4_0x100[3];
3289 typedef volatile struct ALT_SPIM_raw_s ALT_SPIM_raw_t;