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alt_noc_ccu_ios_dma_tbu_m_main_qos.h
1 /***********************************************************************************
2 * *
3 * Copyright 2013-2015 Altera Corporation. All Rights Reserved. *
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32 
33 /* Altera - ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS */
34 
35 #ifndef __ALT_SOCAL_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_H__
36 #define __ALT_SOCAL_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_H__
37 
38 #ifndef __ASSEMBLY__
39 #ifdef __cplusplus
40 #include <cstdint>
41 extern "C"
42 {
43 #else /* __cplusplus */
44 #include <stdint.h>
45 #endif /* __cplusplus */
46 #endif /* __ASSEMBLY__ */
47 
48 /*
49  * Component : NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS
50  *
51  */
52 /*
53  * Register : dma_tbu_m_I_main_QosGenerator_Id_CoreId
54  *
55  * Register Layout
56  *
57  * Bits | Access | Reset | Description
58  * :-------|:-------|:---------|:----------------------------------------------------------------------------------------
59  * [7:0] | R | 0x4 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID
60  * [31:8] | R | 0x379ea4 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM
61  *
62  */
63 /*
64  * Field : CORETYPEID
65  *
66  * Field identifying the type of IP.
67  *
68  * Field Access Macros:
69  *
70  */
71 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID register field. */
72 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID_LSB 0
73 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID register field. */
74 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID_MSB 7
75 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID register field. */
76 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID_WIDTH 8
77 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID register field value. */
78 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID_SET_MSK 0x000000ff
79 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID register field value. */
80 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID_CLR_MSK 0xffffff00
81 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID register field. */
82 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID_RESET 0x4
83 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID field value from a register. */
84 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID_GET(value) (((value) & 0x000000ff) >> 0)
85 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID register field value suitable for setting the register. */
86 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID_SET(value) (((value) << 0) & 0x000000ff)
87 
88 /*
89  * Field : CORECHECKSUM
90  *
91  * Field containing a checksum of the parameters of the IP.
92  *
93  * Field Access Macros:
94  *
95  */
96 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM register field. */
97 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM_LSB 8
98 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM register field. */
99 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM_MSB 31
100 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM register field. */
101 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM_WIDTH 24
102 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM register field value. */
103 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM_SET_MSK 0xffffff00
104 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM register field value. */
105 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM_CLR_MSK 0x000000ff
106 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM register field. */
107 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM_RESET 0x379ea4
108 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM field value from a register. */
109 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
110 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM register field value suitable for setting the register. */
111 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
112 
113 #ifndef __ASSEMBLY__
114 /*
115  * WARNING: The C register and register group struct declarations are provided for
116  * convenience and illustrative purposes. They should, however, be used with
117  * caution as the C language standard provides no guarantees about the alignment or
118  * atomicity of device memory accesses. The recommended practice for coding device
119  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
120  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
121  * alt_write_dword() functions for 64 bit registers.
122  *
123  * The struct declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID.
124  */
125 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_s
126 {
127  const volatile uint32_t CORETYPEID : 8; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORETYPEID */
128  const volatile uint32_t CORECHECKSUM : 24; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_CORECHECKSUM */
129 };
130 
131 /* The typedef declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID. */
132 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_t;
133 #endif /* __ASSEMBLY__ */
134 
135 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID register. */
136 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_RESET 0x379ea404
137 /* The byte offset of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID register from the beginning of the component. */
138 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_OFST 0x0
139 
140 /*
141  * Register : dma_tbu_m_I_main_QosGenerator_Id_RevisionId
142  *
143  * Register Layout
144  *
145  * Bits | Access | Reset | Description
146  * :-------|:-------|:------|:-----------------------------------------------------------------------------------------
147  * [7:0] | R | 0x0 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID
148  * [31:8] | R | 0x148 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID
149  *
150  */
151 /*
152  * Field : USERID
153  *
154  * Field containing a user defined value, not used anywhere inside the IP itself.
155  *
156  * Field Access Macros:
157  *
158  */
159 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID register field. */
160 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID_LSB 0
161 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID register field. */
162 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID_MSB 7
163 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID register field. */
164 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID_WIDTH 8
165 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID register field value. */
166 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID_SET_MSK 0x000000ff
167 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID register field value. */
168 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID_CLR_MSK 0xffffff00
169 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID register field. */
170 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID_RESET 0x0
171 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID field value from a register. */
172 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID_GET(value) (((value) & 0x000000ff) >> 0)
173 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID register field value suitable for setting the register. */
174 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID_SET(value) (((value) << 0) & 0x000000ff)
175 
176 /*
177  * Field : FLEXNOCID
178  *
179  * Field containing the build revision of the software used to generate the IP HDL
180  * code.
181  *
182  * Field Access Macros:
183  *
184  */
185 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID register field. */
186 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID_LSB 8
187 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID register field. */
188 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID_MSB 31
189 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID register field. */
190 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID_WIDTH 24
191 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID register field value. */
192 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID_SET_MSK 0xffffff00
193 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID register field value. */
194 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID_CLR_MSK 0x000000ff
195 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID register field. */
196 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID_RESET 0x148
197 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID field value from a register. */
198 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
199 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID register field value suitable for setting the register. */
200 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
201 
202 #ifndef __ASSEMBLY__
203 /*
204  * WARNING: The C register and register group struct declarations are provided for
205  * convenience and illustrative purposes. They should, however, be used with
206  * caution as the C language standard provides no guarantees about the alignment or
207  * atomicity of device memory accesses. The recommended practice for coding device
208  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
209  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
210  * alt_write_dword() functions for 64 bit registers.
211  *
212  * The struct declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID.
213  */
214 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_s
215 {
216  const volatile uint32_t USERID : 8; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_USERID */
217  const volatile uint32_t FLEXNOCID : 24; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_FLEXNOCID */
218 };
219 
220 /* The typedef declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID. */
221 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_t;
222 #endif /* __ASSEMBLY__ */
223 
224 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID register. */
225 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_RESET 0x00014800
226 /* The byte offset of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID register from the beginning of the component. */
227 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_OFST 0x4
228 
229 /*
230  * Register : dma_tbu_m_I_main_QosGenerator_Priority
231  *
232  * Priority register.
233  *
234  * Register Layout
235  *
236  * Bits | Access | Reset | Description
237  * :--------|:-------|:--------|:-------------------------------------------------------------------------------
238  * [1:0] | RW | 0x0 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0
239  * [7:2] | ??? | Unknown | *UNDEFINED*
240  * [9:8] | RW | 0x1 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1
241  * [30:10] | ??? | Unknown | *UNDEFINED*
242  * [31] | R | 0x1 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK
243  *
244  */
245 /*
246  * Field : P0
247  *
248  * In Programmable or Bandwidth Limiter mode, the priority level for write
249  * transactions. In Bandwidth Regulator mode, the priority level when the used
250  * throughput is above the threshold. In Bandwidth Regulator mode, P0 should have a
251  * value equal or lower than P1.
252  *
253  * Field Access Macros:
254  *
255  */
256 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 register field. */
257 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0_LSB 0
258 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 register field. */
259 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0_MSB 1
260 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 register field. */
261 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0_WIDTH 2
262 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 register field value. */
263 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0_SET_MSK 0x00000003
264 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 register field value. */
265 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0_CLR_MSK 0xfffffffc
266 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 register field. */
267 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0_RESET 0x0
268 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 field value from a register. */
269 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0_GET(value) (((value) & 0x00000003) >> 0)
270 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 register field value suitable for setting the register. */
271 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0_SET(value) (((value) << 0) & 0x00000003)
272 
273 /*
274  * Field : P1
275  *
276  * In Programmable or Bandwidth Limiter mode, the priority level for read
277  * transactions. In Bandwidth regulator mode, the priority level when the used
278  * throughput is below the threshold. In Bandwidth Regulator mode, P1 should have a
279  * value equal or greater than P0.
280  *
281  * Field Access Macros:
282  *
283  */
284 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 register field. */
285 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1_LSB 8
286 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 register field. */
287 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1_MSB 9
288 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 register field. */
289 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1_WIDTH 2
290 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 register field value. */
291 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1_SET_MSK 0x00000300
292 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 register field value. */
293 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1_CLR_MSK 0xfffffcff
294 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 register field. */
295 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1_RESET 0x1
296 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 field value from a register. */
297 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1_GET(value) (((value) & 0x00000300) >> 8)
298 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 register field value suitable for setting the register. */
299 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1_SET(value) (((value) << 8) & 0x00000300)
300 
301 /*
302  * Field : MARK
303  *
304  * Backward compatibility marker when 0.
305  *
306  * Field Access Macros:
307  *
308  */
309 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK register field. */
310 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK_LSB 31
311 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK register field. */
312 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK_MSB 31
313 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK register field. */
314 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK_WIDTH 1
315 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK register field value. */
316 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK_SET_MSK 0x80000000
317 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK register field value. */
318 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK_CLR_MSK 0x7fffffff
319 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK register field. */
320 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK_RESET 0x1
321 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK field value from a register. */
322 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK_GET(value) (((value) & 0x80000000) >> 31)
323 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK register field value suitable for setting the register. */
324 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK_SET(value) (((value) << 31) & 0x80000000)
325 
326 #ifndef __ASSEMBLY__
327 /*
328  * WARNING: The C register and register group struct declarations are provided for
329  * convenience and illustrative purposes. They should, however, be used with
330  * caution as the C language standard provides no guarantees about the alignment or
331  * atomicity of device memory accesses. The recommended practice for coding device
332  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
333  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
334  * alt_write_dword() functions for 64 bit registers.
335  *
336  * The struct declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY.
337  */
338 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_s
339 {
340  volatile uint32_t P0 : 2; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P0 */
341  uint32_t : 6; /* *UNDEFINED* */
342  volatile uint32_t P1 : 2; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_P1 */
343  uint32_t : 21; /* *UNDEFINED* */
344  const volatile uint32_t MARK : 1; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_MARK */
345 };
346 
347 /* The typedef declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY. */
348 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_t;
349 #endif /* __ASSEMBLY__ */
350 
351 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY register. */
352 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_RESET 0x80000100
353 /* The byte offset of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY register from the beginning of the component. */
354 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_OFST 0x8
355 
356 /*
357  * Register : dma_tbu_m_I_main_QosGenerator_Mode
358  *
359  * Register Layout
360  *
361  * Bits | Access | Reset | Description
362  * :-------|:-------|:--------|:---------------------------------------------------------------------------
363  * [1:0] | RW | 0x3 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE
364  * [31:2] | ??? | Unknown | *UNDEFINED*
365  *
366  */
367 /*
368  * Field : MODE
369  *
370  * 0 = Programmable mode: a programmed priority is assigned to each read or write,
371  * 1 = Bandwidth Limiter Mode: a hard limit restricts throughput, 2 = Bypass mode:
372  * (<See SoC-specific QoS generator documentation>), 3 = Bandwidth Regulator mode:
373  * priority decreases when throughput exceeds a threshold.
374  *
375  * Field Access Macros:
376  *
377  */
378 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE register field. */
379 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE_LSB 0
380 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE register field. */
381 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE_MSB 1
382 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE register field. */
383 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE_WIDTH 2
384 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE register field value. */
385 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE_SET_MSK 0x00000003
386 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE register field value. */
387 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE_CLR_MSK 0xfffffffc
388 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE register field. */
389 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE_RESET 0x3
390 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE field value from a register. */
391 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE_GET(value) (((value) & 0x00000003) >> 0)
392 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE register field value suitable for setting the register. */
393 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE_SET(value) (((value) << 0) & 0x00000003)
394 
395 #ifndef __ASSEMBLY__
396 /*
397  * WARNING: The C register and register group struct declarations are provided for
398  * convenience and illustrative purposes. They should, however, be used with
399  * caution as the C language standard provides no guarantees about the alignment or
400  * atomicity of device memory accesses. The recommended practice for coding device
401  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
402  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
403  * alt_write_dword() functions for 64 bit registers.
404  *
405  * The struct declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE.
406  */
407 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_s
408 {
409  volatile uint32_t MODE : 2; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_MODE */
410  uint32_t : 30; /* *UNDEFINED* */
411 };
412 
413 /* The typedef declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE. */
414 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_t;
415 #endif /* __ASSEMBLY__ */
416 
417 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE register. */
418 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_RESET 0x00000003
419 /* The byte offset of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE register from the beginning of the component. */
420 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_OFST 0xc
421 
422 /*
423  * Register : dma_tbu_m_I_main_QosGenerator_Bandwidth
424  *
425  * Register Layout
426  *
427  * Bits | Access | Reset | Description
428  * :--------|:-------|:--------|:-------------------------------------------------------------------------------------
429  * [11:0] | RW | 0x200 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH
430  * [31:12] | ??? | Unknown | *UNDEFINED*
431  *
432  */
433 /*
434  * Field : BANDWIDTH
435  *
436  * In Bandwidth Limiter or Bandwidth Regulator mode, the bandwidth threshold in
437  * units of 1/256th bytes per cycle. For example, 80 MBps on a 250 MHz interface is
438  * value 0x0052.
439  *
440  * Field Access Macros:
441  *
442  */
443 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH register field. */
444 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH_LSB 0
445 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH register field. */
446 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH_MSB 11
447 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH register field. */
448 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH_WIDTH 12
449 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH register field value. */
450 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH_SET_MSK 0x00000fff
451 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH register field value. */
452 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH_CLR_MSK 0xfffff000
453 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH register field. */
454 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH_RESET 0x200
455 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH field value from a register. */
456 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH_GET(value) (((value) & 0x00000fff) >> 0)
457 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH register field value suitable for setting the register. */
458 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH_SET(value) (((value) << 0) & 0x00000fff)
459 
460 #ifndef __ASSEMBLY__
461 /*
462  * WARNING: The C register and register group struct declarations are provided for
463  * convenience and illustrative purposes. They should, however, be used with
464  * caution as the C language standard provides no guarantees about the alignment or
465  * atomicity of device memory accesses. The recommended practice for coding device
466  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
467  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
468  * alt_write_dword() functions for 64 bit registers.
469  *
470  * The struct declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH.
471  */
472 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_s
473 {
474  volatile uint32_t BANDWIDTH : 12; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_BANDWIDTH */
475  uint32_t : 20; /* *UNDEFINED* */
476 };
477 
478 /* The typedef declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH. */
479 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_t;
480 #endif /* __ASSEMBLY__ */
481 
482 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH register. */
483 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_RESET 0x00000200
484 /* The byte offset of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH register from the beginning of the component. */
485 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_OFST 0x10
486 
487 /*
488  * Register : dma_tbu_m_I_main_QosGenerator_Saturation
489  *
490  * Register Layout
491  *
492  * Bits | Access | Reset | Description
493  * :--------|:-------|:--------|:---------------------------------------------------------------------------------------
494  * [9:0] | RW | 0x4 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION
495  * [31:10] | ??? | Unknown | *UNDEFINED*
496  *
497  */
498 /*
499  * Field : SATURATION
500  *
501  * In Bandwidth Limiter or Bandwidth Regulator mode, the maximum data count value,
502  * in units of 16 bytes. This determines the window of time over which bandwidth is
503  * measured. For example, to measure bandwidth within a 1000 cycle window on a
504  * 64-bit interface is value 0x1F4.
505  *
506  * Field Access Macros:
507  *
508  */
509 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION register field. */
510 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION_LSB 0
511 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION register field. */
512 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION_MSB 9
513 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION register field. */
514 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION_WIDTH 10
515 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION register field value. */
516 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION_SET_MSK 0x000003ff
517 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION register field value. */
518 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION_CLR_MSK 0xfffffc00
519 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION register field. */
520 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION_RESET 0x4
521 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION field value from a register. */
522 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION_GET(value) (((value) & 0x000003ff) >> 0)
523 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION register field value suitable for setting the register. */
524 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION_SET(value) (((value) << 0) & 0x000003ff)
525 
526 #ifndef __ASSEMBLY__
527 /*
528  * WARNING: The C register and register group struct declarations are provided for
529  * convenience and illustrative purposes. They should, however, be used with
530  * caution as the C language standard provides no guarantees about the alignment or
531  * atomicity of device memory accesses. The recommended practice for coding device
532  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
533  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
534  * alt_write_dword() functions for 64 bit registers.
535  *
536  * The struct declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION.
537  */
538 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_s
539 {
540  volatile uint32_t SATURATION : 10; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_SATURATION */
541  uint32_t : 22; /* *UNDEFINED* */
542 };
543 
544 /* The typedef declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION. */
545 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_t;
546 #endif /* __ASSEMBLY__ */
547 
548 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION register. */
549 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_RESET 0x00000004
550 /* The byte offset of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION register from the beginning of the component. */
551 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_OFST 0x14
552 
553 /*
554  * Register : dma_tbu_m_I_main_QosGenerator_ExtControl
555  *
556  * External inputs control.
557  *
558  * Register Layout
559  *
560  * Bits | Access | Reset | Description
561  * :-------|:-------|:--------|:----------------------------------------------------------------------------------------
562  * [0] | RW | 0x0 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN
563  * [1] | RW | 0x0 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN
564  * [2] | RW | 0x0 | ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN
565  * [31:3] | ??? | Unknown | *UNDEFINED*
566  *
567  */
568 /*
569  * Field : SOCKETQOSEN
570  *
571  * n/a
572  *
573  * Field Access Macros:
574  *
575  */
576 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN register field. */
577 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN_LSB 0
578 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN register field. */
579 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN_MSB 0
580 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN register field. */
581 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN_WIDTH 1
582 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN register field value. */
583 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN_SET_MSK 0x00000001
584 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN register field value. */
585 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN_CLR_MSK 0xfffffffe
586 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN register field. */
587 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN_RESET 0x0
588 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN field value from a register. */
589 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN_GET(value) (((value) & 0x00000001) >> 0)
590 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN register field value suitable for setting the register. */
591 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN_SET(value) (((value) << 0) & 0x00000001)
592 
593 /*
594  * Field : EXTTHREN
595  *
596  * n/a
597  *
598  * Field Access Macros:
599  *
600  */
601 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN register field. */
602 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN_LSB 1
603 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN register field. */
604 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN_MSB 1
605 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN register field. */
606 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN_WIDTH 1
607 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN register field value. */
608 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN_SET_MSK 0x00000002
609 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN register field value. */
610 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN_CLR_MSK 0xfffffffd
611 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN register field. */
612 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN_RESET 0x0
613 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN field value from a register. */
614 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN_GET(value) (((value) & 0x00000002) >> 1)
615 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN register field value suitable for setting the register. */
616 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN_SET(value) (((value) << 1) & 0x00000002)
617 
618 /*
619  * Field : INTCLKEN
620  *
621  * n/a
622  *
623  * Field Access Macros:
624  *
625  */
626 /* The Least Significant Bit (LSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN register field. */
627 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN_LSB 2
628 /* The Most Significant Bit (MSB) position of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN register field. */
629 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN_MSB 2
630 /* The width in bits of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN register field. */
631 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN_WIDTH 1
632 /* The mask used to set the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN register field value. */
633 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN_SET_MSK 0x00000004
634 /* The mask used to clear the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN register field value. */
635 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN_CLR_MSK 0xfffffffb
636 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN register field. */
637 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN_RESET 0x0
638 /* Extracts the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN field value from a register. */
639 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN_GET(value) (((value) & 0x00000004) >> 2)
640 /* Produces a ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN register field value suitable for setting the register. */
641 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN_SET(value) (((value) << 2) & 0x00000004)
642 
643 #ifndef __ASSEMBLY__
644 /*
645  * WARNING: The C register and register group struct declarations are provided for
646  * convenience and illustrative purposes. They should, however, be used with
647  * caution as the C language standard provides no guarantees about the alignment or
648  * atomicity of device memory accesses. The recommended practice for coding device
649  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
650  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
651  * alt_write_dword() functions for 64 bit registers.
652  *
653  * The struct declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL.
654  */
655 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_s
656 {
657  volatile uint32_t SOCKETQOSEN : 1; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_SOCKETQOSEN */
658  volatile uint32_t EXTTHREN : 1; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_EXTTHREN */
659  volatile uint32_t INTCLKEN : 1; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_INTCLKEN */
660  uint32_t : 29; /* *UNDEFINED* */
661 };
662 
663 /* The typedef declaration for register ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL. */
664 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_t;
665 #endif /* __ASSEMBLY__ */
666 
667 /* The reset value of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL register. */
668 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_RESET 0x00000000
669 /* The byte offset of the ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL register from the beginning of the component. */
670 #define ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_OFST 0x18
671 
672 #ifndef __ASSEMBLY__
673 /*
674  * WARNING: The C register and register group struct declarations are provided for
675  * convenience and illustrative purposes. They should, however, be used with
676  * caution as the C language standard provides no guarantees about the alignment or
677  * atomicity of device memory accesses. The recommended practice for coding device
678  * drivers is to use the SoCAL access macros in conjunction with alt_read_word()
679  * and alt_write_word() functions for 32 bit registers and alt_read_dword() and
680  * alt_write_dword() functions for 64 bit registers.
681  *
682  * The struct declaration for register group ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS.
683  */
684 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_s
685 {
686  volatile ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID_t dma_tbu_m_I_main_QosGenerator_Id_CoreId; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID */
687  volatile ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID_t dma_tbu_m_I_main_QosGenerator_Id_RevisionId; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID */
688  volatile ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY_t dma_tbu_m_I_main_QosGenerator_Priority; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY */
689  volatile ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE_t dma_tbu_m_I_main_QosGenerator_Mode; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE */
690  volatile ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH_t dma_tbu_m_I_main_QosGenerator_Bandwidth; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH */
691  volatile ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION_t dma_tbu_m_I_main_QosGenerator_Saturation; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION */
692  volatile ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL_t dma_tbu_m_I_main_QosGenerator_ExtControl; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL */
693  volatile uint32_t _pad_0x1c_0x80[25]; /* *UNDEFINED* */
694 };
695 
696 /* The typedef declaration for register group ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS. */
697 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_t;
698 /* The struct declaration for the raw register contents of register group ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS. */
699 struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_raw_s
700 {
701  volatile uint32_t dma_tbu_m_I_main_QosGenerator_Id_CoreId; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_COREID */
702  volatile uint32_t dma_tbu_m_I_main_QosGenerator_Id_RevisionId; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_ID_REVISIONID */
703  volatile uint32_t dma_tbu_m_I_main_QosGenerator_Priority; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_PRIORITY */
704  volatile uint32_t dma_tbu_m_I_main_QosGenerator_Mode; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_MODE */
705  volatile uint32_t dma_tbu_m_I_main_QosGenerator_Bandwidth; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_BANDWIDTH */
706  volatile uint32_t dma_tbu_m_I_main_QosGenerator_Saturation; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_SATURATION */
707  volatile uint32_t dma_tbu_m_I_main_QosGenerator_ExtControl; /* ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_DMA_TBU_M_I_MAIN_QOSGENERATOR_EXTCONTROL */
708  volatile uint32_t _pad_0x1c_0x80[25]; /* *UNDEFINED* */
709 };
710 
711 /* The typedef declaration for the raw register contents of register group ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS. */
712 typedef struct ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_raw_s ALT_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_raw_t;
713 #endif /* __ASSEMBLY__ */
714 
715 
716 #ifdef __cplusplus
717 }
718 #endif /* __cplusplus */
719 #endif /* __ALT_SOCAL_NOC_CCU_IOS_DMA_TBU_M_MAIN_QOS_H__ */
720