Hardware Libraries  20.1
Arria 10 SoC Hardware Manager
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alt_can_private.h
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32 
33 /*
34  * $Id: //acds/rel/20.1/embedded/ip/hps/altera_hps/hwlib/include/alt_can_private.h#1 $
35  */
36 
37 /* Altera - ALT_CAN */
38 
39 /* Only include this code for Cyclone V / Arria V */
40 #if defined(soc_cv_av)
41 
42 #ifndef __ALTERA_ALT_CAN_PRIVATE_H__
43 #define __ALTERA_ALT_CAN_PRIVATE_H__
44 
45 #ifdef __cplusplus
46 extern "C"
47 {
48 #endif /* __cplusplus */
49 
50 /*
51  * Register : IF Command Register - IFCMR
52  *
53  * The control bits of the IF/2 Command Register specify the transfer direction
54  * and select which portions of the Message Object should be transferred. A message
55  * transfer is started as soon as the CPU has written the message number to the low
56  * byte of the Command Request Register and IFxCMR.AutoInc is zero. With this write
57  * operation, the IFxCMR.Busy bit is automatically set to 1 to notify the CPU that
58  * a transfer is in progress. After a wait time of 2 to 8 HOST_CLK periods, the
59  * transfer between theInterface Register and the Message RAM has been completed
60  * and the IFxCMR.Busy bit is cleared to 0. The upper limit of the wait time occurs
61  * when the message transfer coincides with a CAN message transmission, acceptance
62  * filtering, or message storage. If the CPU writes to both Command Registers
63  * consecutively (requests a second transfer while another transfer is already in
64  * progress), the second transfer starts when the first one is completed. Note:
65  * While Busy bit of IF/2 Command Register is one, IF/2 Register Set is write
66  * protected.
67  *
68  * Register Layout
69  *
70  * Bits | Access | Reset | Description
71  * :--------|:-------|:------|:-------------------------------------------------------------------
72  * [7:0] | RW | 0x1 | Message Number
73  * [12:8] | ??? | 0x0 | *UNDEFINED*
74  * [13] | RW | 0x0 | Automatic Increment of Message Object Number
75  * [14] | RW | 0x0 | Activation of DMA feature for subsequent internal IFx Register Set
76  * [15] | R | 0x0 | Busy Flag
77  * [16] | RW | 0x0 | Access Data Bytes 4-7
78  * [17] | RW | 0x0 | Access Data Bytes 0-3
79  * [18] | RW | 0x0 | Access Transmission Request Bit and NewDat Bit
80  * [19] | RW | 0x0 | Clear Interrupt Pending Bit
81  * [20] | RW | 0x0 | Access Control Bits
82  * [21] | RW | 0x0 | Access Arbitration Bits
83  * [22] | RW | 0x0 | Access Mask Bits
84  * [23] | RW | 0x0 | Write / Read Transfer
85  * [28:24] | ??? | 0x0 | *UNDEFINED*
86  * [29] | RW | 0x0 | Clear the AutoInc bit without starting a transfer
87  * [31:30] | ??? | 0x0 | *UNDEFINED*
88  *
89  */
90 /*
91  * Field : Message Number - MONum
92  *
93  * 0x01-0x80 Valid Message Number, the Message Object in the Message RAM is
94  * selected for data transfer (up to 128 MsgObj).
95  *
96  * 0x00 Not a valid Message Number, interpreted as 0x80.
97  *
98  * 0x81-0xFF Not a valid Message Number, interpreted as 0x01-0x7F.
99  *
100  * Note: When an invalid Message Number is written to IFxCMR.MONum which is higher
101  * than the last Message Object number, a modulo addressing will occur.When e.g.
102  * accessing Message Object 33 in a CAN module with 32 Message Objects only, the
103  * Message Object 1 will be accessed instead.
104  *
105  * Field Access Macros:
106  *
107  */
108 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_MONUM register field. */
109 #define ALT_CAN_MSGIF_IFCMR_MONUM_LSB 0
110 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_MONUM register field. */
111 #define ALT_CAN_MSGIF_IFCMR_MONUM_MSB 7
112 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_MONUM register field. */
113 #define ALT_CAN_MSGIF_IFCMR_MONUM_WIDTH 8
114 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_MONUM register field value. */
115 #define ALT_CAN_MSGIF_IFCMR_MONUM_SET_MSK 0x000000ff
116 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_MONUM register field value. */
117 #define ALT_CAN_MSGIF_IFCMR_MONUM_CLR_MSK 0xffffff00
118 /* The reset value of the ALT_CAN_MSGIF_IFCMR_MONUM register field. */
119 #define ALT_CAN_MSGIF_IFCMR_MONUM_RESET 0x1
120 /* Extracts the ALT_CAN_MSGIF_IFCMR_MONUM field value from a register. */
121 #define ALT_CAN_MSGIF_IFCMR_MONUM_GET(value) (((value) & 0x000000ff) >> 0)
122 /* Produces a ALT_CAN_MSGIF_IFCMR_MONUM register field value suitable for setting the register. */
123 #define ALT_CAN_MSGIF_IFCMR_MONUM_SET(value) (((value) << 0) & 0x000000ff)
124 
125 /*
126  * Field : Automatic Increment of Message Object Number - AutoInc
127  *
128  * Automatic Increment of Message Object Number
129  *
130  * The behavior of the Message Object Number increment depends on the Transfer
131  * Direction, IFxCMR.WR1RD0.
132  *
133  * * Read: The first transfer will be initiated (Busy Bit will set) at write of
134  * IFxCMR.MONum. The Message Object Number will be incremented and the next
135  * Message Object will be transferred from Message Object RAM to Interface
136  * Registers after a read access of Data-Byte 7.
137  *
138  * * Write: The first as well as each other transfer will be started after write
139  * access to Data- Byte7. The Message Object Number will be incremented after
140  * successful transfer from the Interface Registers to the Message Object RAM.
141  *
142  * Always after successful transfer the Busy Bit will be reset. In combination with
143  * DMAactive the port CAN_IFxDMA is set, too.
144  *
145  * Note: If the direction is configured as Read a write access to Data-Byte 7 will
146  * not start any transfer, as well as if the direction is configured as Write a
147  * read access to Data-Byte 7 will not start any transfer. At transfer direction
148  * Read each read of Data-Byte 7 will start a transfer until IFxCMR.AutoInc is
149  * reset. To aware of resetting a NewDat bit of the following message object, the
150  * application has to reset IFxCMR.AutoInc before reading the Data-Byte 7 of the
151  * last message object which will be read.
152  *
153  * Field Enumeration Values:
154  *
155  * Enum | Value | Description
156  * :------------------------------------|:------|:-------------------------------------------------
157  * ALT_CAN_MSGIF_IFCMR_AUTOINC_E_DISD | 0x0 | AutoIncrement of Message Object Number disabled.
158  * ALT_CAN_MSGIF_IFCMR_AUTOINC_E_END | 0x1 | AutoIncrement of Message Object Number enabled.
159  *
160  * Field Access Macros:
161  *
162  */
163 /*
164  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_AUTOINC
165  *
166  * AutoIncrement of Message Object Number disabled.
167  */
168 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_E_DISD 0x0
169 /*
170  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_AUTOINC
171  *
172  * AutoIncrement of Message Object Number enabled.
173  */
174 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_E_END 0x1
175 
176 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_AUTOINC register field. */
177 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_LSB 13
178 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_AUTOINC register field. */
179 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_MSB 13
180 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_AUTOINC register field. */
181 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_WIDTH 1
182 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_AUTOINC register field value. */
183 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_SET_MSK 0x00002000
184 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_AUTOINC register field value. */
185 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_CLR_MSK 0xffffdfff
186 /* The reset value of the ALT_CAN_MSGIF_IFCMR_AUTOINC register field. */
187 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_RESET 0x0
188 /* Extracts the ALT_CAN_MSGIF_IFCMR_AUTOINC field value from a register. */
189 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_GET(value) (((value) & 0x00002000) >> 13)
190 /* Produces a ALT_CAN_MSGIF_IFCMR_AUTOINC register field value suitable for setting the register. */
191 #define ALT_CAN_MSGIF_IFCMR_AUTOINC_SET(value) (((value) << 13) & 0x00002000)
192 
193 /*
194  * Field : Activation of DMA feature for subsequent internal IFx Register Set - DMAactive
195  *
196  * Activation of DMA feature for subsequent internal IFx Register Set
197  *
198  * Field Enumeration Values:
199  *
200  * Enum | Value | Description
201  * :----------------------------------------|:------|:-------------------------------------------------
202  * ALT_CAN_MSGIF_IFCMR_DMAACT_E_PASSIVE | 0x0 | DMA line leaves passive, independent of IFx
203  * : | | activities.
204  * ALT_CAN_MSGIF_IFCMR_DMAACT_E_INITIATED | 0x1 | By writing to the Command Request Register, an
205  * : | | internal transfer of Message Object Data between
206  * : | | RAM and IFx will be initiated. When this
207  * : | | transfer is complete and DMAactive bit was set,
208  * : | | the CAN_IFxDMA line gets active. The DMAactive
209  * : | | bit and port CAN_IFxDMA are staying active until
210  * : | | first read or write access to one of the IFx
211  * : | | registers. If AutoInc is set DMAactive will be
212  * : | | left active, otherwise the bit is reset. Note:
213  * : | | Due to auto reset feature of DMAactive bit if
214  * : | | AutoInc is inactive, this bit has to be set for
215  * : | | each subsequent DMA cycle separately. DMA line
216  * : | | has to be enabled in CAN Control Register.
217  *
218  * Field Access Macros:
219  *
220  */
221 /*
222  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_DMAACT
223  *
224  * DMA line leaves passive, independent of IFx activities.
225  */
226 #define ALT_CAN_MSGIF_IFCMR_DMAACT_E_PASSIVE 0x0
227 /*
228  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_DMAACT
229  *
230  * By writing to the Command Request Register, an internal transfer of Message
231  * Object Data between RAM and IFx will be initiated. When this transfer is
232  * complete and DMAactive bit was set, the CAN_IFxDMA line gets active. The
233  * DMAactive bit and port CAN_IFxDMA are staying active until first read or write
234  * access to one of the IFx registers. If AutoInc is set DMAactive will be left
235  * active, otherwise the bit is reset.
236  *
237  * Note: Due to auto reset feature of DMAactive bit if AutoInc is inactive, this
238  * bit has to be set for each subsequent DMA cycle separately. DMA line has to be
239  * enabled in CAN Control Register.
240  */
241 #define ALT_CAN_MSGIF_IFCMR_DMAACT_E_INITIATED 0x1
242 
243 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_DMAACT register field. */
244 #define ALT_CAN_MSGIF_IFCMR_DMAACT_LSB 14
245 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_DMAACT register field. */
246 #define ALT_CAN_MSGIF_IFCMR_DMAACT_MSB 14
247 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_DMAACT register field. */
248 #define ALT_CAN_MSGIF_IFCMR_DMAACT_WIDTH 1
249 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_DMAACT register field value. */
250 #define ALT_CAN_MSGIF_IFCMR_DMAACT_SET_MSK 0x00004000
251 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_DMAACT register field value. */
252 #define ALT_CAN_MSGIF_IFCMR_DMAACT_CLR_MSK 0xffffbfff
253 /* The reset value of the ALT_CAN_MSGIF_IFCMR_DMAACT register field. */
254 #define ALT_CAN_MSGIF_IFCMR_DMAACT_RESET 0x0
255 /* Extracts the ALT_CAN_MSGIF_IFCMR_DMAACT field value from a register. */
256 #define ALT_CAN_MSGIF_IFCMR_DMAACT_GET(value) (((value) & 0x00004000) >> 14)
257 /* Produces a ALT_CAN_MSGIF_IFCMR_DMAACT register field value suitable for setting the register. */
258 #define ALT_CAN_MSGIF_IFCMR_DMAACT_SET(value) (((value) << 14) & 0x00004000)
259 
260 /*
261  * Field : Busy Flag - Busy
262  *
263  * Busy Flag
264  *
265  * Field Enumeration Values:
266  *
267  * Enum | Value | Description
268  * :------------------------------------|:------|:-------------------------------------------------
269  * ALT_CAN_MSGIF_IFCMR_BUSY_E_DONE | 0x0 | Set to zero when read/write action has finished.
270  * ALT_CAN_MSGIF_IFCMR_BUSY_E_WRITING | 0x1 | Set to one when writing to the IFxCMR.MONum.
271  * : | | While bit is one, IFx Register Set is write
272  * : | | protected.
273  *
274  * Field Access Macros:
275  *
276  */
277 /*
278  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_BUSY
279  *
280  * Set to zero when read/write action has finished.
281  */
282 #define ALT_CAN_MSGIF_IFCMR_BUSY_E_DONE 0x0
283 /*
284  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_BUSY
285  *
286  * Set to one when writing to the IFxCMR.MONum. While bit is one, IFx Register Set
287  * is write protected.
288  */
289 #define ALT_CAN_MSGIF_IFCMR_BUSY_E_WRITING 0x1
290 
291 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_BUSY register field. */
292 #define ALT_CAN_MSGIF_IFCMR_BUSY_LSB 15
293 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_BUSY register field. */
294 #define ALT_CAN_MSGIF_IFCMR_BUSY_MSB 15
295 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_BUSY register field. */
296 #define ALT_CAN_MSGIF_IFCMR_BUSY_WIDTH 1
297 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_BUSY register field value. */
298 #define ALT_CAN_MSGIF_IFCMR_BUSY_SET_MSK 0x00008000
299 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_BUSY register field value. */
300 #define ALT_CAN_MSGIF_IFCMR_BUSY_CLR_MSK 0xffff7fff
301 /* The reset value of the ALT_CAN_MSGIF_IFCMR_BUSY register field. */
302 #define ALT_CAN_MSGIF_IFCMR_BUSY_RESET 0x0
303 /* Extracts the ALT_CAN_MSGIF_IFCMR_BUSY field value from a register. */
304 #define ALT_CAN_MSGIF_IFCMR_BUSY_GET(value) (((value) & 0x00008000) >> 15)
305 /* Produces a ALT_CAN_MSGIF_IFCMR_BUSY register field value suitable for setting the register. */
306 #define ALT_CAN_MSGIF_IFCMR_BUSY_SET(value) (((value) << 15) & 0x00008000)
307 
308 /*
309  * Field : Access Data Bytes 4-7 - DataB
310  *
311  * Write Direction:
312  *
313  * 0= Data Bytes 4-7 unchanged.
314  *
315  * 1= transfer Data Bytes 4-7 to Message Object.
316  *
317  * Read Direction:
318  *
319  * 0= Data Bytes 4-7 unchanged.
320  *
321  * 1= transfer Data Bytes 4-7 to IFxDB.
322  *
323  * Note: The speed of the message transfer does not depend on how many bytes are
324  * transferred.
325  *
326  * Field Access Macros:
327  *
328  */
329 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_DATAB register field. */
330 #define ALT_CAN_MSGIF_IFCMR_DATAB_LSB 16
331 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_DATAB register field. */
332 #define ALT_CAN_MSGIF_IFCMR_DATAB_MSB 16
333 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_DATAB register field. */
334 #define ALT_CAN_MSGIF_IFCMR_DATAB_WIDTH 1
335 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_DATAB register field value. */
336 #define ALT_CAN_MSGIF_IFCMR_DATAB_SET_MSK 0x00010000
337 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_DATAB register field value. */
338 #define ALT_CAN_MSGIF_IFCMR_DATAB_CLR_MSK 0xfffeffff
339 /* The reset value of the ALT_CAN_MSGIF_IFCMR_DATAB register field. */
340 #define ALT_CAN_MSGIF_IFCMR_DATAB_RESET 0x0
341 /* Extracts the ALT_CAN_MSGIF_IFCMR_DATAB field value from a register. */
342 #define ALT_CAN_MSGIF_IFCMR_DATAB_GET(value) (((value) & 0x00010000) >> 16)
343 /* Produces a ALT_CAN_MSGIF_IFCMR_DATAB register field value suitable for setting the register. */
344 #define ALT_CAN_MSGIF_IFCMR_DATAB_SET(value) (((value) << 16) & 0x00010000)
345 
346 /*
347  * Field : Access Data Bytes 0-3 - DataA
348  *
349  * Write Direction:
350  *
351  * 0= Data Bytes 0-3 unchanged.
352  *
353  * 1= transfer Data Bytes 0-3 to Message Object.
354  *
355  * Read Direction:
356  *
357  * 0= Data Bytes 0-3 unchanged.
358  *
359  * 1= transfer Data Bytes 0-3 to IFxDA.
360  *
361  * Field Access Macros:
362  *
363  */
364 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_DATAA register field. */
365 #define ALT_CAN_MSGIF_IFCMR_DATAA_LSB 17
366 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_DATAA register field. */
367 #define ALT_CAN_MSGIF_IFCMR_DATAA_MSB 17
368 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_DATAA register field. */
369 #define ALT_CAN_MSGIF_IFCMR_DATAA_WIDTH 1
370 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_DATAA register field value. */
371 #define ALT_CAN_MSGIF_IFCMR_DATAA_SET_MSK 0x00020000
372 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_DATAA register field value. */
373 #define ALT_CAN_MSGIF_IFCMR_DATAA_CLR_MSK 0xfffdffff
374 /* The reset value of the ALT_CAN_MSGIF_IFCMR_DATAA register field. */
375 #define ALT_CAN_MSGIF_IFCMR_DATAA_RESET 0x0
376 /* Extracts the ALT_CAN_MSGIF_IFCMR_DATAA field value from a register. */
377 #define ALT_CAN_MSGIF_IFCMR_DATAA_GET(value) (((value) & 0x00020000) >> 17)
378 /* Produces a ALT_CAN_MSGIF_IFCMR_DATAA register field value suitable for setting the register. */
379 #define ALT_CAN_MSGIF_IFCMR_DATAA_SET(value) (((value) << 17) & 0x00020000)
380 
381 /*
382  * Field : Access Transmission Request Bit and NewDat Bit - TxRqstNewDat
383  *
384  * Write Direction:
385  *
386  * 0= TxRqst and NewDat bit will be handled according IFxMCTR.NewDat bit and
387  * IFxMCTR.TxRqst bit.
388  *
389  * 1= set TxRqst and NewDat in Message Object to one
390  *
391  * Note: If a CAN transmission is requested by setting IFxCMR.TxRqst/NewDat, the
392  * TxRqst and NewDat bits in the Message Object will be set to one independently of
393  * the values in IFxMCTR.
394  *
395  * Read Direction:
396  *
397  * 0= NewDat bit remains unchanged.
398  *
399  * 1= clear NewDat bit in the Message Object.
400  *
401  * Note: A read access to a Message Object can be combined with the reset of the
402  * control bits IntPnd and NewDat. The values of these bits transferred to the
403  * IFxMCTR always reflect the status before resetting them.
404  *
405  * Field Access Macros:
406  *
407  */
408 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field. */
409 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_LSB 18
410 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field. */
411 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_MSB 18
412 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field. */
413 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_WIDTH 1
414 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field value. */
415 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_SET_MSK 0x00040000
416 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field value. */
417 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_CLR_MSK 0xfffbffff
418 /* The reset value of the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field. */
419 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_RESET 0x0
420 /* Extracts the ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT field value from a register. */
421 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_GET(value) (((value) & 0x00040000) >> 18)
422 /* Produces a ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT register field value suitable for setting the register. */
423 #define ALT_CAN_MSGIF_IFCMR_TXRQSTNEWDAT_SET(value) (((value) << 18) & 0x00040000)
424 
425 /*
426  * Field : Clear Interrupt Pending Bit - ClrIntPnd
427  *
428  * Write Direction:
429  *
430  * Has no influence to Message Object at write transfer.
431  *
432  * Note: When writing to a Message Object, this bit is ignored and copying of
433  * IntPnd flag from IFx Control Register to Message RAM could only be controlled by
434  * IFxMTR.IntPnd bit.
435  *
436  * Read Direction:
437  *
438  * 0= IntPnd bit remains unchanged.
439  *
440  * 1= clear IntPnd bit in the Message Object.
441  *
442  * Field Access Macros:
443  *
444  */
445 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field. */
446 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_LSB 19
447 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field. */
448 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_MSB 19
449 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field. */
450 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_WIDTH 1
451 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field value. */
452 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_SET_MSK 0x00080000
453 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field value. */
454 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_CLR_MSK 0xfff7ffff
455 /* The reset value of the ALT_CAN_MSGIF_IFCMR_CLRINTPND register field. */
456 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_RESET 0x0
457 /* Extracts the ALT_CAN_MSGIF_IFCMR_CLRINTPND field value from a register. */
458 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_GET(value) (((value) & 0x00080000) >> 19)
459 /* Produces a ALT_CAN_MSGIF_IFCMR_CLRINTPND register field value suitable for setting the register. */
460 #define ALT_CAN_MSGIF_IFCMR_CLRINTPND_SET(value) (((value) << 19) & 0x00080000)
461 
462 /*
463  * Field : Access Control Bits - Control
464  *
465  * Write Direction:
466  *
467  * 0= Control Bits unchanged.
468  *
469  * 1= transfer Control Bits to Message Object.
470  *
471  * Note: If IFxCMR.TxRqst/NewDat bit is set, bits IFxMCTR.TxRqst and IFxMCTR.NewDat
472  * will be ignored.
473  *
474  * Read Direction:
475  *
476  * 0= Control Bits unchanged.
477  *
478  * 1= transfer Control Bits to IFxMCTR Register.
479  *
480  * Field Access Macros:
481  *
482  */
483 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_CTL register field. */
484 #define ALT_CAN_MSGIF_IFCMR_CTL_LSB 20
485 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_CTL register field. */
486 #define ALT_CAN_MSGIF_IFCMR_CTL_MSB 20
487 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_CTL register field. */
488 #define ALT_CAN_MSGIF_IFCMR_CTL_WIDTH 1
489 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_CTL register field value. */
490 #define ALT_CAN_MSGIF_IFCMR_CTL_SET_MSK 0x00100000
491 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_CTL register field value. */
492 #define ALT_CAN_MSGIF_IFCMR_CTL_CLR_MSK 0xffefffff
493 /* The reset value of the ALT_CAN_MSGIF_IFCMR_CTL register field. */
494 #define ALT_CAN_MSGIF_IFCMR_CTL_RESET 0x0
495 /* Extracts the ALT_CAN_MSGIF_IFCMR_CTL field value from a register. */
496 #define ALT_CAN_MSGIF_IFCMR_CTL_GET(value) (((value) & 0x00100000) >> 20)
497 /* Produces a ALT_CAN_MSGIF_IFCMR_CTL register field value suitable for setting the register. */
498 #define ALT_CAN_MSGIF_IFCMR_CTL_SET(value) (((value) << 20) & 0x00100000)
499 
500 /*
501  * Field : Access Arbitration Bits - Arb
502  *
503  * Write Direction:
504  *
505  * 0= Arbitration bits unchanged.
506  *
507  * 1= transfer Identifier + Dir + Xtd + MsgVal to Message Object.
508  *
509  * Read Direction:
510  *
511  * 0= Arbitration bits unchanged.
512  *
513  * 1= transfer Identifier + Dir + Xtd + MsgVal to IFxARB Register.
514  *
515  * Field Access Macros:
516  *
517  */
518 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_ARB register field. */
519 #define ALT_CAN_MSGIF_IFCMR_ARB_LSB 21
520 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_ARB register field. */
521 #define ALT_CAN_MSGIF_IFCMR_ARB_MSB 21
522 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_ARB register field. */
523 #define ALT_CAN_MSGIF_IFCMR_ARB_WIDTH 1
524 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_ARB register field value. */
525 #define ALT_CAN_MSGIF_IFCMR_ARB_SET_MSK 0x00200000
526 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_ARB register field value. */
527 #define ALT_CAN_MSGIF_IFCMR_ARB_CLR_MSK 0xffdfffff
528 /* The reset value of the ALT_CAN_MSGIF_IFCMR_ARB register field. */
529 #define ALT_CAN_MSGIF_IFCMR_ARB_RESET 0x0
530 /* Extracts the ALT_CAN_MSGIF_IFCMR_ARB field value from a register. */
531 #define ALT_CAN_MSGIF_IFCMR_ARB_GET(value) (((value) & 0x00200000) >> 21)
532 /* Produces a ALT_CAN_MSGIF_IFCMR_ARB register field value suitable for setting the register. */
533 #define ALT_CAN_MSGIF_IFCMR_ARB_SET(value) (((value) << 21) & 0x00200000)
534 
535 /*
536  * Field : Access Mask Bits - Mask
537  *
538  * Write Direction:
539  *
540  * 0= Mask bits unchanged.
541  *
542  * 1= transfer Identifier Mask + MDir + MXtd to Message Object.
543  *
544  * Read Direction:
545  *
546  * 0= Mask bits unchanged.
547  *
548  * 1= transfer Identifier Mask + MDir + MXtd to IFxMSK Register.
549  *
550  * Field Access Macros:
551  *
552  */
553 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_MSK register field. */
554 #define ALT_CAN_MSGIF_IFCMR_MSK_LSB 22
555 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_MSK register field. */
556 #define ALT_CAN_MSGIF_IFCMR_MSK_MSB 22
557 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_MSK register field. */
558 #define ALT_CAN_MSGIF_IFCMR_MSK_WIDTH 1
559 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_MSK register field value. */
560 #define ALT_CAN_MSGIF_IFCMR_MSK_SET_MSK 0x00400000
561 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_MSK register field value. */
562 #define ALT_CAN_MSGIF_IFCMR_MSK_CLR_MSK 0xffbfffff
563 /* The reset value of the ALT_CAN_MSGIF_IFCMR_MSK register field. */
564 #define ALT_CAN_MSGIF_IFCMR_MSK_RESET 0x0
565 /* Extracts the ALT_CAN_MSGIF_IFCMR_MSK field value from a register. */
566 #define ALT_CAN_MSGIF_IFCMR_MSK_GET(value) (((value) & 0x00400000) >> 22)
567 /* Produces a ALT_CAN_MSGIF_IFCMR_MSK register field value suitable for setting the register. */
568 #define ALT_CAN_MSGIF_IFCMR_MSK_SET(value) (((value) << 22) & 0x00400000)
569 
570 /*
571  * Field : Write / Read Transfer - WR1RD0
572  *
573  * Write / Read Transfer
574  *
575  * Field Enumeration Values:
576  *
577  * Enum | Value | Description
578  * :---------------------------------|:------|:-------------------------------------------------
579  * ALT_CAN_MSGIF_IFCMR_WR1RD0_E_RD | 0x0 | Transfer data from the Message Object addressed
580  * : | | by IFxCMR.MONum into the selected IFx Message
581  * : | | Buffer Registers.
582  * ALT_CAN_MSGIF_IFCMR_WR1RD0_E_WR | 0x1 | Transfer data from the selected IFx Message
583  * : | | Buffer Registers to the Message Object addressed
584  * : | | by IFxCMR.MONum.
585  *
586  * Field Access Macros:
587  *
588  */
589 /*
590  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_WR1RD0
591  *
592  * Transfer data from the Message Object addressed by IFxCMR.MONum into the
593  * selected IFx Message Buffer Registers.
594  */
595 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_E_RD 0x0
596 /*
597  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_WR1RD0
598  *
599  * Transfer data from the selected IFx Message Buffer Registers to the Message
600  * Object addressed by IFxCMR.MONum.
601  */
602 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_E_WR 0x1
603 
604 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field. */
605 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_LSB 23
606 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field. */
607 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_MSB 23
608 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field. */
609 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_WIDTH 1
610 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field value. */
611 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_SET_MSK 0x00800000
612 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field value. */
613 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_CLR_MSK 0xff7fffff
614 /* The reset value of the ALT_CAN_MSGIF_IFCMR_WR1RD0 register field. */
615 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_RESET 0x0
616 /* Extracts the ALT_CAN_MSGIF_IFCMR_WR1RD0 field value from a register. */
617 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_GET(value) (((value) & 0x00800000) >> 23)
618 /* Produces a ALT_CAN_MSGIF_IFCMR_WR1RD0 register field value suitable for setting the register. */
619 #define ALT_CAN_MSGIF_IFCMR_WR1RD0_SET(value) (((value) << 23) & 0x00800000)
620 
621 /*
622  * Field : Clear the AutoInc bit without starting a transfer - ClrAutoInc
623  *
624  * Clear the AutoInc bit without starting a transfer
625  *
626  * Field Enumeration Values:
627  *
628  * Enum | Value | Description
629  * :----------------------------------------|:------|:------------------------------------------
630  * ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_E_NOCLR | 0x0 | Has no effect to the other Bits of this
631  * : | | Register.
632  * ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_E_CLR | 0x1 | Clear the AutoInc bit without starting a
633  * : | | transfer, all other bits will be ignored.
634  *
635  * Field Access Macros:
636  *
637  */
638 /*
639  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_CLRAUTOINC
640  *
641  * Has no effect to the other Bits of this Register.
642  */
643 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_E_NOCLR 0x0
644 /*
645  * Enumerated value for register field ALT_CAN_MSGIF_IFCMR_CLRAUTOINC
646  *
647  * Clear the AutoInc bit without starting a transfer, all other bits will be
648  * ignored.
649  */
650 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_E_CLR 0x1
651 
652 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field. */
653 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_LSB 29
654 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field. */
655 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_MSB 29
656 /* The width in bits of the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field. */
657 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_WIDTH 1
658 /* The mask used to set the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field value. */
659 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_SET_MSK 0x20000000
660 /* The mask used to clear the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field value. */
661 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_CLR_MSK 0xdfffffff
662 /* The reset value of the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field. */
663 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_RESET 0x0
664 /* Extracts the ALT_CAN_MSGIF_IFCMR_CLRAUTOINC field value from a register. */
665 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_GET(value) (((value) & 0x20000000) >> 29)
666 /* Produces a ALT_CAN_MSGIF_IFCMR_CLRAUTOINC register field value suitable for setting the register. */
667 #define ALT_CAN_MSGIF_IFCMR_CLRAUTOINC_SET(value) (((value) << 29) & 0x20000000)
668 
669 #ifndef __ASSEMBLY__
670 /*
671  * WARNING: The C register and register group struct declarations are provided for
672  * convenience and illustrative purposes. They should, however, be used with
673  * caution as the C language standard provides no guarantees about the alignment or
674  * atomicity of device memory accesses. The recommended practice for writing
675  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
676  * alt_write_word() functions.
677  *
678  * The struct declaration for register ALT_CAN_MSGIF_IFCMR.
679  */
680 struct ALT_CAN_MSGIF_IFCMR_s
681 {
682  uint32_t MONum : 8; /* Message Number */
683  uint32_t : 5; /* *UNDEFINED* */
684  uint32_t AutoInc : 1; /* Automatic Increment of Message Object Number */
685  uint32_t DMAactive : 1; /* Activation of DMA feature for subsequent internal IFx Register Set */
686  const uint32_t Busy : 1; /* Busy Flag */
687  uint32_t DataB : 1; /* Access Data Bytes 4-7 */
688  uint32_t DataA : 1; /* Access Data Bytes 0-3 */
689  uint32_t TxRqstNewDat : 1; /* Access Transmission Request Bit and NewDat Bit */
690  uint32_t ClrIntPnd : 1; /* Clear Interrupt Pending Bit */
691  uint32_t Control : 1; /* Access Control Bits */
692  uint32_t Arb : 1; /* Access Arbitration Bits */
693  uint32_t Mask : 1; /* Access Mask Bits */
694  uint32_t WR1RD0 : 1; /* Write / Read Transfer */
695  uint32_t : 5; /* *UNDEFINED* */
696  uint32_t ClrAutoInc : 1; /* Clear the AutoInc bit without starting a transfer */
697  uint32_t : 2; /* *UNDEFINED* */
698 };
699 
700 /* The typedef declaration for register ALT_CAN_MSGIF_IFCMR. */
701 typedef volatile struct ALT_CAN_MSGIF_IFCMR_s ALT_CAN_MSGIF_IFCMR_t;
702 #endif /* __ASSEMBLY__ */
703 
704 /* The byte offset of the ALT_CAN_MSGIF_IFCMR register from the beginning of the component. */
705 #define ALT_CAN_MSGIF_IFCMR_OFST 0x0
706 /* The address of the ALT_CAN_MSGIF_IFCMR register. */
707 #define ALT_CAN_MSGIF_IFCMR_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFCMR_OFST))
708 
709 /*
710  * Register : IF Mask Register - IFMSK
711  *
712  * The Message Object Mask Bits together with the arbitration bits are used for
713  * acceptance filtering of incoming messages.
714  *
715  * Note: While IFxCMR.Busy bit is one, the IF/2 Register Set is write protected.
716  *
717  * Register Layout
718  *
719  * Bits | Access | Reset | Description
720  * :-------|:-------|:-----------|:-------------------------
721  * [28:0] | RW | 0x1fffffff | Identifier Mask
722  * [29] | ??? | 0x1 | *UNDEFINED*
723  * [30] | RW | 0x1 | Mask Message Direction
724  * [31] | RW | 0x1 | Mask Extended Identifier
725  *
726  */
727 /*
728  * Field : Identifier Mask - Msk
729  *
730  * 0 = The corresponding bit in the identifier of the message object cannot inhibit
731  * the match in the acceptance filtering.
732  *
733  * 1 = The corresponding identifier bit is used for acceptance filtering.
734  *
735  * Field Access Macros:
736  *
737  */
738 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMSK_MSK register field. */
739 #define ALT_CAN_MSGIF_IFMSK_MSK_LSB 0
740 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMSK_MSK register field. */
741 #define ALT_CAN_MSGIF_IFMSK_MSK_MSB 28
742 /* The width in bits of the ALT_CAN_MSGIF_IFMSK_MSK register field. */
743 #define ALT_CAN_MSGIF_IFMSK_MSK_WIDTH 29
744 /* The mask used to set the ALT_CAN_MSGIF_IFMSK_MSK register field value. */
745 #define ALT_CAN_MSGIF_IFMSK_MSK_SET_MSK 0x1fffffff
746 /* The mask used to clear the ALT_CAN_MSGIF_IFMSK_MSK register field value. */
747 #define ALT_CAN_MSGIF_IFMSK_MSK_CLR_MSK 0xe0000000
748 /* The reset value of the ALT_CAN_MSGIF_IFMSK_MSK register field. */
749 #define ALT_CAN_MSGIF_IFMSK_MSK_RESET 0x1fffffff
750 /* Extracts the ALT_CAN_MSGIF_IFMSK_MSK field value from a register. */
751 #define ALT_CAN_MSGIF_IFMSK_MSK_GET(value) (((value) & 0x1fffffff) >> 0)
752 /* Produces a ALT_CAN_MSGIF_IFMSK_MSK register field value suitable for setting the register. */
753 #define ALT_CAN_MSGIF_IFMSK_MSK_SET(value) (((value) << 0) & 0x1fffffff)
754 
755 /*
756  * Field : Mask Message Direction - MDir
757  *
758  * Field Enumeration Values:
759  *
760  * Enum | Value | Description
761  * :-------------------------------------------|:------|:-------------------------------------------------
762  * ALT_CAN_MSGIF_IFMSK_MDIR_E_NOACCEPTEFFECT | 0x0 | The message direction bit (Dir) has no effect on
763  * : | | the acceptance filtering. Handle with care
764  * : | | setting IFxMSK.MDir to zero.
765  * ALT_CAN_MSGIF_IFMSK_MDIR_E_ACCEPTEFFECT | 0x1 | The message direction bit (Dir) is used for
766  * : | | acceptance filtering.
767  *
768  * Field Access Macros:
769  *
770  */
771 /*
772  * Enumerated value for register field ALT_CAN_MSGIF_IFMSK_MDIR
773  *
774  * The message direction bit (Dir) has no effect on the acceptance filtering.
775  * Handle with care setting IFxMSK.MDir to zero.
776  */
777 #define ALT_CAN_MSGIF_IFMSK_MDIR_E_NOACCEPTEFFECT 0x0
778 /*
779  * Enumerated value for register field ALT_CAN_MSGIF_IFMSK_MDIR
780  *
781  * The message direction bit (Dir) is used for acceptance filtering.
782  */
783 #define ALT_CAN_MSGIF_IFMSK_MDIR_E_ACCEPTEFFECT 0x1
784 
785 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMSK_MDIR register field. */
786 #define ALT_CAN_MSGIF_IFMSK_MDIR_LSB 30
787 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMSK_MDIR register field. */
788 #define ALT_CAN_MSGIF_IFMSK_MDIR_MSB 30
789 /* The width in bits of the ALT_CAN_MSGIF_IFMSK_MDIR register field. */
790 #define ALT_CAN_MSGIF_IFMSK_MDIR_WIDTH 1
791 /* The mask used to set the ALT_CAN_MSGIF_IFMSK_MDIR register field value. */
792 #define ALT_CAN_MSGIF_IFMSK_MDIR_SET_MSK 0x40000000
793 /* The mask used to clear the ALT_CAN_MSGIF_IFMSK_MDIR register field value. */
794 #define ALT_CAN_MSGIF_IFMSK_MDIR_CLR_MSK 0xbfffffff
795 /* The reset value of the ALT_CAN_MSGIF_IFMSK_MDIR register field. */
796 #define ALT_CAN_MSGIF_IFMSK_MDIR_RESET 0x1
797 /* Extracts the ALT_CAN_MSGIF_IFMSK_MDIR field value from a register. */
798 #define ALT_CAN_MSGIF_IFMSK_MDIR_GET(value) (((value) & 0x40000000) >> 30)
799 /* Produces a ALT_CAN_MSGIF_IFMSK_MDIR register field value suitable for setting the register. */
800 #define ALT_CAN_MSGIF_IFMSK_MDIR_SET(value) (((value) << 30) & 0x40000000)
801 
802 /*
803  * Field : Mask Extended Identifier - MXtd
804  *
805  * When 11-bit (standard) Identifiers are used for a Message Object, the
806  * identifiers of received Data Frames are written into bits ID28 to ID18. For
807  * acceptance filtering, only these bits together with mask bits Msk28 to Msk18 are
808  * considered.
809  *
810  * Field Enumeration Values:
811  *
812  * Enum | Value | Description
813  * :-------------------------------------------|:------|:------------------------------------------------
814  * ALT_CAN_MSGIF_IFMSK_MXTD_E_NOACCEPTEFFECT | 0x0 | The extended identifier bit (IDE) has no effect
815  * : | | on the acceptance filtering.
816  * ALT_CAN_MSGIF_IFMSK_MXTD_E_ACCEPTEFFECT | 0x1 | The extended identifier bit (IDE) is used for
817  * : | | acceptance filtering.
818  *
819  * Field Access Macros:
820  *
821  */
822 /*
823  * Enumerated value for register field ALT_CAN_MSGIF_IFMSK_MXTD
824  *
825  * The extended identifier bit (IDE) has no effect on the acceptance filtering.
826  */
827 #define ALT_CAN_MSGIF_IFMSK_MXTD_E_NOACCEPTEFFECT 0x0
828 /*
829  * Enumerated value for register field ALT_CAN_MSGIF_IFMSK_MXTD
830  *
831  * The extended identifier bit (IDE) is used for acceptance filtering.
832  */
833 #define ALT_CAN_MSGIF_IFMSK_MXTD_E_ACCEPTEFFECT 0x1
834 
835 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMSK_MXTD register field. */
836 #define ALT_CAN_MSGIF_IFMSK_MXTD_LSB 31
837 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMSK_MXTD register field. */
838 #define ALT_CAN_MSGIF_IFMSK_MXTD_MSB 31
839 /* The width in bits of the ALT_CAN_MSGIF_IFMSK_MXTD register field. */
840 #define ALT_CAN_MSGIF_IFMSK_MXTD_WIDTH 1
841 /* The mask used to set the ALT_CAN_MSGIF_IFMSK_MXTD register field value. */
842 #define ALT_CAN_MSGIF_IFMSK_MXTD_SET_MSK 0x80000000
843 /* The mask used to clear the ALT_CAN_MSGIF_IFMSK_MXTD register field value. */
844 #define ALT_CAN_MSGIF_IFMSK_MXTD_CLR_MSK 0x7fffffff
845 /* The reset value of the ALT_CAN_MSGIF_IFMSK_MXTD register field. */
846 #define ALT_CAN_MSGIF_IFMSK_MXTD_RESET 0x1
847 /* Extracts the ALT_CAN_MSGIF_IFMSK_MXTD field value from a register. */
848 #define ALT_CAN_MSGIF_IFMSK_MXTD_GET(value) (((value) & 0x80000000) >> 31)
849 /* Produces a ALT_CAN_MSGIF_IFMSK_MXTD register field value suitable for setting the register. */
850 #define ALT_CAN_MSGIF_IFMSK_MXTD_SET(value) (((value) << 31) & 0x80000000)
851 
852 #ifndef __ASSEMBLY__
853 /*
854  * WARNING: The C register and register group struct declarations are provided for
855  * convenience and illustrative purposes. They should, however, be used with
856  * caution as the C language standard provides no guarantees about the alignment or
857  * atomicity of device memory accesses. The recommended practice for writing
858  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
859  * alt_write_word() functions.
860  *
861  * The struct declaration for register ALT_CAN_MSGIF_IFMSK.
862  */
863 struct ALT_CAN_MSGIF_IFMSK_s
864 {
865  uint32_t Msk : 29; /* Identifier Mask */
866  uint32_t : 1; /* *UNDEFINED* */
867  uint32_t MDir : 1; /* Mask Message Direction */
868  uint32_t MXtd : 1; /* Mask Extended Identifier */
869 };
870 
871 /* The typedef declaration for register ALT_CAN_MSGIF_IFMSK. */
872 typedef volatile struct ALT_CAN_MSGIF_IFMSK_s ALT_CAN_MSGIF_IFMSK_t;
873 #endif /* __ASSEMBLY__ */
874 
875 /* The byte offset of the ALT_CAN_MSGIF_IFMSK register from the beginning of the component. */
876 #define ALT_CAN_MSGIF_IFMSK_OFST 0x4
877 /* The address of the ALT_CAN_MSGIF_IFMSK register. */
878 #define ALT_CAN_MSGIF_IFMSK_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFMSK_OFST))
879 
880 /*
881  * Register : IF Arbitration Register - IFARB
882  *
883  * The Arbitration Registers ID28-0, Xtd, and Dir are used to define the identifier
884  * and type of outgoing messages and are used (together with the mask registers
885  * Msk28-0, MXtd, and MDir) for acceptance filtering of incoming messages. A
886  * received message is stored into the valid Message Object with matching
887  * identifier and Direction=receive (Data Frame) or Direction=transmit (Remote
888  * Frame). Extended frames can be stored only in Message Objects with Xtd = one,
889  * standard frames in Message Objects with Xtd = zero. If a received message (Data
890  * Frame or Remote Frame) matches with more than one valid Message Object, it is
891  * stored into that with the lowest message number.
892  *
893  * Register Layout
894  *
895  * Bits | Access | Reset | Description
896  * :-------|:-------|:------|:--------------------
897  * [28:0] | RW | 0x0 | Identifier Mask
898  * [29] | RW | 0x0 | Message Direction
899  * [30] | RW | 0x0 | Extended Identifier
900  * [31] | RW | 0x0 | Message Valid
901  *
902  */
903 /*
904  * Field : Identifier Mask - ID
905  *
906  * ID28 - ID0 29-bit Identifier (Extended Frame).
907  *
908  * ID28 - ID18 11-bit Identifier (Standard Frame).
909  *
910  * Field Access Macros:
911  *
912  */
913 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFARB_ID register field. */
914 #define ALT_CAN_MSGIF_IFARB_ID_LSB 0
915 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFARB_ID register field. */
916 #define ALT_CAN_MSGIF_IFARB_ID_MSB 28
917 /* The width in bits of the ALT_CAN_MSGIF_IFARB_ID register field. */
918 #define ALT_CAN_MSGIF_IFARB_ID_WIDTH 29
919 /* The mask used to set the ALT_CAN_MSGIF_IFARB_ID register field value. */
920 #define ALT_CAN_MSGIF_IFARB_ID_SET_MSK 0x1fffffff
921 /* The mask used to clear the ALT_CAN_MSGIF_IFARB_ID register field value. */
922 #define ALT_CAN_MSGIF_IFARB_ID_CLR_MSK 0xe0000000
923 /* The reset value of the ALT_CAN_MSGIF_IFARB_ID register field. */
924 #define ALT_CAN_MSGIF_IFARB_ID_RESET 0x0
925 /* Extracts the ALT_CAN_MSGIF_IFARB_ID field value from a register. */
926 #define ALT_CAN_MSGIF_IFARB_ID_GET(value) (((value) & 0x1fffffff) >> 0)
927 /* Produces a ALT_CAN_MSGIF_IFARB_ID register field value suitable for setting the register. */
928 #define ALT_CAN_MSGIF_IFARB_ID_SET(value) (((value) << 0) & 0x1fffffff)
929 
930 /*
931  * Field : Message Direction - Dir
932  *
933  * Message Direction
934  *
935  * Field Enumeration Values:
936  *
937  * Enum | Value | Description
938  * :------------------------------|:------|:-------------------------------------------------
939  * ALT_CAN_MSGIF_IFARB_DIR_E_RX | 0x0 | On TxRqst, a Remote Frame with the identifier of
940  * : | | this Message Object is transmitted. On reception
941  * : | | of a Data Frame with matching identifier, that
942  * : | | message is stored in this Message Object.
943  * ALT_CAN_MSGIF_IFARB_DIR_E_TX | 0x1 | On TxRqst, the respective Message Object is
944  * : | | transmitted as a Data Frame. On reception of a
945  * : | | Remote Frame with matching identifier, the
946  * : | | TxRqst bit of this Message Object is set (if
947  * : | | RmtEn = one).
948  *
949  * Field Access Macros:
950  *
951  */
952 /*
953  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_DIR
954  *
955  * On TxRqst, a Remote Frame with the identifier of this Message Object is
956  * transmitted. On reception of a Data Frame with matching identifier, that message
957  * is stored in this Message Object.
958  */
959 #define ALT_CAN_MSGIF_IFARB_DIR_E_RX 0x0
960 /*
961  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_DIR
962  *
963  * On TxRqst, the respective Message Object is transmitted as a Data Frame. On
964  * reception of a Remote Frame with matching identifier, the TxRqst bit of this
965  * Message Object is set (if RmtEn = one).
966  */
967 #define ALT_CAN_MSGIF_IFARB_DIR_E_TX 0x1
968 
969 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFARB_DIR register field. */
970 #define ALT_CAN_MSGIF_IFARB_DIR_LSB 29
971 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFARB_DIR register field. */
972 #define ALT_CAN_MSGIF_IFARB_DIR_MSB 29
973 /* The width in bits of the ALT_CAN_MSGIF_IFARB_DIR register field. */
974 #define ALT_CAN_MSGIF_IFARB_DIR_WIDTH 1
975 /* The mask used to set the ALT_CAN_MSGIF_IFARB_DIR register field value. */
976 #define ALT_CAN_MSGIF_IFARB_DIR_SET_MSK 0x20000000
977 /* The mask used to clear the ALT_CAN_MSGIF_IFARB_DIR register field value. */
978 #define ALT_CAN_MSGIF_IFARB_DIR_CLR_MSK 0xdfffffff
979 /* The reset value of the ALT_CAN_MSGIF_IFARB_DIR register field. */
980 #define ALT_CAN_MSGIF_IFARB_DIR_RESET 0x0
981 /* Extracts the ALT_CAN_MSGIF_IFARB_DIR field value from a register. */
982 #define ALT_CAN_MSGIF_IFARB_DIR_GET(value) (((value) & 0x20000000) >> 29)
983 /* Produces a ALT_CAN_MSGIF_IFARB_DIR register field value suitable for setting the register. */
984 #define ALT_CAN_MSGIF_IFARB_DIR_SET(value) (((value) << 29) & 0x20000000)
985 
986 /*
987  * Field : Extended Identifier - Xtd
988  *
989  * Extended Identifier
990  *
991  * Field Enumeration Values:
992  *
993  * Enum | Value | Description
994  * :------------------------------------|:------|:----------------------------------------------
995  * ALT_CAN_MSGIF_IFARB_XTD_E_STANDARD | 0x0 | The 11-bit (standard) Identifier will be used
996  * : | | for this Message Object.
997  * ALT_CAN_MSGIF_IFARB_XTD_E_EXTENDED | 0x1 | The 29-bit (extended) Identifier will be used
998  * : | | for this Message Object.
999  *
1000  * Field Access Macros:
1001  *
1002  */
1003 /*
1004  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_XTD
1005  *
1006  * The 11-bit (standard) Identifier will be used for this Message Object.
1007  */
1008 #define ALT_CAN_MSGIF_IFARB_XTD_E_STANDARD 0x0
1009 /*
1010  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_XTD
1011  *
1012  * The 29-bit (extended) Identifier will be used for this Message Object.
1013  */
1014 #define ALT_CAN_MSGIF_IFARB_XTD_E_EXTENDED 0x1
1015 
1016 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFARB_XTD register field. */
1017 #define ALT_CAN_MSGIF_IFARB_XTD_LSB 30
1018 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFARB_XTD register field. */
1019 #define ALT_CAN_MSGIF_IFARB_XTD_MSB 30
1020 /* The width in bits of the ALT_CAN_MSGIF_IFARB_XTD register field. */
1021 #define ALT_CAN_MSGIF_IFARB_XTD_WIDTH 1
1022 /* The mask used to set the ALT_CAN_MSGIF_IFARB_XTD register field value. */
1023 #define ALT_CAN_MSGIF_IFARB_XTD_SET_MSK 0x40000000
1024 /* The mask used to clear the ALT_CAN_MSGIF_IFARB_XTD register field value. */
1025 #define ALT_CAN_MSGIF_IFARB_XTD_CLR_MSK 0xbfffffff
1026 /* The reset value of the ALT_CAN_MSGIF_IFARB_XTD register field. */
1027 #define ALT_CAN_MSGIF_IFARB_XTD_RESET 0x0
1028 /* Extracts the ALT_CAN_MSGIF_IFARB_XTD field value from a register. */
1029 #define ALT_CAN_MSGIF_IFARB_XTD_GET(value) (((value) & 0x40000000) >> 30)
1030 /* Produces a ALT_CAN_MSGIF_IFARB_XTD register field value suitable for setting the register. */
1031 #define ALT_CAN_MSGIF_IFARB_XTD_SET(value) (((value) << 30) & 0x40000000)
1032 
1033 /*
1034  * Field : Message Valid - MsgVal
1035  *
1036  * The CPU must reset the MsgVal bit of all unused Messages Objects during the
1037  * initialization before it resets bit Init in the CAN Control Register. MsgVal
1038  * must also be reset if the Messages Object is no longer used in operation. For
1039  * reconfiguration of Message Objects during normal operation.
1040  *
1041  * Field Enumeration Values:
1042  *
1043  * Enum | Value | Description
1044  * :-----------------------------------------|:------|:-----------------------------------------------
1045  * ALT_CAN_MSGIF_IFARB_MSGVAL_E_IGNORED | 0x0 | The Message Object is ignored by the Message
1046  * : | | Handler.
1047  * ALT_CAN_MSGIF_IFARB_MSGVAL_E_CONSIDERED | 0x1 | The Message Object is configured and should be
1048  * : | | considered by the Message Handler.
1049  *
1050  * Field Access Macros:
1051  *
1052  */
1053 /*
1054  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_MSGVAL
1055  *
1056  * The Message Object is ignored by the Message Handler.
1057  */
1058 #define ALT_CAN_MSGIF_IFARB_MSGVAL_E_IGNORED 0x0
1059 /*
1060  * Enumerated value for register field ALT_CAN_MSGIF_IFARB_MSGVAL
1061  *
1062  * The Message Object is configured and should be considered by the Message
1063  * Handler.
1064  */
1065 #define ALT_CAN_MSGIF_IFARB_MSGVAL_E_CONSIDERED 0x1
1066 
1067 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFARB_MSGVAL register field. */
1068 #define ALT_CAN_MSGIF_IFARB_MSGVAL_LSB 31
1069 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFARB_MSGVAL register field. */
1070 #define ALT_CAN_MSGIF_IFARB_MSGVAL_MSB 31
1071 /* The width in bits of the ALT_CAN_MSGIF_IFARB_MSGVAL register field. */
1072 #define ALT_CAN_MSGIF_IFARB_MSGVAL_WIDTH 1
1073 /* The mask used to set the ALT_CAN_MSGIF_IFARB_MSGVAL register field value. */
1074 #define ALT_CAN_MSGIF_IFARB_MSGVAL_SET_MSK 0x80000000
1075 /* The mask used to clear the ALT_CAN_MSGIF_IFARB_MSGVAL register field value. */
1076 #define ALT_CAN_MSGIF_IFARB_MSGVAL_CLR_MSK 0x7fffffff
1077 /* The reset value of the ALT_CAN_MSGIF_IFARB_MSGVAL register field. */
1078 #define ALT_CAN_MSGIF_IFARB_MSGVAL_RESET 0x0
1079 /* Extracts the ALT_CAN_MSGIF_IFARB_MSGVAL field value from a register. */
1080 #define ALT_CAN_MSGIF_IFARB_MSGVAL_GET(value) (((value) & 0x80000000) >> 31)
1081 /* Produces a ALT_CAN_MSGIF_IFARB_MSGVAL register field value suitable for setting the register. */
1082 #define ALT_CAN_MSGIF_IFARB_MSGVAL_SET(value) (((value) << 31) & 0x80000000)
1083 
1084 #ifndef __ASSEMBLY__
1085 /*
1086  * WARNING: The C register and register group struct declarations are provided for
1087  * convenience and illustrative purposes. They should, however, be used with
1088  * caution as the C language standard provides no guarantees about the alignment or
1089  * atomicity of device memory accesses. The recommended practice for writing
1090  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1091  * alt_write_word() functions.
1092  *
1093  * The struct declaration for register ALT_CAN_MSGIF_IFARB.
1094  */
1095 struct ALT_CAN_MSGIF_IFARB_s
1096 {
1097  uint32_t ID : 29; /* Identifier Mask */
1098  uint32_t Dir : 1; /* Message Direction */
1099  uint32_t Xtd : 1; /* Extended Identifier */
1100  uint32_t MsgVal : 1; /* Message Valid */
1101 };
1102 
1103 /* The typedef declaration for register ALT_CAN_MSGIF_IFARB. */
1104 typedef volatile struct ALT_CAN_MSGIF_IFARB_s ALT_CAN_MSGIF_IFARB_t;
1105 #endif /* __ASSEMBLY__ */
1106 
1107 /* The byte offset of the ALT_CAN_MSGIF_IFARB register from the beginning of the component. */
1108 #define ALT_CAN_MSGIF_IFARB_OFST 0x8
1109 /* The address of the ALT_CAN_MSGIF_IFARB register. */
1110 #define ALT_CAN_MSGIF_IFARB_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFARB_OFST))
1111 
1112 /*
1113  * Register : IF Message Control Register - IFMCTR
1114  *
1115  * The Arbitration Registers ID28-0, Xtd, and Dir are used to define the identifier
1116  * and type of outgoing messages and are used (together with the mask registers
1117  * Msk28-0, MXtd, and MDir) for acceptance filtering of incoming messages. A
1118  * received message is stored into the valid Message Object with matching
1119  * identifier and Direction=receive (Data Frame) or Direction=transmit (Remote
1120  * Frame). Extended frames can be stored only in Message Objects with Xtd = one,
1121  * standard frames in Message Objects with Xtd = zero. If a received message (Data
1122  * Frame or Remote Frame) matches with more than one valid Message Object, it is
1123  * stored into that with the lowest message number.
1124  *
1125  * Register Layout
1126  *
1127  * Bits | Access | Reset | Description
1128  * :--------|:-------|:------|:--------------------------
1129  * [3:0] | RW | 0x0 | Data Length Code
1130  * [6:4] | ??? | 0x0 | *UNDEFINED*
1131  * [7] | RW | 0x0 | End Of Block
1132  * [8] | RW | 0x0 | Transmit Request
1133  * [9] | RW | 0x0 | Remote Enable
1134  * [10] | RW | 0x0 | Receive Interrupt Enable
1135  * [11] | RW | 0x0 | Transmit Interrupt Enable
1136  * [12] | RW | 0x0 | Use Acceptance Mask
1137  * [13] | RW | 0x0 | Interrupt Pending
1138  * [14] | RW | 0x0 | Message Lost
1139  * [15] | RW | 0x0 | New Data
1140  * [31:16] | ??? | 0x0 | *UNDEFINED*
1141  *
1142  */
1143 /*
1144  * Field : Data Length Code - DLC
1145  *
1146  * 0-8 Data Frame has 0-8 data bytes.
1147  *
1148  * 9-15 Data Frame has 8 data bytes.
1149  *
1150  * Note: The Data Length Code of a Message Object must be defined the same as in
1151  * all the corresponding objects with the same identifier at other nodes. When the
1152  * Message Handler stores a data frame, it will write the DLC to the value given by
1153  * the received message.
1154  *
1155  * Field Access Macros:
1156  *
1157  */
1158 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_DLC register field. */
1159 #define ALT_CAN_MSGIF_IFMCTR_DLC_LSB 0
1160 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_DLC register field. */
1161 #define ALT_CAN_MSGIF_IFMCTR_DLC_MSB 3
1162 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_DLC register field. */
1163 #define ALT_CAN_MSGIF_IFMCTR_DLC_WIDTH 4
1164 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_DLC register field value. */
1165 #define ALT_CAN_MSGIF_IFMCTR_DLC_SET_MSK 0x0000000f
1166 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_DLC register field value. */
1167 #define ALT_CAN_MSGIF_IFMCTR_DLC_CLR_MSK 0xfffffff0
1168 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_DLC register field. */
1169 #define ALT_CAN_MSGIF_IFMCTR_DLC_RESET 0x0
1170 /* Extracts the ALT_CAN_MSGIF_IFMCTR_DLC field value from a register. */
1171 #define ALT_CAN_MSGIF_IFMCTR_DLC_GET(value) (((value) & 0x0000000f) >> 0)
1172 /* Produces a ALT_CAN_MSGIF_IFMCTR_DLC register field value suitable for setting the register. */
1173 #define ALT_CAN_MSGIF_IFMCTR_DLC_SET(value) (((value) << 0) & 0x0000000f)
1174 
1175 /*
1176  * Field : End Of Block - EoB
1177  *
1178  * Note: This bit is used to concatenate two or more Message Objects (up to 128) to
1179  * build a FIFO Buffer. For single Message Objects (not belonging to a FIFO Buffer)
1180  * this bit must always be set to one.
1181  *
1182  * Field Enumeration Values:
1183  *
1184  * Enum | Value | Description
1185  * :-----------------------------------------|:------|:------------------------------------------------
1186  * ALT_CAN_MSGIF_IFMCTR_EOB_E_NOTLAST | 0x0 | Message Object belongs to a FIFO Buffer Block
1187  * : | | and is not the last Message Object of that FIFO
1188  * : | | Buffer Block.
1189  * ALT_CAN_MSGIF_IFMCTR_EOB_E_SINGLEORLAST | 0x1 | Single Message Object or last Message Object of
1190  * : | | a FIFO Buffer Block.
1191  *
1192  * Field Access Macros:
1193  *
1194  */
1195 /*
1196  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_EOB
1197  *
1198  * Message Object belongs to a FIFO Buffer Block and is not the last Message Object
1199  * of that FIFO Buffer Block.
1200  */
1201 #define ALT_CAN_MSGIF_IFMCTR_EOB_E_NOTLAST 0x0
1202 /*
1203  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_EOB
1204  *
1205  * Single Message Object or last Message Object of a FIFO Buffer Block.
1206  */
1207 #define ALT_CAN_MSGIF_IFMCTR_EOB_E_SINGLEORLAST 0x1
1208 
1209 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_EOB register field. */
1210 #define ALT_CAN_MSGIF_IFMCTR_EOB_LSB 7
1211 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_EOB register field. */
1212 #define ALT_CAN_MSGIF_IFMCTR_EOB_MSB 7
1213 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_EOB register field. */
1214 #define ALT_CAN_MSGIF_IFMCTR_EOB_WIDTH 1
1215 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_EOB register field value. */
1216 #define ALT_CAN_MSGIF_IFMCTR_EOB_SET_MSK 0x00000080
1217 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_EOB register field value. */
1218 #define ALT_CAN_MSGIF_IFMCTR_EOB_CLR_MSK 0xffffff7f
1219 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_EOB register field. */
1220 #define ALT_CAN_MSGIF_IFMCTR_EOB_RESET 0x0
1221 /* Extracts the ALT_CAN_MSGIF_IFMCTR_EOB field value from a register. */
1222 #define ALT_CAN_MSGIF_IFMCTR_EOB_GET(value) (((value) & 0x00000080) >> 7)
1223 /* Produces a ALT_CAN_MSGIF_IFMCTR_EOB register field value suitable for setting the register. */
1224 #define ALT_CAN_MSGIF_IFMCTR_EOB_SET(value) (((value) << 7) & 0x00000080)
1225 
1226 /*
1227  * Field : Transmit Request - TxRqst
1228  *
1229  * Transmit Request
1230  *
1231  * Field Enumeration Values:
1232  *
1233  * Enum | Value | Description
1234  * :------------------------------------------|:------|:-------------------------------------------
1235  * ALT_CAN_MSGIF_IFMCTR_TXRQST_E_NOTWAITING | 0x0 | This Message Object is not waiting for
1236  * : | | transmission.
1237  * ALT_CAN_MSGIF_IFMCTR_TXRQST_E_PENDING | 0x1 | The transmission of this Message Object is
1238  * : | | requested and is not yet done.
1239  *
1240  * Field Access Macros:
1241  *
1242  */
1243 /*
1244  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_TXRQST
1245  *
1246  * This Message Object is not waiting for transmission.
1247  */
1248 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_E_NOTWAITING 0x0
1249 /*
1250  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_TXRQST
1251  *
1252  * The transmission of this Message Object is requested and is not yet done.
1253  */
1254 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_E_PENDING 0x1
1255 
1256 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_TXRQST register field. */
1257 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_LSB 8
1258 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_TXRQST register field. */
1259 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_MSB 8
1260 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_TXRQST register field. */
1261 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_WIDTH 1
1262 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_TXRQST register field value. */
1263 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_SET_MSK 0x00000100
1264 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_TXRQST register field value. */
1265 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_CLR_MSK 0xfffffeff
1266 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_TXRQST register field. */
1267 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_RESET 0x0
1268 /* Extracts the ALT_CAN_MSGIF_IFMCTR_TXRQST field value from a register. */
1269 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_GET(value) (((value) & 0x00000100) >> 8)
1270 /* Produces a ALT_CAN_MSGIF_IFMCTR_TXRQST register field value suitable for setting the register. */
1271 #define ALT_CAN_MSGIF_IFMCTR_TXRQST_SET(value) (((value) << 8) & 0x00000100)
1272 
1273 /*
1274  * Field : Remote Enable - RmtEn
1275  *
1276  * Remote Enable
1277  *
1278  * Field Enumeration Values:
1279  *
1280  * Enum | Value | Description
1281  * :----------------------------------------|:------|:----------------------------------------------
1282  * ALT_CAN_MSGIF_IFMCTR_RMTEN_E_UNCHANGED | 0x0 | At the reception of a Remote Frame, TxRqst is
1283  * : | | left unchanged.
1284  * ALT_CAN_MSGIF_IFMCTR_RMTEN_E_SET | 0x1 | At the reception of a Remote Frame, TxRqst is
1285  * : | | set.
1286  *
1287  * Field Access Macros:
1288  *
1289  */
1290 /*
1291  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_RMTEN
1292  *
1293  * At the reception of a Remote Frame, TxRqst is left unchanged.
1294  */
1295 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_E_UNCHANGED 0x0
1296 /*
1297  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_RMTEN
1298  *
1299  * At the reception of a Remote Frame, TxRqst is set.
1300  */
1301 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_E_SET 0x1
1302 
1303 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_RMTEN register field. */
1304 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_LSB 9
1305 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_RMTEN register field. */
1306 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_MSB 9
1307 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_RMTEN register field. */
1308 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_WIDTH 1
1309 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_RMTEN register field value. */
1310 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_SET_MSK 0x00000200
1311 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_RMTEN register field value. */
1312 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_CLR_MSK 0xfffffdff
1313 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_RMTEN register field. */
1314 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_RESET 0x0
1315 /* Extracts the ALT_CAN_MSGIF_IFMCTR_RMTEN field value from a register. */
1316 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_GET(value) (((value) & 0x00000200) >> 9)
1317 /* Produces a ALT_CAN_MSGIF_IFMCTR_RMTEN register field value suitable for setting the register. */
1318 #define ALT_CAN_MSGIF_IFMCTR_RMTEN_SET(value) (((value) << 9) & 0x00000200)
1319 
1320 /*
1321  * Field : Receive Interrupt Enable - RxIE
1322  *
1323  * Receive Interrupt Enable
1324  *
1325  * Field Enumeration Values:
1326  *
1327  * Enum | Value | Description
1328  * :---------------------------------------|:------|:------------------------------------------------
1329  * ALT_CAN_MSGIF_IFMCTR_RXIE_E_UNCHANGED | 0x0 | IntPnd will be left unchanged after the
1330  * : | | successful reception of a frame.
1331  * ALT_CAN_MSGIF_IFMCTR_RXIE_E_SET | 0x1 | IntPnd will be set after a successful reception
1332  * : | | of a frame.
1333  *
1334  * Field Access Macros:
1335  *
1336  */
1337 /*
1338  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_RXIE
1339  *
1340  * IntPnd will be left unchanged after the successful reception of a frame.
1341  */
1342 #define ALT_CAN_MSGIF_IFMCTR_RXIE_E_UNCHANGED 0x0
1343 /*
1344  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_RXIE
1345  *
1346  * IntPnd will be set after a successful reception of a frame.
1347  */
1348 #define ALT_CAN_MSGIF_IFMCTR_RXIE_E_SET 0x1
1349 
1350 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_RXIE register field. */
1351 #define ALT_CAN_MSGIF_IFMCTR_RXIE_LSB 10
1352 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_RXIE register field. */
1353 #define ALT_CAN_MSGIF_IFMCTR_RXIE_MSB 10
1354 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_RXIE register field. */
1355 #define ALT_CAN_MSGIF_IFMCTR_RXIE_WIDTH 1
1356 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_RXIE register field value. */
1357 #define ALT_CAN_MSGIF_IFMCTR_RXIE_SET_MSK 0x00000400
1358 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_RXIE register field value. */
1359 #define ALT_CAN_MSGIF_IFMCTR_RXIE_CLR_MSK 0xfffffbff
1360 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_RXIE register field. */
1361 #define ALT_CAN_MSGIF_IFMCTR_RXIE_RESET 0x0
1362 /* Extracts the ALT_CAN_MSGIF_IFMCTR_RXIE field value from a register. */
1363 #define ALT_CAN_MSGIF_IFMCTR_RXIE_GET(value) (((value) & 0x00000400) >> 10)
1364 /* Produces a ALT_CAN_MSGIF_IFMCTR_RXIE register field value suitable for setting the register. */
1365 #define ALT_CAN_MSGIF_IFMCTR_RXIE_SET(value) (((value) << 10) & 0x00000400)
1366 
1367 /*
1368  * Field : Transmit Interrupt Enable - TxIE
1369  *
1370  * Transmit Interrupt Enable
1371  *
1372  * Field Enumeration Values:
1373  *
1374  * Enum | Value | Description
1375  * :---------------------------------------|:------|:----------------------------------------
1376  * ALT_CAN_MSGIF_IFMCTR_TXIE_E_UNCHANGED | 0x0 | IntPnd will be left unchanged after the
1377  * : | | successful transmission of a frame.
1378  * ALT_CAN_MSGIF_IFMCTR_TXIE_E_SET | 0x1 | IntPnd will be set after a successful
1379  * : | | transmission of a frame.
1380  *
1381  * Field Access Macros:
1382  *
1383  */
1384 /*
1385  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_TXIE
1386  *
1387  * IntPnd will be left unchanged after the successful transmission of a frame.
1388  */
1389 #define ALT_CAN_MSGIF_IFMCTR_TXIE_E_UNCHANGED 0x0
1390 /*
1391  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_TXIE
1392  *
1393  * IntPnd will be set after a successful transmission of a frame.
1394  */
1395 #define ALT_CAN_MSGIF_IFMCTR_TXIE_E_SET 0x1
1396 
1397 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_TXIE register field. */
1398 #define ALT_CAN_MSGIF_IFMCTR_TXIE_LSB 11
1399 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_TXIE register field. */
1400 #define ALT_CAN_MSGIF_IFMCTR_TXIE_MSB 11
1401 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_TXIE register field. */
1402 #define ALT_CAN_MSGIF_IFMCTR_TXIE_WIDTH 1
1403 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_TXIE register field value. */
1404 #define ALT_CAN_MSGIF_IFMCTR_TXIE_SET_MSK 0x00000800
1405 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_TXIE register field value. */
1406 #define ALT_CAN_MSGIF_IFMCTR_TXIE_CLR_MSK 0xfffff7ff
1407 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_TXIE register field. */
1408 #define ALT_CAN_MSGIF_IFMCTR_TXIE_RESET 0x0
1409 /* Extracts the ALT_CAN_MSGIF_IFMCTR_TXIE field value from a register. */
1410 #define ALT_CAN_MSGIF_IFMCTR_TXIE_GET(value) (((value) & 0x00000800) >> 11)
1411 /* Produces a ALT_CAN_MSGIF_IFMCTR_TXIE register field value suitable for setting the register. */
1412 #define ALT_CAN_MSGIF_IFMCTR_TXIE_SET(value) (((value) << 11) & 0x00000800)
1413 
1414 /*
1415  * Field : Use Acceptance Mask - UMask
1416  *
1417  * Use Acceptance Mask
1418  *
1419  * Field Enumeration Values:
1420  *
1421  * Enum | Value | Description
1422  * :------------------------------------|:------|:-------------------------------------------------
1423  * ALT_CAN_MSGIF_IFMCTR_UMSK_E_IGNORE | 0x0 | Acceptance formula1: (RTRRx == ~DIR) && (IDERx
1424  * : | | == IDE) && (IDRx == ID)
1425  * ALT_CAN_MSGIF_IFMCTR_UMSK_E_USE | 0x1 | (Msk28-0, MXtd, and MDir) for acceptance
1426  * : | | filtering, formula: ((RTRRx & MDIR) == (~DIR &
1427  * : | | MDIR)) && ((IDERx & MXtd) == (IDE & MXtd)) &&
1428  * : | | ((IDRx & Msk) == (ID & Msk)) Note: If the UMask
1429  * : | | bit is set to one, the Message Object's mask
1430  * : | | bits have to be programmed during initialization
1431  * : | | of the Message Object before MsgVal is set to
1432  * : | | one.
1433  *
1434  * Field Access Macros:
1435  *
1436  */
1437 /*
1438  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_UMSK
1439  *
1440  * Acceptance formula1:
1441  *
1442  * (RTRRx == ~DIR) && (IDERx == IDE) && (IDRx == ID)
1443  */
1444 #define ALT_CAN_MSGIF_IFMCTR_UMSK_E_IGNORE 0x0
1445 /*
1446  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_UMSK
1447  *
1448  * (Msk28-0, MXtd, and MDir) for acceptance filtering, formula:
1449  *
1450  * ((RTRRx & MDIR) == (~DIR & MDIR)) &&
1451  *
1452  * ((IDERx & MXtd) == (IDE & MXtd)) &&
1453  *
1454  * ((IDRx & Msk) == (ID & Msk))
1455  *
1456  * Note: If the UMask bit is set to one, the Message Object's mask bits have to be
1457  * programmed during initialization of the Message Object before MsgVal is set to
1458  * one.
1459  */
1460 #define ALT_CAN_MSGIF_IFMCTR_UMSK_E_USE 0x1
1461 
1462 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_UMSK register field. */
1463 #define ALT_CAN_MSGIF_IFMCTR_UMSK_LSB 12
1464 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_UMSK register field. */
1465 #define ALT_CAN_MSGIF_IFMCTR_UMSK_MSB 12
1466 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_UMSK register field. */
1467 #define ALT_CAN_MSGIF_IFMCTR_UMSK_WIDTH 1
1468 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_UMSK register field value. */
1469 #define ALT_CAN_MSGIF_IFMCTR_UMSK_SET_MSK 0x00001000
1470 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_UMSK register field value. */
1471 #define ALT_CAN_MSGIF_IFMCTR_UMSK_CLR_MSK 0xffffefff
1472 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_UMSK register field. */
1473 #define ALT_CAN_MSGIF_IFMCTR_UMSK_RESET 0x0
1474 /* Extracts the ALT_CAN_MSGIF_IFMCTR_UMSK field value from a register. */
1475 #define ALT_CAN_MSGIF_IFMCTR_UMSK_GET(value) (((value) & 0x00001000) >> 12)
1476 /* Produces a ALT_CAN_MSGIF_IFMCTR_UMSK register field value suitable for setting the register. */
1477 #define ALT_CAN_MSGIF_IFMCTR_UMSK_SET(value) (((value) << 12) & 0x00001000)
1478 
1479 /*
1480  * Field : Interrupt Pending - IntPnd
1481  *
1482  * Interrupt Pending
1483  *
1484  * Field Enumeration Values:
1485  *
1486  * Enum | Value | Description
1487  * :--------------------------------------|:------|:----------------------------------------------
1488  * ALT_CAN_MSGIF_IFMCTR_INTPND_E_NOTSRC | 0x0 | This message object is not the source of an
1489  * : | | interrupt.
1490  * ALT_CAN_MSGIF_IFMCTR_INTPND_E_SRC | 0x1 | This message object is the source of an
1491  * : | | interrupt. The Interrupt Identifier in the
1492  * : | | Interrupt Register will point to this message
1493  * : | | object if there is no other interrupt source
1494  * : | | with higher priority.
1495  *
1496  * Field Access Macros:
1497  *
1498  */
1499 /*
1500  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_INTPND
1501  *
1502  * This message object is not the source of an interrupt.
1503  */
1504 #define ALT_CAN_MSGIF_IFMCTR_INTPND_E_NOTSRC 0x0
1505 /*
1506  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_INTPND
1507  *
1508  * This message object is the source of an interrupt. The Interrupt Identifier in
1509  * the Interrupt Register will point to this message object if there is no other
1510  * interrupt source with higher priority.
1511  */
1512 #define ALT_CAN_MSGIF_IFMCTR_INTPND_E_SRC 0x1
1513 
1514 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_INTPND register field. */
1515 #define ALT_CAN_MSGIF_IFMCTR_INTPND_LSB 13
1516 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_INTPND register field. */
1517 #define ALT_CAN_MSGIF_IFMCTR_INTPND_MSB 13
1518 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_INTPND register field. */
1519 #define ALT_CAN_MSGIF_IFMCTR_INTPND_WIDTH 1
1520 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_INTPND register field value. */
1521 #define ALT_CAN_MSGIF_IFMCTR_INTPND_SET_MSK 0x00002000
1522 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_INTPND register field value. */
1523 #define ALT_CAN_MSGIF_IFMCTR_INTPND_CLR_MSK 0xffffdfff
1524 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_INTPND register field. */
1525 #define ALT_CAN_MSGIF_IFMCTR_INTPND_RESET 0x0
1526 /* Extracts the ALT_CAN_MSGIF_IFMCTR_INTPND field value from a register. */
1527 #define ALT_CAN_MSGIF_IFMCTR_INTPND_GET(value) (((value) & 0x00002000) >> 13)
1528 /* Produces a ALT_CAN_MSGIF_IFMCTR_INTPND register field value suitable for setting the register. */
1529 #define ALT_CAN_MSGIF_IFMCTR_INTPND_SET(value) (((value) << 13) & 0x00002000)
1530 
1531 /*
1532  * Field : Message Lost - MsgLst
1533  *
1534  * Message Lost
1535  *
1536  * Field Enumeration Values:
1537  *
1538  * Enum | Value | Description
1539  * :---------------------------------------|:------|:-----------------------------------------------
1540  * ALT_CAN_MSGIF_IFMCTR_MSGLST_E_NOTLOST | 0x0 | No message lost since last time this bit was
1541  * : | | reset by the CPU.
1542  * ALT_CAN_MSGIF_IFMCTR_MSGLST_E_LOST | 0x1 | The Message Handler stored a new message into
1543  * : | | this object when NewDat was still set, the CPU
1544  * : | | has lost a message.
1545  *
1546  * Field Access Macros:
1547  *
1548  */
1549 /*
1550  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_MSGLST
1551  *
1552  * No message lost since last time this bit was reset by the CPU.
1553  */
1554 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_E_NOTLOST 0x0
1555 /*
1556  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_MSGLST
1557  *
1558  * The Message Handler stored a new message into this object when NewDat was still
1559  * set, the CPU has lost a message.
1560  */
1561 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_E_LOST 0x1
1562 
1563 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_MSGLST register field. */
1564 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_LSB 14
1565 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_MSGLST register field. */
1566 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_MSB 14
1567 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_MSGLST register field. */
1568 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_WIDTH 1
1569 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_MSGLST register field value. */
1570 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_SET_MSK 0x00004000
1571 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_MSGLST register field value. */
1572 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_CLR_MSK 0xffffbfff
1573 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_MSGLST register field. */
1574 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_RESET 0x0
1575 /* Extracts the ALT_CAN_MSGIF_IFMCTR_MSGLST field value from a register. */
1576 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_GET(value) (((value) & 0x00004000) >> 14)
1577 /* Produces a ALT_CAN_MSGIF_IFMCTR_MSGLST register field value suitable for setting the register. */
1578 #define ALT_CAN_MSGIF_IFMCTR_MSGLST_SET(value) (((value) << 14) & 0x00004000)
1579 
1580 /*
1581  * Field : New Data - NewDat
1582  *
1583  * New Data
1584  *
1585  * Field Enumeration Values:
1586  *
1587  * Enum | Value | Description
1588  * :------------------------------------------|:------|:-------------------------------------------------
1589  * ALT_CAN_MSGIF_IFMCTR_NEWDAT_E_NOTWRITTEN | 0x0 | No new data has been written into the data
1590  * : | | portion of this Message Object by the Message
1591  * : | | Handler since last time this flag was cleared by
1592  * : | | the CPU.
1593  * ALT_CAN_MSGIF_IFMCTR_NEWDAT_E_WRITTEN | 0x1 | The Message Handler or the CPU has written new
1594  * : | | data into the data portion of this Message
1595  * : | | Object.
1596  *
1597  * Field Access Macros:
1598  *
1599  */
1600 /*
1601  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_NEWDAT
1602  *
1603  * No new data has been written into the data portion of this Message Object by the
1604  * Message Handler since last time this flag was cleared by the CPU.
1605  */
1606 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_E_NOTWRITTEN 0x0
1607 /*
1608  * Enumerated value for register field ALT_CAN_MSGIF_IFMCTR_NEWDAT
1609  *
1610  * The Message Handler or the CPU has written new data into the data portion of
1611  * this Message Object.
1612  */
1613 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_E_WRITTEN 0x1
1614 
1615 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field. */
1616 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_LSB 15
1617 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field. */
1618 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_MSB 15
1619 /* The width in bits of the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field. */
1620 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_WIDTH 1
1621 /* The mask used to set the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field value. */
1622 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_SET_MSK 0x00008000
1623 /* The mask used to clear the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field value. */
1624 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_CLR_MSK 0xffff7fff
1625 /* The reset value of the ALT_CAN_MSGIF_IFMCTR_NEWDAT register field. */
1626 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_RESET 0x0
1627 /* Extracts the ALT_CAN_MSGIF_IFMCTR_NEWDAT field value from a register. */
1628 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_GET(value) (((value) & 0x00008000) >> 15)
1629 /* Produces a ALT_CAN_MSGIF_IFMCTR_NEWDAT register field value suitable for setting the register. */
1630 #define ALT_CAN_MSGIF_IFMCTR_NEWDAT_SET(value) (((value) << 15) & 0x00008000)
1631 
1632 #ifndef __ASSEMBLY__
1633 /*
1634  * WARNING: The C register and register group struct declarations are provided for
1635  * convenience and illustrative purposes. They should, however, be used with
1636  * caution as the C language standard provides no guarantees about the alignment or
1637  * atomicity of device memory accesses. The recommended practice for writing
1638  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1639  * alt_write_word() functions.
1640  *
1641  * The struct declaration for register ALT_CAN_MSGIF_IFMCTR.
1642  */
1643 struct ALT_CAN_MSGIF_IFMCTR_s
1644 {
1645  uint32_t DLC : 4; /* Data Length Code */
1646  uint32_t : 3; /* *UNDEFINED* */
1647  uint32_t EoB : 1; /* End Of Block */
1648  uint32_t TxRqst : 1; /* Transmit Request */
1649  uint32_t RmtEn : 1; /* Remote Enable */
1650  uint32_t RxIE : 1; /* Receive Interrupt Enable */
1651  uint32_t TxIE : 1; /* Transmit Interrupt Enable */
1652  uint32_t UMask : 1; /* Use Acceptance Mask */
1653  uint32_t IntPnd : 1; /* Interrupt Pending */
1654  uint32_t MsgLst : 1; /* Message Lost */
1655  uint32_t NewDat : 1; /* New Data */
1656  uint32_t : 16; /* *UNDEFINED* */
1657 };
1658 
1659 /* The typedef declaration for register ALT_CAN_MSGIF_IFMCTR. */
1660 typedef volatile struct ALT_CAN_MSGIF_IFMCTR_s ALT_CAN_MSGIF_IFMCTR_t;
1661 #endif /* __ASSEMBLY__ */
1662 
1663 /* The byte offset of the ALT_CAN_MSGIF_IFMCTR register from the beginning of the component. */
1664 #define ALT_CAN_MSGIF_IFMCTR_OFST 0xc
1665 /* The address of the ALT_CAN_MSGIF_IFMCTR register. */
1666 #define ALT_CAN_MSGIF_IFMCTR_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFMCTR_OFST))
1667 
1668 /*
1669  * Register : IF Data A Register - IFDA
1670  *
1671  * The data bytes of CAN messages are stored in the IF/2 registers in the
1672  * following order. In a CAN Data Frame, Data(0) is the first, Data(7) is the last
1673  * byte to be transmitted or received. In CAN's serial bit stream, the MSB of each
1674  * byte will be transmitted first.
1675  *
1676  * Register Layout
1677  *
1678  * Bits | Access | Reset | Description
1679  * :--------|:-------|:------|:------------
1680  * [7:0] | RW | 0x0 | Data 0
1681  * [15:8] | RW | 0x0 | Data 1
1682  * [23:16] | RW | 0x0 | Data 2
1683  * [31:24] | RW | 0x0 | Data 3
1684  *
1685  */
1686 /*
1687  * Field : Data 0 - Data0
1688  *
1689  * 1st data byte of a CAN Data Frame
1690  *
1691  * Field Access Macros:
1692  *
1693  */
1694 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDA_DATA0 register field. */
1695 #define ALT_CAN_MSGIF_IFDA_DATA0_LSB 0
1696 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDA_DATA0 register field. */
1697 #define ALT_CAN_MSGIF_IFDA_DATA0_MSB 7
1698 /* The width in bits of the ALT_CAN_MSGIF_IFDA_DATA0 register field. */
1699 #define ALT_CAN_MSGIF_IFDA_DATA0_WIDTH 8
1700 /* The mask used to set the ALT_CAN_MSGIF_IFDA_DATA0 register field value. */
1701 #define ALT_CAN_MSGIF_IFDA_DATA0_SET_MSK 0x000000ff
1702 /* The mask used to clear the ALT_CAN_MSGIF_IFDA_DATA0 register field value. */
1703 #define ALT_CAN_MSGIF_IFDA_DATA0_CLR_MSK 0xffffff00
1704 /* The reset value of the ALT_CAN_MSGIF_IFDA_DATA0 register field. */
1705 #define ALT_CAN_MSGIF_IFDA_DATA0_RESET 0x0
1706 /* Extracts the ALT_CAN_MSGIF_IFDA_DATA0 field value from a register. */
1707 #define ALT_CAN_MSGIF_IFDA_DATA0_GET(value) (((value) & 0x000000ff) >> 0)
1708 /* Produces a ALT_CAN_MSGIF_IFDA_DATA0 register field value suitable for setting the register. */
1709 #define ALT_CAN_MSGIF_IFDA_DATA0_SET(value) (((value) << 0) & 0x000000ff)
1710 
1711 /*
1712  * Field : Data 1 - Data1
1713  *
1714  * 2nd data byte of a CAN Data Frame
1715  *
1716  * Field Access Macros:
1717  *
1718  */
1719 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDA_DATA1 register field. */
1720 #define ALT_CAN_MSGIF_IFDA_DATA1_LSB 8
1721 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDA_DATA1 register field. */
1722 #define ALT_CAN_MSGIF_IFDA_DATA1_MSB 15
1723 /* The width in bits of the ALT_CAN_MSGIF_IFDA_DATA1 register field. */
1724 #define ALT_CAN_MSGIF_IFDA_DATA1_WIDTH 8
1725 /* The mask used to set the ALT_CAN_MSGIF_IFDA_DATA1 register field value. */
1726 #define ALT_CAN_MSGIF_IFDA_DATA1_SET_MSK 0x0000ff00
1727 /* The mask used to clear the ALT_CAN_MSGIF_IFDA_DATA1 register field value. */
1728 #define ALT_CAN_MSGIF_IFDA_DATA1_CLR_MSK 0xffff00ff
1729 /* The reset value of the ALT_CAN_MSGIF_IFDA_DATA1 register field. */
1730 #define ALT_CAN_MSGIF_IFDA_DATA1_RESET 0x0
1731 /* Extracts the ALT_CAN_MSGIF_IFDA_DATA1 field value from a register. */
1732 #define ALT_CAN_MSGIF_IFDA_DATA1_GET(value) (((value) & 0x0000ff00) >> 8)
1733 /* Produces a ALT_CAN_MSGIF_IFDA_DATA1 register field value suitable for setting the register. */
1734 #define ALT_CAN_MSGIF_IFDA_DATA1_SET(value) (((value) << 8) & 0x0000ff00)
1735 
1736 /*
1737  * Field : Data 2 - Data2
1738  *
1739  * 3rd data byte of a CAN Data Frame
1740  *
1741  * Field Access Macros:
1742  *
1743  */
1744 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDA_DATA2 register field. */
1745 #define ALT_CAN_MSGIF_IFDA_DATA2_LSB 16
1746 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDA_DATA2 register field. */
1747 #define ALT_CAN_MSGIF_IFDA_DATA2_MSB 23
1748 /* The width in bits of the ALT_CAN_MSGIF_IFDA_DATA2 register field. */
1749 #define ALT_CAN_MSGIF_IFDA_DATA2_WIDTH 8
1750 /* The mask used to set the ALT_CAN_MSGIF_IFDA_DATA2 register field value. */
1751 #define ALT_CAN_MSGIF_IFDA_DATA2_SET_MSK 0x00ff0000
1752 /* The mask used to clear the ALT_CAN_MSGIF_IFDA_DATA2 register field value. */
1753 #define ALT_CAN_MSGIF_IFDA_DATA2_CLR_MSK 0xff00ffff
1754 /* The reset value of the ALT_CAN_MSGIF_IFDA_DATA2 register field. */
1755 #define ALT_CAN_MSGIF_IFDA_DATA2_RESET 0x0
1756 /* Extracts the ALT_CAN_MSGIF_IFDA_DATA2 field value from a register. */
1757 #define ALT_CAN_MSGIF_IFDA_DATA2_GET(value) (((value) & 0x00ff0000) >> 16)
1758 /* Produces a ALT_CAN_MSGIF_IFDA_DATA2 register field value suitable for setting the register. */
1759 #define ALT_CAN_MSGIF_IFDA_DATA2_SET(value) (((value) << 16) & 0x00ff0000)
1760 
1761 /*
1762  * Field : Data 3 - Data3
1763  *
1764  * 4th data byte of a CAN Data Frame
1765  *
1766  * Field Access Macros:
1767  *
1768  */
1769 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDA_DATA3 register field. */
1770 #define ALT_CAN_MSGIF_IFDA_DATA3_LSB 24
1771 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDA_DATA3 register field. */
1772 #define ALT_CAN_MSGIF_IFDA_DATA3_MSB 31
1773 /* The width in bits of the ALT_CAN_MSGIF_IFDA_DATA3 register field. */
1774 #define ALT_CAN_MSGIF_IFDA_DATA3_WIDTH 8
1775 /* The mask used to set the ALT_CAN_MSGIF_IFDA_DATA3 register field value. */
1776 #define ALT_CAN_MSGIF_IFDA_DATA3_SET_MSK 0xff000000
1777 /* The mask used to clear the ALT_CAN_MSGIF_IFDA_DATA3 register field value. */
1778 #define ALT_CAN_MSGIF_IFDA_DATA3_CLR_MSK 0x00ffffff
1779 /* The reset value of the ALT_CAN_MSGIF_IFDA_DATA3 register field. */
1780 #define ALT_CAN_MSGIF_IFDA_DATA3_RESET 0x0
1781 /* Extracts the ALT_CAN_MSGIF_IFDA_DATA3 field value from a register. */
1782 #define ALT_CAN_MSGIF_IFDA_DATA3_GET(value) (((value) & 0xff000000) >> 24)
1783 /* Produces a ALT_CAN_MSGIF_IFDA_DATA3 register field value suitable for setting the register. */
1784 #define ALT_CAN_MSGIF_IFDA_DATA3_SET(value) (((value) << 24) & 0xff000000)
1785 
1786 #ifndef __ASSEMBLY__
1787 /*
1788  * WARNING: The C register and register group struct declarations are provided for
1789  * convenience and illustrative purposes. They should, however, be used with
1790  * caution as the C language standard provides no guarantees about the alignment or
1791  * atomicity of device memory accesses. The recommended practice for writing
1792  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1793  * alt_write_word() functions.
1794  *
1795  * The struct declaration for register ALT_CAN_MSGIF_IFDA.
1796  */
1797 struct ALT_CAN_MSGIF_IFDA_s
1798 {
1799  uint32_t Data0 : 8; /* Data 0 */
1800  uint32_t Data1 : 8; /* Data 1 */
1801  uint32_t Data2 : 8; /* Data 2 */
1802  uint32_t Data3 : 8; /* Data 3 */
1803 };
1804 
1805 /* The typedef declaration for register ALT_CAN_MSGIF_IFDA. */
1806 typedef volatile struct ALT_CAN_MSGIF_IFDA_s ALT_CAN_MSGIF_IFDA_t;
1807 #endif /* __ASSEMBLY__ */
1808 
1809 /* The byte offset of the ALT_CAN_MSGIF_IFDA register from the beginning of the component. */
1810 #define ALT_CAN_MSGIF_IFDA_OFST 0x10
1811 /* The address of the ALT_CAN_MSGIF_IFDA register. */
1812 #define ALT_CAN_MSGIF_IFDA_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFDA_OFST))
1813 
1814 /*
1815  * Register : IF Data B Register - IFDB
1816  *
1817  * The data bytes of CAN messages are stored in the IF/2 registers in the
1818  * following order. In a CAN Data Frame, Data(0) is the first, Data(7) is the last
1819  * byte to be transmitted or received. In CAN's serial bit stream, the MSB of each
1820  * byte will be transmitted first.
1821  *
1822  * Register Layout
1823  *
1824  * Bits | Access | Reset | Description
1825  * :--------|:-------|:------|:------------
1826  * [7:0] | RW | 0x0 | Data 0
1827  * [15:8] | RW | 0x0 | Data 1
1828  * [23:16] | RW | 0x0 | Data 2
1829  * [31:24] | RW | 0x0 | Data 3
1830  *
1831  */
1832 /*
1833  * Field : Data 0 - Data4
1834  *
1835  * 5th data byte of a CAN Data Frame
1836  *
1837  * Field Access Macros:
1838  *
1839  */
1840 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDB_DATA4 register field. */
1841 #define ALT_CAN_MSGIF_IFDB_DATA4_LSB 0
1842 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDB_DATA4 register field. */
1843 #define ALT_CAN_MSGIF_IFDB_DATA4_MSB 7
1844 /* The width in bits of the ALT_CAN_MSGIF_IFDB_DATA4 register field. */
1845 #define ALT_CAN_MSGIF_IFDB_DATA4_WIDTH 8
1846 /* The mask used to set the ALT_CAN_MSGIF_IFDB_DATA4 register field value. */
1847 #define ALT_CAN_MSGIF_IFDB_DATA4_SET_MSK 0x000000ff
1848 /* The mask used to clear the ALT_CAN_MSGIF_IFDB_DATA4 register field value. */
1849 #define ALT_CAN_MSGIF_IFDB_DATA4_CLR_MSK 0xffffff00
1850 /* The reset value of the ALT_CAN_MSGIF_IFDB_DATA4 register field. */
1851 #define ALT_CAN_MSGIF_IFDB_DATA4_RESET 0x0
1852 /* Extracts the ALT_CAN_MSGIF_IFDB_DATA4 field value from a register. */
1853 #define ALT_CAN_MSGIF_IFDB_DATA4_GET(value) (((value) & 0x000000ff) >> 0)
1854 /* Produces a ALT_CAN_MSGIF_IFDB_DATA4 register field value suitable for setting the register. */
1855 #define ALT_CAN_MSGIF_IFDB_DATA4_SET(value) (((value) << 0) & 0x000000ff)
1856 
1857 /*
1858  * Field : Data 1 - Data5
1859  *
1860  * 6th data byte of a CAN Data Frame
1861  *
1862  * Field Access Macros:
1863  *
1864  */
1865 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDB_DATA5 register field. */
1866 #define ALT_CAN_MSGIF_IFDB_DATA5_LSB 8
1867 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDB_DATA5 register field. */
1868 #define ALT_CAN_MSGIF_IFDB_DATA5_MSB 15
1869 /* The width in bits of the ALT_CAN_MSGIF_IFDB_DATA5 register field. */
1870 #define ALT_CAN_MSGIF_IFDB_DATA5_WIDTH 8
1871 /* The mask used to set the ALT_CAN_MSGIF_IFDB_DATA5 register field value. */
1872 #define ALT_CAN_MSGIF_IFDB_DATA5_SET_MSK 0x0000ff00
1873 /* The mask used to clear the ALT_CAN_MSGIF_IFDB_DATA5 register field value. */
1874 #define ALT_CAN_MSGIF_IFDB_DATA5_CLR_MSK 0xffff00ff
1875 /* The reset value of the ALT_CAN_MSGIF_IFDB_DATA5 register field. */
1876 #define ALT_CAN_MSGIF_IFDB_DATA5_RESET 0x0
1877 /* Extracts the ALT_CAN_MSGIF_IFDB_DATA5 field value from a register. */
1878 #define ALT_CAN_MSGIF_IFDB_DATA5_GET(value) (((value) & 0x0000ff00) >> 8)
1879 /* Produces a ALT_CAN_MSGIF_IFDB_DATA5 register field value suitable for setting the register. */
1880 #define ALT_CAN_MSGIF_IFDB_DATA5_SET(value) (((value) << 8) & 0x0000ff00)
1881 
1882 /*
1883  * Field : Data 2 - Data6
1884  *
1885  * 7th data byte of a CAN Data Frame
1886  *
1887  * Field Access Macros:
1888  *
1889  */
1890 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDB_DATA6 register field. */
1891 #define ALT_CAN_MSGIF_IFDB_DATA6_LSB 16
1892 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDB_DATA6 register field. */
1893 #define ALT_CAN_MSGIF_IFDB_DATA6_MSB 23
1894 /* The width in bits of the ALT_CAN_MSGIF_IFDB_DATA6 register field. */
1895 #define ALT_CAN_MSGIF_IFDB_DATA6_WIDTH 8
1896 /* The mask used to set the ALT_CAN_MSGIF_IFDB_DATA6 register field value. */
1897 #define ALT_CAN_MSGIF_IFDB_DATA6_SET_MSK 0x00ff0000
1898 /* The mask used to clear the ALT_CAN_MSGIF_IFDB_DATA6 register field value. */
1899 #define ALT_CAN_MSGIF_IFDB_DATA6_CLR_MSK 0xff00ffff
1900 /* The reset value of the ALT_CAN_MSGIF_IFDB_DATA6 register field. */
1901 #define ALT_CAN_MSGIF_IFDB_DATA6_RESET 0x0
1902 /* Extracts the ALT_CAN_MSGIF_IFDB_DATA6 field value from a register. */
1903 #define ALT_CAN_MSGIF_IFDB_DATA6_GET(value) (((value) & 0x00ff0000) >> 16)
1904 /* Produces a ALT_CAN_MSGIF_IFDB_DATA6 register field value suitable for setting the register. */
1905 #define ALT_CAN_MSGIF_IFDB_DATA6_SET(value) (((value) << 16) & 0x00ff0000)
1906 
1907 /*
1908  * Field : Data 3 - Data7
1909  *
1910  * 8th data byte of a CAN Data Frame
1911  *
1912  * Field Access Macros:
1913  *
1914  */
1915 /* The Least Significant Bit (LSB) position of the ALT_CAN_MSGIF_IFDB_DATA7 register field. */
1916 #define ALT_CAN_MSGIF_IFDB_DATA7_LSB 24
1917 /* The Most Significant Bit (MSB) position of the ALT_CAN_MSGIF_IFDB_DATA7 register field. */
1918 #define ALT_CAN_MSGIF_IFDB_DATA7_MSB 31
1919 /* The width in bits of the ALT_CAN_MSGIF_IFDB_DATA7 register field. */
1920 #define ALT_CAN_MSGIF_IFDB_DATA7_WIDTH 8
1921 /* The mask used to set the ALT_CAN_MSGIF_IFDB_DATA7 register field value. */
1922 #define ALT_CAN_MSGIF_IFDB_DATA7_SET_MSK 0xff000000
1923 /* The mask used to clear the ALT_CAN_MSGIF_IFDB_DATA7 register field value. */
1924 #define ALT_CAN_MSGIF_IFDB_DATA7_CLR_MSK 0x00ffffff
1925 /* The reset value of the ALT_CAN_MSGIF_IFDB_DATA7 register field. */
1926 #define ALT_CAN_MSGIF_IFDB_DATA7_RESET 0x0
1927 /* Extracts the ALT_CAN_MSGIF_IFDB_DATA7 field value from a register. */
1928 #define ALT_CAN_MSGIF_IFDB_DATA7_GET(value) (((value) & 0xff000000) >> 24)
1929 /* Produces a ALT_CAN_MSGIF_IFDB_DATA7 register field value suitable for setting the register. */
1930 #define ALT_CAN_MSGIF_IFDB_DATA7_SET(value) (((value) << 24) & 0xff000000)
1931 
1932 #ifndef __ASSEMBLY__
1933 /*
1934  * WARNING: The C register and register group struct declarations are provided for
1935  * convenience and illustrative purposes. They should, however, be used with
1936  * caution as the C language standard provides no guarantees about the alignment or
1937  * atomicity of device memory accesses. The recommended practice for writing
1938  * hardware drivers is to use the SoCAL access macros and alt_read_word() and
1939  * alt_write_word() functions.
1940  *
1941  * The struct declaration for register ALT_CAN_MSGIF_IFDB.
1942  */
1943 struct ALT_CAN_MSGIF_IFDB_s
1944 {
1945  uint32_t Data4 : 8; /* Data 0 */
1946  uint32_t Data5 : 8; /* Data 1 */
1947  uint32_t Data6 : 8; /* Data 2 */
1948  uint32_t Data7 : 8; /* Data 3 */
1949 };
1950 
1951 /* The typedef declaration for register ALT_CAN_MSGIF_IFDB. */
1952 typedef volatile struct ALT_CAN_MSGIF_IFDB_s ALT_CAN_MSGIF_IFDB_t;
1953 #endif /* __ASSEMBLY__ */
1954 
1955 /* The byte offset of the ALT_CAN_MSGIF_IFDB register from the beginning of the component. */
1956 #define ALT_CAN_MSGIF_IFDB_OFST 0x14
1957 /* The address of the ALT_CAN_MSGIF_IFDB register. */
1958 #define ALT_CAN_MSGIF_IFDB_ADDR(base, if_base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + if_base + ALT_CAN_MSGIF_IFDB_OFST))
1959 
1960 
1961 #ifdef __cplusplus
1962 }
1963 #endif /* __cplusplus */
1964 #endif /* __ALTERA_ALT_CAN_PRIVATE_H__ */
1965 
1966 #endif /* defined soc_cv_av */