35 #ifndef __ALT_SOCAL_NOC_MPU_EMAC0_H__
36 #define __ALT_SOCAL_NOC_MPU_EMAC0_H__
72 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_LSB 0
74 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_MSB 7
76 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_WIDTH 8
78 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_SET_MSK 0x000000ff
80 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_CLR_MSK 0xffffff00
82 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_RESET 0x4
84 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0)
86 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff)
97 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_LSB 8
99 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_MSB 31
101 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_WIDTH 24
103 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_SET_MSK 0xffffff00
105 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_CLR_MSK 0x000000ff
107 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_RESET 0x7d4821
109 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
111 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
124 struct ALT_NOC_MPU_EMAC0_M_QOS_COREID_s
126 const uint32_t CORETYPEID : 8;
127 const uint32_t CORECHECKSUM : 24;
131 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_COREID_s ALT_NOC_MPU_EMAC0_M_QOS_COREID_t;
135 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_RESET 0x7d482104
137 #define ALT_NOC_MPU_EMAC0_M_QOS_COREID_OFST 0x0
159 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_UID_LSB 0
161 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_UID_MSB 7
163 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_UID_WIDTH 8
165 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_UID_SET_MSK 0x000000ff
167 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_UID_CLR_MSK 0xffffff00
169 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_UID_RESET 0x0
171 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_UID_GET(value) (((value) & 0x000000ff) >> 0)
173 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_UID_SET(value) (((value) << 0) & 0x000000ff)
185 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_FLEXNOCID_LSB 8
187 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_FLEXNOCID_MSB 31
189 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_FLEXNOCID_WIDTH 24
191 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_FLEXNOCID_SET_MSK 0xffffff00
193 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_FLEXNOCID_CLR_MSK 0x000000ff
195 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_FLEXNOCID_RESET 0x129ff
197 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
199 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
212 struct ALT_NOC_MPU_EMAC0_M_QOS_REVID_s
214 const uint32_t USERID : 8;
215 const uint32_t FLEXNOCID : 24;
219 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_REVID_s ALT_NOC_MPU_EMAC0_M_QOS_REVID_t;
223 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_RESET 0x0129ff00
225 #define ALT_NOC_MPU_EMAC0_M_QOS_REVID_OFST 0x4
255 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P0_LSB 0
257 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P0_MSB 1
259 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P0_WIDTH 2
261 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P0_SET_MSK 0x00000003
263 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P0_CLR_MSK 0xfffffffc
265 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P0_RESET 0x0
267 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P0_GET(value) (((value) & 0x00000003) >> 0)
269 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P0_SET(value) (((value) << 0) & 0x00000003)
283 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P1_LSB 8
285 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P1_MSB 9
287 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P1_WIDTH 2
289 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P1_SET_MSK 0x00000300
291 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P1_CLR_MSK 0xfffffcff
293 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P1_RESET 0x1
295 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P1_GET(value) (((value) & 0x00000300) >> 8)
297 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_P1_SET(value) (((value) << 8) & 0x00000300)
308 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_MARK_LSB 31
310 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_MARK_MSB 31
312 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_MARK_WIDTH 1
314 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_MARK_SET_MSK 0x80000000
316 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_MARK_CLR_MSK 0x7fffffff
318 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_MARK_RESET 0x1
320 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_MARK_GET(value) (((value) & 0x80000000) >> 31)
322 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_MARK_SET(value) (((value) << 31) & 0x80000000)
335 struct ALT_NOC_MPU_EMAC0_M_QOS_PRI_s
341 const uint32_t MARK : 1;
345 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_PRI_s ALT_NOC_MPU_EMAC0_M_QOS_PRI_t;
349 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_RESET 0x80000100
351 #define ALT_NOC_MPU_EMAC0_M_QOS_PRI_OFST 0x8
377 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_MOD_LSB 0
379 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_MOD_MSB 1
381 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_MOD_WIDTH 2
383 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_MOD_SET_MSK 0x00000003
385 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_MOD_CLR_MSK 0xfffffffc
387 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_MOD_RESET 0x3
389 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_MOD_GET(value) (((value) & 0x00000003) >> 0)
391 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_MOD_SET(value) (((value) << 0) & 0x00000003)
404 struct ALT_NOC_MPU_EMAC0_M_QOS_MOD_s
411 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_MOD_s ALT_NOC_MPU_EMAC0_M_QOS_MOD_t;
415 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_RESET 0x00000003
417 #define ALT_NOC_MPU_EMAC0_M_QOS_MOD_OFST 0xc
442 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_BANDWIDTH_LSB 0
444 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_BANDWIDTH_MSB 10
446 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_BANDWIDTH_WIDTH 11
448 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_BANDWIDTH_SET_MSK 0x000007ff
450 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_BANDWIDTH_CLR_MSK 0xfffff800
452 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_BANDWIDTH_RESET 0x100
454 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_BANDWIDTH_GET(value) (((value) & 0x000007ff) >> 0)
456 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_BANDWIDTH_SET(value) (((value) << 0) & 0x000007ff)
469 struct ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_s
471 uint32_t BANDWIDTH : 11;
476 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_s ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_t;
480 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_RESET 0x00000100
482 #define ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_OFST 0x10
508 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_SATURATION_LSB 0
510 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_SATURATION_MSB 9
512 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_SATURATION_WIDTH 10
514 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_SATURATION_SET_MSK 0x000003ff
516 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_SATURATION_CLR_MSK 0xfffffc00
518 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_SATURATION_RESET 0x4
520 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_SATURATION_GET(value) (((value) & 0x000003ff) >> 0)
522 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_SATURATION_SET(value) (((value) << 0) & 0x000003ff)
535 struct ALT_NOC_MPU_EMAC0_M_QOS_SAT_s
537 uint32_t SATURATION : 10;
542 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_SAT_s ALT_NOC_MPU_EMAC0_M_QOS_SAT_t;
546 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_RESET 0x00000004
548 #define ALT_NOC_MPU_EMAC0_M_QOS_SAT_OFST 0x14
574 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_SOCKETQOSEN_LSB 0
576 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_SOCKETQOSEN_MSB 0
578 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_SOCKETQOSEN_WIDTH 1
580 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_SOCKETQOSEN_SET_MSK 0x00000001
582 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_SOCKETQOSEN_CLR_MSK 0xfffffffe
584 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_SOCKETQOSEN_RESET 0x0
586 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_SOCKETQOSEN_GET(value) (((value) & 0x00000001) >> 0)
588 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_SOCKETQOSEN_SET(value) (((value) << 0) & 0x00000001)
599 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_EXTTHREN_LSB 1
601 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_EXTTHREN_MSB 1
603 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_EXTTHREN_WIDTH 1
605 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_EXTTHREN_SET_MSK 0x00000002
607 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_EXTTHREN_CLR_MSK 0xfffffffd
609 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_EXTTHREN_RESET 0x0
611 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_EXTTHREN_GET(value) (((value) & 0x00000002) >> 1)
613 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_EXTTHREN_SET(value) (((value) << 1) & 0x00000002)
624 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_INTCLKEN_LSB 2
626 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_INTCLKEN_MSB 2
628 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_INTCLKEN_WIDTH 1
630 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_INTCLKEN_SET_MSK 0x00000004
632 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_INTCLKEN_CLR_MSK 0xfffffffb
634 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_INTCLKEN_RESET 0x0
636 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_INTCLKEN_GET(value) (((value) & 0x00000004) >> 2)
638 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_INTCLKEN_SET(value) (((value) << 2) & 0x00000004)
651 struct ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_s
653 uint32_t SOCKETQOSEN : 1;
654 uint32_t EXTTHREN : 1;
655 uint32_t INTCLKEN : 1;
660 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_s ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_t;
664 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_RESET 0x00000000
666 #define ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_OFST 0x18
679 struct ALT_NOC_MPU_EMAC0_M_QOS_s
681 ALT_NOC_MPU_EMAC0_M_QOS_COREID_t emac0_m_I_main_QosGenerator_Id_CoreId;
682 ALT_NOC_MPU_EMAC0_M_QOS_REVID_t emac0_m_I_main_QosGenerator_Id_RevisionId;
683 ALT_NOC_MPU_EMAC0_M_QOS_PRI_t emac0_m_I_main_QosGenerator_Priority;
684 ALT_NOC_MPU_EMAC0_M_QOS_MOD_t emac0_m_I_main_QosGenerator_Mode;
685 ALT_NOC_MPU_EMAC0_M_QOS_BWDTH_t emac0_m_I_main_QosGenerator_Bandwidth;
686 ALT_NOC_MPU_EMAC0_M_QOS_SAT_t emac0_m_I_main_QosGenerator_Saturation;
687 ALT_NOC_MPU_EMAC0_M_QOS_EXTCTL_t emac0_m_I_main_QosGenerator_ExtControl;
688 volatile uint32_t _pad_0x1c_0x80[25];
692 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_s ALT_NOC_MPU_EMAC0_M_QOS_t;
694 struct ALT_NOC_MPU_EMAC0_M_QOS_raw_s
696 volatile uint32_t emac0_m_I_main_QosGenerator_Id_CoreId;
697 volatile uint32_t emac0_m_I_main_QosGenerator_Id_RevisionId;
698 volatile uint32_t emac0_m_I_main_QosGenerator_Priority;
699 volatile uint32_t emac0_m_I_main_QosGenerator_Mode;
700 volatile uint32_t emac0_m_I_main_QosGenerator_Bandwidth;
701 volatile uint32_t emac0_m_I_main_QosGenerator_Saturation;
702 volatile uint32_t emac0_m_I_main_QosGenerator_ExtControl;
703 uint32_t _pad_0x1c_0x80[25];
707 typedef volatile struct ALT_NOC_MPU_EMAC0_M_QOS_raw_s ALT_NOC_MPU_EMAC0_M_QOS_raw_t;
735 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_TYPEID_LSB 0
737 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_TYPEID_MSB 7
739 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_TYPEID_WIDTH 8
741 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_TYPEID_SET_MSK 0x000000ff
743 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_TYPEID_CLR_MSK 0xffffff00
745 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_TYPEID_RESET 0x9
747 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_TYPEID_GET(value) (((value) & 0x000000ff) >> 0)
749 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_TYPEID_SET(value) (((value) << 0) & 0x000000ff)
760 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_CHECKSUM_LSB 8
762 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_CHECKSUM_MSB 31
764 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_CHECKSUM_WIDTH 24
766 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_CHECKSUM_SET_MSK 0xffffff00
768 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_CHECKSUM_CLR_MSK 0x000000ff
770 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_CHECKSUM_RESET 0xc284d3
772 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_CHECKSUM_GET(value) (((value) & 0xffffff00) >> 8)
774 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_CHECKSUM_SET(value) (((value) << 8) & 0xffffff00)
787 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_s
789 const uint32_t CORETYPEID : 8;
790 const uint32_t CORECHECKSUM : 24;
794 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_t;
798 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_RESET 0xc284d309
800 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_OFST 0x0
822 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_UID_LSB 0
824 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_UID_MSB 7
826 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_UID_WIDTH 8
828 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_UID_SET_MSK 0x000000ff
830 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_UID_CLR_MSK 0xffffff00
832 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_UID_RESET 0x0
834 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_UID_GET(value) (((value) & 0x000000ff) >> 0)
836 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_UID_SET(value) (((value) << 0) & 0x000000ff)
848 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_FLEXNOCID_LSB 8
850 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_FLEXNOCID_MSB 31
852 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_FLEXNOCID_WIDTH 24
854 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_FLEXNOCID_SET_MSK 0xffffff00
856 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_FLEXNOCID_CLR_MSK 0x000000ff
858 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_FLEXNOCID_RESET 0x129ff
860 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_FLEXNOCID_GET(value) (((value) & 0xffffff00) >> 8)
862 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_FLEXNOCID_SET(value) (((value) << 8) & 0xffffff00)
875 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_s
877 const uint32_t USERID : 8;
878 const uint32_t FLEXNOCID : 24;
882 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_t;
886 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_RESET 0x0129ff00
888 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_OFST 0x4
912 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_MOD_LSB 0
914 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_MOD_MSB 0
916 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_MOD_WIDTH 1
918 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_MOD_SET_MSK 0x00000001
920 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_MOD_CLR_MSK 0xfffffffe
922 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_MOD_RESET 0x0
924 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_MOD_GET(value) (((value) & 0x00000001) >> 0)
926 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_MOD_SET(value) (((value) << 0) & 0x00000001)
939 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_s
946 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_t;
950 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_RESET 0x00000000
952 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_OFST 0x8
974 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDRBASE_LOW_LSB 0
976 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDRBASE_LOW_MSB 31
978 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDRBASE_LOW_WIDTH 32
980 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDRBASE_LOW_SET_MSK 0xffffffff
982 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDRBASE_LOW_CLR_MSK 0x00000000
984 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDRBASE_LOW_RESET 0x0
986 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDRBASE_LOW_GET(value) (((value) & 0xffffffff) >> 0)
988 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_ADDRBASE_LOW_SET(value) (((value) << 0) & 0xffffffff)
1001 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_s
1003 uint32_t ADDRBASE_LOW : 32;
1007 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_t;
1011 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_RESET 0x00000000
1013 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_OFST 0xc
1036 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDRBASE_HIGH_LSB 0
1038 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDRBASE_HIGH_MSB 0
1040 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDRBASE_HIGH_WIDTH 1
1042 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDRBASE_HIGH_SET_MSK 0x00000001
1044 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDRBASE_HIGH_CLR_MSK 0xfffffffe
1046 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDRBASE_HIGH_RESET 0x0
1048 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDRBASE_HIGH_GET(value) (((value) & 0x00000001) >> 0)
1050 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_ADDRBASE_HIGH_SET(value) (((value) << 0) & 0x00000001)
1052 #ifndef __ASSEMBLY__
1063 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_s
1065 uint32_t ADDRBASE_HIGH : 1;
1070 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_t;
1074 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_RESET 0x00000000
1076 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_OFST 0x10
1101 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDRWINDOWSIZE_LSB 0
1103 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDRWINDOWSIZE_MSB 5
1105 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDRWINDOWSIZE_WIDTH 6
1107 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDRWINDOWSIZE_SET_MSK 0x0000003f
1109 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDRWINDOWSIZE_CLR_MSK 0xffffffc0
1111 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDRWINDOWSIZE_RESET 0x0
1113 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDRWINDOWSIZE_GET(value) (((value) & 0x0000003f) >> 0)
1115 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_ADDRWINDOWSIZE_SET(value) (((value) << 0) & 0x0000003f)
1117 #ifndef __ASSEMBLY__
1128 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_s
1130 uint32_t ADDRWINDOWSIZE : 6;
1135 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_t;
1139 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_RESET 0x00000000
1141 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_OFST 0x14
1167 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RDEN_LSB 0
1169 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RDEN_MSB 0
1171 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RDEN_WIDTH 1
1173 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RDEN_SET_MSK 0x00000001
1175 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RDEN_CLR_MSK 0xfffffffe
1177 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RDEN_RESET 0x0
1179 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RDEN_GET(value) (((value) & 0x00000001) >> 0)
1181 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RDEN_SET(value) (((value) << 0) & 0x00000001)
1192 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_WREN_LSB 1
1194 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_WREN_MSB 1
1196 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_WREN_WIDTH 1
1198 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_WREN_SET_MSK 0x00000002
1200 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_WREN_CLR_MSK 0xfffffffd
1202 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_WREN_RESET 0x0
1204 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_WREN_GET(value) (((value) & 0x00000002) >> 1)
1206 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_WREN_SET(value) (((value) << 1) & 0x00000002)
1208 #ifndef __ASSEMBLY__
1219 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_s
1227 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_t;
1231 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_RESET 0x00000000
1233 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_OFST 0x20
1256 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_USERBASE_LSB 0
1258 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_USERBASE_MSB 10
1260 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_USERBASE_WIDTH 11
1262 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_USERBASE_SET_MSK 0x000007ff
1264 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_USERBASE_CLR_MSK 0xfffff800
1266 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_USERBASE_RESET 0x0
1268 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_USERBASE_GET(value) (((value) & 0x000007ff) >> 0)
1270 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_USERBASE_SET(value) (((value) << 0) & 0x000007ff)
1272 #ifndef __ASSEMBLY__
1283 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_s
1285 uint32_t USERBASE : 11;
1290 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_t;
1294 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_RESET 0x00000000
1296 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_OFST 0x24
1319 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_USERMSK_LSB 0
1321 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_USERMSK_MSB 10
1323 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_USERMSK_WIDTH 11
1325 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_USERMSK_SET_MSK 0x000007ff
1327 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_USERMSK_CLR_MSK 0xfffff800
1329 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_USERMSK_RESET 0x0
1331 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_USERMSK_GET(value) (((value) & 0x000007ff) >> 0)
1333 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_USERMSK_SET(value) (((value) << 0) & 0x000007ff)
1335 #ifndef __ASSEMBLY__
1346 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_s
1348 uint32_t USERMASK : 11;
1353 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_t;
1357 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_RESET 0x00000000
1359 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_OFST 0x28
1382 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_SECURITYBASE_LSB 0
1384 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_SECURITYBASE_MSB 2
1386 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_SECURITYBASE_WIDTH 3
1388 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_SECURITYBASE_SET_MSK 0x00000007
1390 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_SECURITYBASE_CLR_MSK 0xfffffff8
1392 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_SECURITYBASE_RESET 0x0
1394 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_SECURITYBASE_GET(value) (((value) & 0x00000007) >> 0)
1396 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_SECURITYBASE_SET(value) (((value) << 0) & 0x00000007)
1398 #ifndef __ASSEMBLY__
1409 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_s
1411 uint32_t SECURITYBASE : 3;
1416 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_t;
1420 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_RESET 0x00000000
1422 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_OFST 0x2c
1445 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_SECURITYMSK_LSB 0
1447 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_SECURITYMSK_MSB 2
1449 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_SECURITYMSK_WIDTH 3
1451 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_SECURITYMSK_SET_MSK 0x00000007
1453 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_SECURITYMSK_CLR_MSK 0xfffffff8
1455 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_SECURITYMSK_RESET 0x0
1457 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_SECURITYMSK_GET(value) (((value) & 0x00000007) >> 0)
1459 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_SECURITYMSK_SET(value) (((value) << 0) & 0x00000007)
1461 #ifndef __ASSEMBLY__
1472 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_s
1474 uint32_t SECURITYMASK : 3;
1479 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_t;
1483 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_RESET 0x00000000
1485 #define ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_OFST 0x30
1487 #ifndef __ASSEMBLY__
1498 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_s
1500 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_COREID_t emac0_m_I_main_TransactionStatFilter_Id_CoreId;
1501 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_REVID_t emac0_m_I_main_TransactionStatFilter_Id_RevisionId;
1502 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_MOD_t emac0_m_I_main_TransactionStatFilter_Mode;
1503 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_LOW_t emac0_m_I_main_TransactionStatFilter_AddrBase_Low;
1504 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRBASE_HIGH_t emac0_m_I_main_TransactionStatFilter_AddrBase_High;
1505 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_ADDRWINDOWSIZE_t emac0_m_I_main_TransactionStatFilter_AddrWindowSize;
1506 volatile uint32_t _pad_0x18_0x1f[2];
1507 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_OPCODE_t emac0_m_I_main_TransactionStatFilter_Opcode;
1508 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERBASE_t emac0_m_I_main_TransactionStatFilter_UserBase;
1509 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_USERMSK_t emac0_m_I_main_TransactionStatFilter_UserMask;
1510 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYBASE_t emac0_m_I_main_TransactionStatFilter_SecurityBase;
1511 ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_SECURITYMSK_t emac0_m_I_main_TransactionStatFilter_SecurityMask;
1512 volatile uint32_t _pad_0x34_0x80[19];
1516 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_t;
1518 struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_raw_s
1520 volatile uint32_t emac0_m_I_main_TransactionStatFilter_Id_CoreId;
1521 volatile uint32_t emac0_m_I_main_TransactionStatFilter_Id_RevisionId;
1522 volatile uint32_t emac0_m_I_main_TransactionStatFilter_Mode;
1523 volatile uint32_t emac0_m_I_main_TransactionStatFilter_AddrBase_Low;
1524 volatile uint32_t emac0_m_I_main_TransactionStatFilter_AddrBase_High;
1525 volatile uint32_t emac0_m_I_main_TransactionStatFilter_AddrWindowSize;
1526 uint32_t _pad_0x18_0x1f[2];
1527 volatile uint32_t emac0_m_I_main_TransactionStatFilter_Opcode;
1528 volatile uint32_t emac0_m_I_main_TransactionStatFilter_UserBase;
1529 volatile uint32_t emac0_m_I_main_TransactionStatFilter_UserMask;
1530 volatile uint32_t emac0_m_I_main_TransactionStatFilter_SecurityBase;
1531 volatile uint32_t emac0_m_I_main_TransactionStatFilter_SecurityMask;
1532 uint32_t _pad_0x34_0x80[19];
1536 typedef volatile struct ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_raw_s ALT_NOC_MPU_EMAC0_M_XACTSTATFLT_raw_t;