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Table of Contents
Overview
The DE10-Nano development board features a Cyclone® V SoC FPGA combined with a wide range of peripheral devices and I/O expansion headers to create a powerful development platform. This low-cost kit serves an interactive, web-based "guided tour" that lets you quickly learn the basics of SoC FPGA development and provides an excellent platform on which to develop your own SoC FPGA design. Cyclone V SoCs integrate a dual-core ARM® Cortex®-A9 MPCore™ hard processor, peripherals, and memory interfaces with FPGA fabric using a high-bandwidth interconnect backbone. They combine the performance and power savings of a hard processor system (HPS) with the flexibility of programmable logic.Board Photos
(click to enlarge)
(click to enlarge)
Board Block Diagram
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System Block Diagram
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Kit Features
The DE10-Nano Development board features the following:- Cyclone V SE development board
- Featured devices
- FPGA configuration sources
- Embedded USB-Blaster II (JTAG) cable
- Serial configuration flash - EPCS128
- Hard processor system (HPS)
- FPGA I/O interfaces
- x2 push buttons
- x4 slide switches
- x8 LEDs
- Three 50MHz clock sources from the clock generator
- Two 40-pin expansion header with diode protection
- One Arduino expansion header (Uno R3 compatibility), can connect with Arduino shields.
- One 10-pin Analog input expansion header. (shared with Arduino Analog input)
- 8-channel, 12-bit A/D converter, 500ksps 4-pin SPI interface with FPGA
- HDMI Output
- Hard Processor System (HPS)
- 800MHz Dual-core ARM Cortex-A9 processor
- 1GB DDR3 SDRAM (32-bit data bus)
- x1 Gigabit Ethernet PHY with RJ45 connector
- x1 USB OTG port, USB Micro-AB connector
- Micro SD card socket
- 1 8GByte SD Card flash
- Accelerometer (I2C interface + interrupt)
- UART to USB, USB Mini-B connector
- Warm reset button and cold reset button
- One user button and one user LED
- LTC 2x7 expansion header
- Embedded software
- Linux kernel 4.1.33 LTSI
- Angstrom 2016.12
- FPGA hardware design
- 32-bit Fast Fourier Transform engine (FFT)
- HDMI output (video pipeline)
- General-purpose I/O (GPIO) for LEDs, push buttons, and slide switches
- SPI master interface to A/D converter
- I/F to Arduino shield headers (digital I/O, serial I/O, A/D converter)
- GPIO
- SPI master
- I2C Controller
- UART
Arduino Header
The board provides Arduino Uno revision 3 compatibility expansion header which comes with four independent headers. The expansion header has 17 user pins (16pins GPIO and 1pin Reset) connected directly to the Cyclone V SoC FPGA. 6-pins Analog input connects to ADC, and also provides DC +9V (VCC9), DC +5V (VCC5), DC +3.3V (VCC3P3 and IOREF), and three GND pins.
(click to enlarge)
In addition to the 16 pins for digital GPIO, there are also 6 analog inputs on the Arduino Uno R3 Expansion Header (ADC_IN0 ~ ADC_IN5) which are connected to an analog-to-digital converter (Linear Technology LTC2308). The LTC2308 is a low noise, 500ksps, 8-channel, 12-bit ADC with a SPI/MICROWIRE compatible serial interface. It can be configured to accept eight input signals at inputs ADC_IN0 through ADC_IN7. These eight input signals are connected to a 2x5 header, as shown below.
Analog Connections
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2x40 Pin Headers
The board has two 40-pin expansion headers. Each header has 36 user pins connected directly to the Cyclone V SoC FPGA. It also comes with DC +5V (VCC5), DC +3.3V (VCC3.3), and two GND pins. The Figure below shows the I/O distribution of the GPIO connector. The maximum power consumption allowed for a daughter card connected to one or two GPIO ports is as follows:- 5V: 1.0A (depending on the power adapter specification)
- 3.3V: 1.5A
(click to enlarge)
Resources
- DE10-Nano Getting Started Guide
- Instructions and source files to rebuild the FPGA project
- Instructions for rebuilding the Linux BSP
- GPIO Example Design
- FFT Example Design
- Accelerometer Tutorial
- Extend the rootfs Partition
- Open PacKaGe management (OPKG)
- Build and install the MRAA and UPM libraries
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